Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * setup.c |
| 3 | * |
| 4 | * BRIEF MODULE DESCRIPTION |
| 5 | * Momentum Computer Ocelot-3 board dependent boot routines |
| 6 | * |
| 7 | * Copyright (C) 1996, 1997, 01, 05 Ralf Baechle |
| 8 | * Copyright (C) 2000 RidgeRun, Inc. |
| 9 | * Copyright (C) 2001 Red Hat, Inc. |
| 10 | * Copyright (C) 2002 Momentum Computer |
| 11 | * |
| 12 | * Author: Matthew Dharm, Momentum Computer |
| 13 | * mdharm@momenco.com |
| 14 | * |
| 15 | * Louis Hamilton, Red Hat, Inc. |
| 16 | * hamilton@redhat.com [MIPS64 modifications] |
| 17 | * |
| 18 | * Author: RidgeRun, Inc. |
| 19 | * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com |
| 20 | * |
| 21 | * Copyright 2001 MontaVista Software Inc. |
| 22 | * Author: jsun@mvista.com or jsun@junsun.net |
| 23 | * |
| 24 | * Copyright 2004 PMC-Sierra |
| 25 | * Author: Manish Lachwani (lachwani@pmc-sierra.com) |
| 26 | * |
| 27 | * Copyright (C) 2004 MontaVista Software Inc. |
| 28 | * Author: Manish Lachwani, mlachwani@mvista.com |
| 29 | * |
| 30 | * This program is free software; you can redistribute it and/or modify it |
| 31 | * under the terms of the GNU General Public License as published by the |
| 32 | * Free Software Foundation; either version 2 of the License, or (at your |
| 33 | * option) any later version. |
| 34 | * |
| 35 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 36 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 37 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 38 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 39 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 40 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 41 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 42 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 43 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 44 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 45 | * |
| 46 | * You should have received a copy of the GNU General Public License along |
| 47 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 48 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 49 | */ |
| 50 | #include <linux/init.h> |
| 51 | #include <linux/kernel.h> |
| 52 | #include <linux/types.h> |
| 53 | #include <linux/mc146818rtc.h> |
| 54 | #include <linux/ioport.h> |
| 55 | #include <linux/interrupt.h> |
| 56 | #include <linux/pci.h> |
| 57 | #include <linux/timex.h> |
| 58 | #include <linux/bootmem.h> |
| 59 | #include <linux/mv643xx.h> |
Ralf Baechle | fcdb27a | 2006-01-18 17:37:07 +0000 | [diff] [blame] | 60 | #include <linux/pm.h> |
Matt Mackall | 4f3a36a | 2006-03-28 01:56:10 -0800 | [diff] [blame] | 61 | #include <linux/bcd.h> |
Ralf Baechle | fcdb27a | 2006-01-18 17:37:07 +0000 | [diff] [blame] | 62 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | #include <asm/time.h> |
| 64 | #include <asm/page.h> |
| 65 | #include <asm/bootinfo.h> |
| 66 | #include <asm/io.h> |
| 67 | #include <asm/irq.h> |
| 68 | #include <asm/pci.h> |
| 69 | #include <asm/processor.h> |
| 70 | #include <asm/ptrace.h> |
| 71 | #include <asm/reboot.h> |
| 72 | #include <asm/mc146818rtc.h> |
| 73 | #include <asm/tlbflush.h> |
| 74 | #include "ocelot_3_fpga.h" |
| 75 | |
| 76 | /* Marvell Discovery Register Base */ |
| 77 | unsigned long marvell_base = (signed)0xf4000000; |
| 78 | |
| 79 | /* CPU clock */ |
| 80 | unsigned long cpu_clock; |
| 81 | |
| 82 | /* RTC/NVRAM */ |
| 83 | unsigned char* rtc_base = (unsigned char*)(signed)0xfc800000; |
| 84 | |
| 85 | /* FPGA Base */ |
| 86 | unsigned long ocelot_fpga_base = (signed)0xfc000000; |
| 87 | |
| 88 | /* Serial base */ |
| 89 | unsigned long uart_base = (signed)0xfd000000; |
| 90 | |
| 91 | /* |
| 92 | * Marvell Discovery SRAM. This is one place where Ethernet |
| 93 | * Tx and Rx descriptors can be placed to improve performance |
| 94 | */ |
| 95 | extern unsigned long mv64340_sram_base; |
| 96 | |
| 97 | /* These functions are used for rebooting or halting the machine*/ |
| 98 | extern void momenco_ocelot_restart(char *command); |
| 99 | extern void momenco_ocelot_halt(void); |
| 100 | extern void momenco_ocelot_power_off(void); |
| 101 | |
| 102 | void momenco_time_init(void); |
| 103 | static char reset_reason; |
| 104 | |
| 105 | void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, |
| 106 | unsigned long entryhi, unsigned long pagemask); |
| 107 | |
| 108 | static inline unsigned long ENTRYLO(unsigned long paddr) |
| 109 | { |
| 110 | return ((paddr & PAGE_MASK) | |
| 111 | (_PAGE_PRESENT | __READABLE | __WRITEABLE | _PAGE_GLOBAL | |
| 112 | _CACHE_UNCACHED)) >> 6; |
| 113 | } |
| 114 | |
| 115 | void __init bus_error_init(void) |
| 116 | { |
| 117 | /* nothing */ |
| 118 | } |
| 119 | |
| 120 | /* |
| 121 | * setup code for a handoff from a version 2 PMON 2000 PROM |
| 122 | */ |
| 123 | void setup_wired_tlb_entries(void) |
| 124 | { |
| 125 | write_c0_wired(0); |
| 126 | local_flush_tlb_all(); |
| 127 | |
| 128 | /* marvell and extra space */ |
| 129 | add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), (signed)0xf4000000, PM_64K); |
| 130 | |
| 131 | /* fpga, rtc, and uart */ |
| 132 | add_wired_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfd000000), (signed)0xfc000000, PM_16M); |
| 133 | } |
| 134 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | unsigned long m48t37y_get_time(void) |
| 136 | { |
| 137 | unsigned int year, month, day, hour, min, sec; |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 138 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 140 | spin_lock_irqsave(&rtc_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | /* stop the update */ |
| 142 | rtc_base[0x7ff8] = 0x40; |
| 143 | |
Matt Mackall | 4f3a36a | 2006-03-28 01:56:10 -0800 | [diff] [blame] | 144 | year = BCD2BIN(rtc_base[0x7fff]); |
| 145 | year += BCD2BIN(rtc_base[0x7ff1]) * 100; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | |
Matt Mackall | 4f3a36a | 2006-03-28 01:56:10 -0800 | [diff] [blame] | 147 | month = BCD2BIN(rtc_base[0x7ffe]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | |
Matt Mackall | 4f3a36a | 2006-03-28 01:56:10 -0800 | [diff] [blame] | 149 | day = BCD2BIN(rtc_base[0x7ffd]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | |
Matt Mackall | 4f3a36a | 2006-03-28 01:56:10 -0800 | [diff] [blame] | 151 | hour = BCD2BIN(rtc_base[0x7ffb]); |
| 152 | min = BCD2BIN(rtc_base[0x7ffa]); |
| 153 | sec = BCD2BIN(rtc_base[0x7ff9]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | |
| 155 | /* start the update */ |
| 156 | rtc_base[0x7ff8] = 0x00; |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 157 | spin_unlock_irqrestore(&rtc_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | |
| 159 | return mktime(year, month, day, hour, min, sec); |
| 160 | } |
| 161 | |
| 162 | int m48t37y_set_time(unsigned long sec) |
| 163 | { |
| 164 | struct rtc_time tm; |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 165 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 166 | |
| 167 | /* convert to a more useful format -- note months count from 0 */ |
| 168 | to_tm(sec, &tm); |
| 169 | tm.tm_mon += 1; |
| 170 | |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 171 | spin_lock_irqsave(&rtc_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 172 | /* enable writing */ |
| 173 | rtc_base[0x7ff8] = 0x80; |
| 174 | |
| 175 | /* year */ |
Matt Mackall | 4f3a36a | 2006-03-28 01:56:10 -0800 | [diff] [blame] | 176 | rtc_base[0x7fff] = BIN2BCD(tm.tm_year % 100); |
| 177 | rtc_base[0x7ff1] = BIN2BCD(tm.tm_year / 100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | |
| 179 | /* month */ |
Matt Mackall | 4f3a36a | 2006-03-28 01:56:10 -0800 | [diff] [blame] | 180 | rtc_base[0x7ffe] = BIN2BCD(tm.tm_mon); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | |
| 182 | /* day */ |
Matt Mackall | 4f3a36a | 2006-03-28 01:56:10 -0800 | [diff] [blame] | 183 | rtc_base[0x7ffd] = BIN2BCD(tm.tm_mday); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 184 | |
| 185 | /* hour/min/sec */ |
Matt Mackall | 4f3a36a | 2006-03-28 01:56:10 -0800 | [diff] [blame] | 186 | rtc_base[0x7ffb] = BIN2BCD(tm.tm_hour); |
| 187 | rtc_base[0x7ffa] = BIN2BCD(tm.tm_min); |
| 188 | rtc_base[0x7ff9] = BIN2BCD(tm.tm_sec); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 189 | |
| 190 | /* day of week -- not really used, but let's keep it up-to-date */ |
Matt Mackall | 4f3a36a | 2006-03-28 01:56:10 -0800 | [diff] [blame] | 191 | rtc_base[0x7ffc] = BIN2BCD(tm.tm_wday + 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 192 | |
| 193 | /* disable writing */ |
| 194 | rtc_base[0x7ff8] = 0x00; |
Atsushi Nemoto | 53c2df2 | 2005-11-03 01:01:15 +0900 | [diff] [blame] | 195 | spin_unlock_irqrestore(&rtc_lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 196 | |
| 197 | return 0; |
| 198 | } |
| 199 | |
| 200 | void momenco_timer_setup(struct irqaction *irq) |
| 201 | { |
| 202 | setup_irq(7, irq); /* Timer interrupt, unmask status IM7 */ |
| 203 | } |
| 204 | |
| 205 | void momenco_time_init(void) |
| 206 | { |
| 207 | setup_wired_tlb_entries(); |
| 208 | |
| 209 | /* |
| 210 | * Ocelot-3 board has been built with both |
| 211 | * the Rm7900 and the Rm7065C |
| 212 | */ |
| 213 | mips_hpt_frequency = cpu_clock / 2; |
| 214 | board_timer_setup = momenco_timer_setup; |
| 215 | |
Yoichi Yuasa | d23ee8f | 2006-03-27 01:16:33 -0800 | [diff] [blame] | 216 | rtc_mips_get_time = m48t37y_get_time; |
| 217 | rtc_mips_set_time = m48t37y_set_time; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 218 | } |
| 219 | |
| 220 | /* |
| 221 | * PCI Support for Ocelot-3 |
| 222 | */ |
| 223 | |
| 224 | /* Bus #0 IO and MEM space */ |
| 225 | #define OCELOT_3_PCI_IO_0_START 0xe0000000 |
| 226 | #define OCELOT_3_PCI_IO_0_SIZE 0x08000000 |
| 227 | #define OCELOT_3_PCI_MEM_0_START 0xc0000000 |
| 228 | #define OCELOT_3_PCI_MEM_0_SIZE 0x10000000 |
| 229 | |
| 230 | /* Bus #1 IO and MEM space */ |
| 231 | #define OCELOT_3_PCI_IO_1_START 0xe8000000 |
| 232 | #define OCELOT_3_PCI_IO_1_SIZE 0x08000000 |
| 233 | #define OCELOT_3_PCI_MEM_1_START 0xd0000000 |
| 234 | #define OCELOT_3_PCI_MEM_1_SIZE 0x10000000 |
| 235 | |
| 236 | static struct resource mv_pci_io_mem0_resource = { |
| 237 | .name = "MV64340 PCI0 IO MEM", |
| 238 | .start = OCELOT_3_PCI_IO_0_START, |
| 239 | .end = OCELOT_3_PCI_IO_0_START + OCELOT_3_PCI_IO_0_SIZE - 1, |
| 240 | .flags = IORESOURCE_IO, |
| 241 | }; |
| 242 | |
| 243 | static struct resource mv_pci_io_mem1_resource = { |
| 244 | .name = "MV64340 PCI1 IO MEM", |
| 245 | .start = OCELOT_3_PCI_IO_1_START, |
| 246 | .end = OCELOT_3_PCI_IO_1_START + OCELOT_3_PCI_IO_1_SIZE - 1, |
| 247 | .flags = IORESOURCE_IO, |
| 248 | }; |
| 249 | |
| 250 | static struct resource mv_pci_mem0_resource = { |
| 251 | .name = "MV64340 PCI0 MEM", |
| 252 | .start = OCELOT_3_PCI_MEM_0_START, |
| 253 | .end = OCELOT_3_PCI_MEM_0_START + OCELOT_3_PCI_MEM_0_SIZE - 1, |
| 254 | .flags = IORESOURCE_MEM, |
| 255 | }; |
| 256 | |
| 257 | static struct resource mv_pci_mem1_resource = { |
| 258 | .name = "MV64340 PCI1 MEM", |
| 259 | .start = OCELOT_3_PCI_MEM_1_START, |
| 260 | .end = OCELOT_3_PCI_MEM_1_START + OCELOT_3_PCI_MEM_1_SIZE - 1, |
| 261 | .flags = IORESOURCE_MEM, |
| 262 | }; |
| 263 | |
| 264 | static struct mv_pci_controller mv_bus0_controller = { |
| 265 | .pcic = { |
| 266 | .pci_ops = &mv_pci_ops, |
| 267 | .mem_resource = &mv_pci_mem0_resource, |
| 268 | .io_resource = &mv_pci_io_mem0_resource, |
| 269 | }, |
| 270 | .config_addr = MV64340_PCI_0_CONFIG_ADDR, |
| 271 | .config_vreg = MV64340_PCI_0_CONFIG_DATA_VIRTUAL_REG, |
| 272 | }; |
| 273 | |
| 274 | static struct mv_pci_controller mv_bus1_controller = { |
| 275 | .pcic = { |
| 276 | .pci_ops = &mv_pci_ops, |
| 277 | .mem_resource = &mv_pci_mem1_resource, |
| 278 | .io_resource = &mv_pci_io_mem1_resource, |
| 279 | }, |
| 280 | .config_addr = MV64340_PCI_1_CONFIG_ADDR, |
| 281 | .config_vreg = MV64340_PCI_1_CONFIG_DATA_VIRTUAL_REG, |
| 282 | }; |
| 283 | |
| 284 | static __init int __init ja_pci_init(void) |
| 285 | { |
| 286 | uint32_t enable; |
| 287 | extern int pci_probe_only; |
| 288 | |
| 289 | /* PMON will assign PCI resources */ |
| 290 | pci_probe_only = 1; |
| 291 | |
| 292 | enable = ~MV_READ(MV64340_BASE_ADDR_ENABLE); |
| 293 | /* |
| 294 | * We require at least one enabled I/O or PCI memory window or we |
| 295 | * will ignore this PCI bus. We ignore PCI windows 1, 2 and 3. |
| 296 | */ |
| 297 | if (enable & (0x01 << 9) || enable & (0x01 << 10)) |
| 298 | register_pci_controller(&mv_bus0_controller.pcic); |
| 299 | |
| 300 | if (enable & (0x01 << 14) || enable & (0x01 << 15)) |
| 301 | register_pci_controller(&mv_bus1_controller.pcic); |
| 302 | |
| 303 | ioport_resource.end = OCELOT_3_PCI_IO_0_START + OCELOT_3_PCI_IO_0_SIZE + |
| 304 | OCELOT_3_PCI_IO_1_SIZE - 1; |
| 305 | |
| 306 | iomem_resource.end = OCELOT_3_PCI_MEM_0_START + OCELOT_3_PCI_MEM_0_SIZE + |
| 307 | OCELOT_3_PCI_MEM_1_SIZE - 1; |
| 308 | |
| 309 | set_io_port_base(OCELOT_3_PCI_IO_0_START); /* mips_io_port_base */ |
| 310 | |
| 311 | return 0; |
| 312 | } |
| 313 | |
| 314 | arch_initcall(ja_pci_init); |
| 315 | |
Ralf Baechle | c83cfc9 | 2005-06-21 13:56:30 +0000 | [diff] [blame] | 316 | void __init plat_setup(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 317 | { |
| 318 | unsigned int tmpword; |
| 319 | |
| 320 | board_time_init = momenco_time_init; |
| 321 | |
| 322 | _machine_restart = momenco_ocelot_restart; |
| 323 | _machine_halt = momenco_ocelot_halt; |
Ralf Baechle | fcdb27a | 2006-01-18 17:37:07 +0000 | [diff] [blame] | 324 | pm_power_off = momenco_ocelot_power_off; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 325 | |
| 326 | /* Wired TLB entries */ |
| 327 | setup_wired_tlb_entries(); |
| 328 | |
| 329 | /* shut down ethernet ports, just to be sure our memory doesn't get |
| 330 | * corrupted by random ethernet traffic. |
| 331 | */ |
| 332 | MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8); |
| 333 | MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8); |
| 334 | MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8); |
| 335 | MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8); |
| 336 | do {} |
| 337 | while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff); |
| 338 | do {} |
| 339 | while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff); |
| 340 | do {} |
| 341 | while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff); |
| 342 | do {} |
| 343 | while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff); |
| 344 | MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0), |
| 345 | MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1); |
| 346 | MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1), |
| 347 | MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1); |
| 348 | |
| 349 | /* Turn off the Bit-Error LED */ |
| 350 | OCELOT_FPGA_WRITE(0x80, CLR); |
| 351 | |
| 352 | tmpword = OCELOT_FPGA_READ(BOARDREV); |
| 353 | if (tmpword < 26) |
| 354 | printk("Momenco Ocelot-3: Board Assembly Rev. %c\n", |
| 355 | 'A'+tmpword); |
| 356 | else |
| 357 | printk("Momenco Ocelot-3: Board Assembly Revision #0x%x\n", |
| 358 | tmpword); |
| 359 | |
| 360 | tmpword = OCELOT_FPGA_READ(FPGA_REV); |
| 361 | printk("FPGA Rev: %d.%d\n", tmpword>>4, tmpword&15); |
| 362 | tmpword = OCELOT_FPGA_READ(RESET_STATUS); |
| 363 | printk("Reset reason: 0x%x\n", tmpword); |
| 364 | switch (tmpword) { |
| 365 | case 0x1: |
| 366 | printk(" - Power-up reset\n"); |
| 367 | break; |
| 368 | case 0x2: |
| 369 | printk(" - Push-button reset\n"); |
| 370 | break; |
| 371 | case 0x4: |
| 372 | printk(" - cPCI bus reset\n"); |
| 373 | break; |
| 374 | case 0x8: |
| 375 | printk(" - Watchdog reset\n"); |
| 376 | break; |
| 377 | case 0x10: |
| 378 | printk(" - Software reset\n"); |
| 379 | break; |
| 380 | default: |
| 381 | printk(" - Unknown reset cause\n"); |
| 382 | } |
| 383 | reset_reason = tmpword; |
| 384 | OCELOT_FPGA_WRITE(0xff, RESET_STATUS); |
| 385 | |
| 386 | tmpword = OCELOT_FPGA_READ(CPCI_ID); |
| 387 | printk("cPCI ID register: 0x%02x\n", tmpword); |
| 388 | printk(" - Slot number: %d\n", tmpword & 0x1f); |
| 389 | printk(" - PCI bus present: %s\n", tmpword & 0x40 ? "yes" : "no"); |
| 390 | printk(" - System Slot: %s\n", tmpword & 0x20 ? "yes" : "no"); |
| 391 | |
| 392 | tmpword = OCELOT_FPGA_READ(BOARD_STATUS); |
| 393 | printk("Board Status register: 0x%02x\n", tmpword); |
| 394 | printk(" - User jumper: %s\n", (tmpword & 0x80)?"installed":"absent"); |
| 395 | printk(" - Boot flash write jumper: %s\n", (tmpword&0x40)?"installed":"absent"); |
| 396 | printk(" - L3 cache size: %d MB\n", (1<<((tmpword&12) >> 2))&~1); |
| 397 | |
| 398 | /* Support for 128 MB memory */ |
| 399 | add_memory_region(0x0, 0x08000000, BOOT_MEM_RAM); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 400 | } |