blob: f037e5593269e8a79f700e7acf917919e0b13762 [file] [log] [blame]
David Brownell9904f222006-01-08 13:34:26 -08001/*
2 * spi_bitbang.c - polling/bitbanging SPI master controller driver utilities
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#include <linux/config.h>
20#include <linux/init.h>
21#include <linux/spinlock.h>
22#include <linux/workqueue.h>
23#include <linux/interrupt.h>
24#include <linux/delay.h>
25#include <linux/errno.h>
26#include <linux/platform_device.h>
27
28#include <linux/spi/spi.h>
29#include <linux/spi/spi_bitbang.h>
30
31
32/*----------------------------------------------------------------------*/
33
34/*
35 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
36 * Use this for GPIO or shift-register level hardware APIs.
37 *
38 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
39 * to glue code. These bitbang setup() and cleanup() routines are always
40 * used, though maybe they're called from controller-aware code.
41 *
42 * chipselect() and friends may use use spi_device->controller_data and
43 * controller registers as appropriate.
44 *
45 *
46 * NOTE: SPI controller pins can often be used as GPIO pins instead,
47 * which means you could use a bitbang driver either to get hardware
48 * working quickly, or testing for differences that aren't speed related.
49 */
50
51struct spi_bitbang_cs {
52 unsigned nsecs; /* (clock cycle time)/2 */
53 u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
54 u32 word, u8 bits);
55 unsigned (*txrx_bufs)(struct spi_device *,
56 u32 (*txrx_word)(
57 struct spi_device *spi,
58 unsigned nsecs,
59 u32 word, u8 bits),
60 unsigned, struct spi_transfer *);
61};
62
63static unsigned bitbang_txrx_8(
64 struct spi_device *spi,
65 u32 (*txrx_word)(struct spi_device *spi,
66 unsigned nsecs,
67 u32 word, u8 bits),
68 unsigned ns,
69 struct spi_transfer *t
70) {
71 unsigned bits = spi->bits_per_word;
72 unsigned count = t->len;
73 const u8 *tx = t->tx_buf;
74 u8 *rx = t->rx_buf;
75
76 while (likely(count > 0)) {
77 u8 word = 0;
78
79 if (tx)
80 word = *tx++;
81 word = txrx_word(spi, ns, word, bits);
82 if (rx)
83 *rx++ = word;
84 count -= 1;
85 }
86 return t->len - count;
87}
88
89static unsigned bitbang_txrx_16(
90 struct spi_device *spi,
91 u32 (*txrx_word)(struct spi_device *spi,
92 unsigned nsecs,
93 u32 word, u8 bits),
94 unsigned ns,
95 struct spi_transfer *t
96) {
97 unsigned bits = spi->bits_per_word;
98 unsigned count = t->len;
99 const u16 *tx = t->tx_buf;
100 u16 *rx = t->rx_buf;
101
102 while (likely(count > 1)) {
103 u16 word = 0;
104
105 if (tx)
106 word = *tx++;
107 word = txrx_word(spi, ns, word, bits);
108 if (rx)
109 *rx++ = word;
110 count -= 2;
111 }
112 return t->len - count;
113}
114
115static unsigned bitbang_txrx_32(
116 struct spi_device *spi,
117 u32 (*txrx_word)(struct spi_device *spi,
118 unsigned nsecs,
119 u32 word, u8 bits),
120 unsigned ns,
121 struct spi_transfer *t
122) {
123 unsigned bits = spi->bits_per_word;
124 unsigned count = t->len;
125 const u32 *tx = t->tx_buf;
126 u32 *rx = t->rx_buf;
127
128 while (likely(count > 3)) {
129 u32 word = 0;
130
131 if (tx)
132 word = *tx++;
133 word = txrx_word(spi, ns, word, bits);
134 if (rx)
135 *rx++ = word;
136 count -= 4;
137 }
138 return t->len - count;
139}
140
141/**
142 * spi_bitbang_setup - default setup for per-word I/O loops
143 */
144int spi_bitbang_setup(struct spi_device *spi)
145{
146 struct spi_bitbang_cs *cs = spi->controller_state;
147 struct spi_bitbang *bitbang;
148
Vitaly Wool8275c642006-01-08 13:34:28 -0800149 if (!spi->max_speed_hz)
150 return -EINVAL;
151
David Brownell9904f222006-01-08 13:34:26 -0800152 if (!cs) {
153 cs = kzalloc(sizeof *cs, SLAB_KERNEL);
154 if (!cs)
155 return -ENOMEM;
156 spi->controller_state = cs;
157 }
158 bitbang = spi_master_get_devdata(spi->master);
159
160 if (!spi->bits_per_word)
161 spi->bits_per_word = 8;
162
163 /* spi_transfer level calls that work per-word */
164 if (spi->bits_per_word <= 8)
165 cs->txrx_bufs = bitbang_txrx_8;
166 else if (spi->bits_per_word <= 16)
167 cs->txrx_bufs = bitbang_txrx_16;
168 else if (spi->bits_per_word <= 32)
169 cs->txrx_bufs = bitbang_txrx_32;
170 else
171 return -EINVAL;
172
173 /* per-word shift register access, in hardware or bitbanging */
174 cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
175 if (!cs->txrx_word)
176 return -EINVAL;
177
Vitaly Wool8275c642006-01-08 13:34:28 -0800178 /* nsecs = (clock period)/2 */
David Brownell9904f222006-01-08 13:34:26 -0800179 cs->nsecs = (1000000000/2) / (spi->max_speed_hz);
David Brownell9904f222006-01-08 13:34:26 -0800180 if (cs->nsecs > MAX_UDELAY_MS * 1000)
181 return -EINVAL;
182
183 dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec\n",
184 __FUNCTION__, spi->mode & (SPI_CPOL | SPI_CPHA),
185 spi->bits_per_word, 2 * cs->nsecs);
186
187 /* NOTE we _need_ to call chipselect() early, ideally with adapter
188 * setup, unless the hardware defaults cooperate to avoid confusion
189 * between normal (active low) and inverted chipselects.
190 */
191
192 /* deselect chip (low or high) */
193 spin_lock(&bitbang->lock);
194 if (!bitbang->busy) {
Vitaly Wool8275c642006-01-08 13:34:28 -0800195 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
David Brownell9904f222006-01-08 13:34:26 -0800196 ndelay(cs->nsecs);
197 }
198 spin_unlock(&bitbang->lock);
199
200 return 0;
201}
202EXPORT_SYMBOL_GPL(spi_bitbang_setup);
203
204/**
205 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
206 */
207void spi_bitbang_cleanup(const struct spi_device *spi)
208{
209 kfree(spi->controller_state);
210}
211EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
212
213static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
214{
215 struct spi_bitbang_cs *cs = spi->controller_state;
216 unsigned nsecs = cs->nsecs;
217
218 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t);
219}
220
221/*----------------------------------------------------------------------*/
222
223/*
224 * SECOND PART ... simple transfer queue runner.
225 *
226 * This costs a task context per controller, running the queue by
227 * performing each transfer in sequence. Smarter hardware can queue
228 * several DMA transfers at once, and process several controller queues
229 * in parallel; this driver doesn't match such hardware very well.
230 *
231 * Drivers can provide word-at-a-time i/o primitives, or provide
232 * transfer-at-a-time ones to leverage dma or fifo hardware.
233 */
234static void bitbang_work(void *_bitbang)
235{
236 struct spi_bitbang *bitbang = _bitbang;
237 unsigned long flags;
238
239 spin_lock_irqsave(&bitbang->lock, flags);
240 bitbang->busy = 1;
241 while (!list_empty(&bitbang->queue)) {
242 struct spi_message *m;
243 struct spi_device *spi;
244 unsigned nsecs;
Vitaly Wool8275c642006-01-08 13:34:28 -0800245 struct spi_transfer *t = NULL;
David Brownell9904f222006-01-08 13:34:26 -0800246 unsigned tmp;
Vitaly Wool8275c642006-01-08 13:34:28 -0800247 unsigned cs_change;
David Brownell9904f222006-01-08 13:34:26 -0800248 int status;
249
250 m = container_of(bitbang->queue.next, struct spi_message,
251 queue);
252 list_del_init(&m->queue);
253 spin_unlock_irqrestore(&bitbang->lock, flags);
254
Vitaly Wool8275c642006-01-08 13:34:28 -0800255 /* FIXME this is made-up ... the correct value is known to
256 * word-at-a-time bitbang code, and presumably chipselect()
257 * should enforce these requirements too?
258 */
259 nsecs = 100;
David Brownell9904f222006-01-08 13:34:26 -0800260
261 spi = m->spi;
David Brownell9904f222006-01-08 13:34:26 -0800262 tmp = 0;
Vitaly Wool8275c642006-01-08 13:34:28 -0800263 cs_change = 1;
David Brownell9904f222006-01-08 13:34:26 -0800264 status = 0;
265
Vitaly Wool8275c642006-01-08 13:34:28 -0800266 list_for_each_entry (t, &m->transfers, transfer_list) {
David Brownell9904f222006-01-08 13:34:26 -0800267 if (bitbang->shutdown) {
268 status = -ESHUTDOWN;
269 break;
270 }
271
Vitaly Wool8275c642006-01-08 13:34:28 -0800272 /* set up default clock polarity, and activate chip;
273 * this implicitly updates clock and spi modes as
274 * previously recorded for this device via setup().
275 * (and also deselects any other chip that might be
276 * selected ...)
277 */
278 if (cs_change) {
279 bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
David Brownell9904f222006-01-08 13:34:26 -0800280 ndelay(nsecs);
281 }
Vitaly Wool8275c642006-01-08 13:34:28 -0800282 cs_change = t->cs_change;
David Brownell9904f222006-01-08 13:34:26 -0800283 if (!t->tx_buf && !t->rx_buf && t->len) {
284 status = -EINVAL;
285 break;
286 }
287
Vitaly Wool8275c642006-01-08 13:34:28 -0800288 /* transfer data. the lower level code handles any
289 * new dma mappings it needs. our caller always gave
290 * us dma-safe buffers.
291 */
David Brownell9904f222006-01-08 13:34:26 -0800292 if (t->len) {
Vitaly Wool8275c642006-01-08 13:34:28 -0800293 /* REVISIT dma API still needs a designated
294 * DMA_ADDR_INVALID; ~0 might be better.
David Brownell9904f222006-01-08 13:34:26 -0800295 */
Vitaly Wool8275c642006-01-08 13:34:28 -0800296 if (!m->is_dma_mapped)
297 t->rx_dma = t->tx_dma = 0;
David Brownell9904f222006-01-08 13:34:26 -0800298 status = bitbang->txrx_bufs(spi, t);
299 }
300 if (status != t->len) {
301 if (status > 0)
302 status = -EMSGSIZE;
303 break;
304 }
305 m->actual_length += status;
306 status = 0;
307
308 /* protocol tweaks before next transfer */
309 if (t->delay_usecs)
310 udelay(t->delay_usecs);
311
Vitaly Wool8275c642006-01-08 13:34:28 -0800312 if (!cs_change)
313 continue;
314 if (t->transfer_list.next == &m->transfers)
David Brownell9904f222006-01-08 13:34:26 -0800315 break;
316
Vitaly Wool8275c642006-01-08 13:34:28 -0800317 /* sometimes a short mid-message deselect of the chip
318 * may be needed to terminate a mode or command
319 */
320 ndelay(nsecs);
321 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
322 ndelay(nsecs);
David Brownell9904f222006-01-08 13:34:26 -0800323 }
324
David Brownell9904f222006-01-08 13:34:26 -0800325 m->status = status;
326 m->complete(m->context);
327
Vitaly Wool8275c642006-01-08 13:34:28 -0800328 /* normally deactivate chipselect ... unless no error and
329 * cs_change has hinted that the next message will probably
330 * be for this chip too.
331 */
332 if (!(status == 0 && cs_change)) {
333 ndelay(nsecs);
334 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
335 ndelay(nsecs);
336 }
David Brownell9904f222006-01-08 13:34:26 -0800337
338 spin_lock_irqsave(&bitbang->lock, flags);
339 }
340 bitbang->busy = 0;
341 spin_unlock_irqrestore(&bitbang->lock, flags);
342}
343
344/**
345 * spi_bitbang_transfer - default submit to transfer queue
346 */
347int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m)
348{
349 struct spi_bitbang *bitbang;
350 unsigned long flags;
351
352 m->actual_length = 0;
353 m->status = -EINPROGRESS;
354
355 bitbang = spi_master_get_devdata(spi->master);
356 if (bitbang->shutdown)
357 return -ESHUTDOWN;
358
359 spin_lock_irqsave(&bitbang->lock, flags);
360 list_add_tail(&m->queue, &bitbang->queue);
361 queue_work(bitbang->workqueue, &bitbang->work);
362 spin_unlock_irqrestore(&bitbang->lock, flags);
363
364 return 0;
365}
366EXPORT_SYMBOL_GPL(spi_bitbang_transfer);
367
368/*----------------------------------------------------------------------*/
369
370/**
371 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
372 * @bitbang: driver handle
373 *
374 * Caller should have zero-initialized all parts of the structure, and then
375 * provided callbacks for chip selection and I/O loops. If the master has
376 * a transfer method, its final step should call spi_bitbang_transfer; or,
377 * that's the default if the transfer routine is not initialized. It should
378 * also set up the bus number and number of chipselects.
379 *
380 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
381 * hardware that basically exposes a shift register) or per-spi_transfer
382 * (which takes better advantage of hardware like fifos or DMA engines).
383 *
384 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup and
385 * spi_bitbang_cleanup to handle those spi master methods. Those methods are
386 * the defaults if the bitbang->txrx_bufs routine isn't initialized.
387 *
388 * This routine registers the spi_master, which will process requests in a
389 * dedicated task, keeping IRQs unblocked most of the time. To stop
390 * processing those requests, call spi_bitbang_stop().
391 */
392int spi_bitbang_start(struct spi_bitbang *bitbang)
393{
394 int status;
395
396 if (!bitbang->master || !bitbang->chipselect)
397 return -EINVAL;
398
399 INIT_WORK(&bitbang->work, bitbang_work, bitbang);
400 spin_lock_init(&bitbang->lock);
401 INIT_LIST_HEAD(&bitbang->queue);
402
403 if (!bitbang->master->transfer)
404 bitbang->master->transfer = spi_bitbang_transfer;
405 if (!bitbang->txrx_bufs) {
406 bitbang->use_dma = 0;
407 bitbang->txrx_bufs = spi_bitbang_bufs;
408 if (!bitbang->master->setup) {
409 bitbang->master->setup = spi_bitbang_setup;
410 bitbang->master->cleanup = spi_bitbang_cleanup;
411 }
412 } else if (!bitbang->master->setup)
413 return -EINVAL;
414
415 /* this task is the only thing to touch the SPI bits */
416 bitbang->busy = 0;
417 bitbang->workqueue = create_singlethread_workqueue(
418 bitbang->master->cdev.dev->bus_id);
419 if (bitbang->workqueue == NULL) {
420 status = -EBUSY;
421 goto err1;
422 }
423
424 /* driver may get busy before register() returns, especially
425 * if someone registered boardinfo for devices
426 */
427 status = spi_register_master(bitbang->master);
428 if (status < 0)
429 goto err2;
430
431 return status;
432
433err2:
434 destroy_workqueue(bitbang->workqueue);
435err1:
436 return status;
437}
438EXPORT_SYMBOL_GPL(spi_bitbang_start);
439
440/**
441 * spi_bitbang_stop - stops the task providing spi communication
442 */
443int spi_bitbang_stop(struct spi_bitbang *bitbang)
444{
445 unsigned limit = 500;
446
447 spin_lock_irq(&bitbang->lock);
448 bitbang->shutdown = 0;
449 while (!list_empty(&bitbang->queue) && limit--) {
450 spin_unlock_irq(&bitbang->lock);
451
452 dev_dbg(bitbang->master->cdev.dev, "wait for queue\n");
453 msleep(10);
454
455 spin_lock_irq(&bitbang->lock);
456 }
457 spin_unlock_irq(&bitbang->lock);
458 if (!list_empty(&bitbang->queue)) {
459 dev_err(bitbang->master->cdev.dev, "queue didn't empty\n");
460 return -EBUSY;
461 }
462
463 destroy_workqueue(bitbang->workqueue);
464
465 spi_unregister_master(bitbang->master);
466
467 return 0;
468}
469EXPORT_SYMBOL_GPL(spi_bitbang_stop);
470
471MODULE_LICENSE("GPL");
472