Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 4 | * redistributing this file, you may do so under either license. |
| 5 | * |
| 6 | * GPL LICENSE SUMMARY |
| 7 | * |
| 8 | * Copyright(c) 2015 Intel Corporation. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of version 2 of the GNU General Public License as |
| 12 | * published by the Free Software Foundation. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, but |
| 15 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 17 | * General Public License for more details. |
| 18 | * |
| 19 | * BSD LICENSE |
| 20 | * |
| 21 | * Copyright(c) 2015 Intel Corporation. |
| 22 | * |
| 23 | * Redistribution and use in source and binary forms, with or without |
| 24 | * modification, are permitted provided that the following conditions |
| 25 | * are met: |
| 26 | * |
| 27 | * - Redistributions of source code must retain the above copyright |
| 28 | * notice, this list of conditions and the following disclaimer. |
| 29 | * - Redistributions in binary form must reproduce the above copyright |
| 30 | * notice, this list of conditions and the following disclaimer in |
| 31 | * the documentation and/or other materials provided with the |
| 32 | * distribution. |
| 33 | * - Neither the name of Intel Corporation nor the names of its |
| 34 | * contributors may be used to endorse or promote products derived |
| 35 | * from this software without specific prior written permission. |
| 36 | * |
| 37 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 38 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 39 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 40 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 41 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 42 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 43 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 44 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 45 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 46 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 47 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 48 | * |
| 49 | */ |
| 50 | #include <linux/mm.h> |
| 51 | #include <linux/types.h> |
| 52 | #include <linux/device.h> |
| 53 | #include <linux/dmapool.h> |
| 54 | #include <linux/slab.h> |
| 55 | #include <linux/list.h> |
| 56 | #include <linux/highmem.h> |
| 57 | #include <linux/io.h> |
| 58 | #include <linux/uio.h> |
| 59 | #include <linux/rbtree.h> |
| 60 | #include <linux/spinlock.h> |
| 61 | #include <linux/delay.h> |
| 62 | #include <linux/kthread.h> |
| 63 | #include <linux/mmu_context.h> |
| 64 | #include <linux/module.h> |
| 65 | #include <linux/vmalloc.h> |
| 66 | |
| 67 | #include "hfi.h" |
| 68 | #include "sdma.h" |
| 69 | #include "user_sdma.h" |
| 70 | #include "sdma.h" |
| 71 | #include "verbs.h" /* for the headers */ |
| 72 | #include "common.h" /* for struct hfi1_tid_info */ |
| 73 | #include "trace.h" |
| 74 | |
| 75 | static uint hfi1_sdma_comp_ring_size = 128; |
| 76 | module_param_named(sdma_comp_size, hfi1_sdma_comp_ring_size, uint, S_IRUGO); |
| 77 | MODULE_PARM_DESC(sdma_comp_size, "Size of User SDMA completion ring. Default: 128"); |
| 78 | |
| 79 | /* The maximum number of Data io vectors per message/request */ |
| 80 | #define MAX_VECTORS_PER_REQ 8 |
| 81 | /* |
| 82 | * Maximum number of packet to send from each message/request |
| 83 | * before moving to the next one. |
| 84 | */ |
| 85 | #define MAX_PKTS_PER_QUEUE 16 |
| 86 | |
| 87 | #define num_pages(x) (1 + ((((x) - 1) & PAGE_MASK) >> PAGE_SHIFT)) |
| 88 | |
| 89 | #define req_opcode(x) \ |
| 90 | (((x) >> HFI1_SDMA_REQ_OPCODE_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK) |
| 91 | #define req_version(x) \ |
| 92 | (((x) >> HFI1_SDMA_REQ_VERSION_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK) |
| 93 | #define req_iovcnt(x) \ |
| 94 | (((x) >> HFI1_SDMA_REQ_IOVCNT_SHIFT) & HFI1_SDMA_REQ_IOVCNT_MASK) |
| 95 | |
| 96 | /* Number of BTH.PSN bits used for sequence number in expected rcvs */ |
| 97 | #define BTH_SEQ_MASK 0x7ffull |
| 98 | |
| 99 | /* |
| 100 | * Define fields in the KDETH header so we can update the header |
| 101 | * template. |
| 102 | */ |
| 103 | #define KDETH_OFFSET_SHIFT 0 |
| 104 | #define KDETH_OFFSET_MASK 0x7fff |
| 105 | #define KDETH_OM_SHIFT 15 |
| 106 | #define KDETH_OM_MASK 0x1 |
| 107 | #define KDETH_TID_SHIFT 16 |
| 108 | #define KDETH_TID_MASK 0x3ff |
| 109 | #define KDETH_TIDCTRL_SHIFT 26 |
| 110 | #define KDETH_TIDCTRL_MASK 0x3 |
| 111 | #define KDETH_INTR_SHIFT 28 |
| 112 | #define KDETH_INTR_MASK 0x1 |
| 113 | #define KDETH_SH_SHIFT 29 |
| 114 | #define KDETH_SH_MASK 0x1 |
| 115 | #define KDETH_HCRC_UPPER_SHIFT 16 |
| 116 | #define KDETH_HCRC_UPPER_MASK 0xff |
| 117 | #define KDETH_HCRC_LOWER_SHIFT 24 |
| 118 | #define KDETH_HCRC_LOWER_MASK 0xff |
| 119 | |
| 120 | #define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4) |
| 121 | #define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff) |
| 122 | |
| 123 | #define KDETH_GET(val, field) \ |
| 124 | (((le32_to_cpu((val))) >> KDETH_##field##_SHIFT) & KDETH_##field##_MASK) |
| 125 | #define KDETH_SET(dw, field, val) do { \ |
| 126 | u32 dwval = le32_to_cpu(dw); \ |
| 127 | dwval &= ~(KDETH_##field##_MASK << KDETH_##field##_SHIFT); \ |
| 128 | dwval |= (((val) & KDETH_##field##_MASK) << \ |
| 129 | KDETH_##field##_SHIFT); \ |
| 130 | dw = cpu_to_le32(dwval); \ |
| 131 | } while (0) |
| 132 | |
| 133 | #define AHG_HEADER_SET(arr, idx, dw, bit, width, value) \ |
| 134 | do { \ |
| 135 | if ((idx) < ARRAY_SIZE((arr))) \ |
| 136 | (arr)[(idx++)] = sdma_build_ahg_descriptor( \ |
| 137 | (__force u16)(value), (dw), (bit), \ |
| 138 | (width)); \ |
| 139 | else \ |
| 140 | return -ERANGE; \ |
| 141 | } while (0) |
| 142 | |
| 143 | /* KDETH OM multipliers and switch over point */ |
| 144 | #define KDETH_OM_SMALL 4 |
| 145 | #define KDETH_OM_LARGE 64 |
| 146 | #define KDETH_OM_MAX_SIZE (1 << ((KDETH_OM_LARGE / KDETH_OM_SMALL) + 1)) |
| 147 | |
| 148 | /* Last packet in the request */ |
Sunny Kumar | cb32649 | 2015-11-06 10:06:43 +0530 | [diff] [blame] | 149 | #define TXREQ_FLAGS_REQ_LAST_PKT BIT(0) |
| 150 | #define TXREQ_FLAGS_IOVEC_LAST_PKT BIT(0) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 151 | |
| 152 | #define SDMA_REQ_IN_USE 0 |
| 153 | #define SDMA_REQ_FOR_THREAD 1 |
| 154 | #define SDMA_REQ_SEND_DONE 2 |
| 155 | #define SDMA_REQ_HAVE_AHG 3 |
| 156 | #define SDMA_REQ_HAS_ERROR 4 |
| 157 | #define SDMA_REQ_DONE_ERROR 5 |
| 158 | |
Sunny Kumar | cb32649 | 2015-11-06 10:06:43 +0530 | [diff] [blame] | 159 | #define SDMA_PKT_Q_INACTIVE BIT(0) |
| 160 | #define SDMA_PKT_Q_ACTIVE BIT(1) |
| 161 | #define SDMA_PKT_Q_DEFERRED BIT(2) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 162 | |
| 163 | /* |
| 164 | * Maximum retry attempts to submit a TX request |
| 165 | * before putting the process to sleep. |
| 166 | */ |
| 167 | #define MAX_DEFER_RETRY_COUNT 1 |
| 168 | |
| 169 | static unsigned initial_pkt_count = 8; |
| 170 | |
| 171 | #define SDMA_IOWAIT_TIMEOUT 1000 /* in milliseconds */ |
| 172 | |
| 173 | struct user_sdma_iovec { |
| 174 | struct iovec iov; |
| 175 | /* number of pages in this vector */ |
| 176 | unsigned npages; |
| 177 | /* array of pinned pages for this vector */ |
| 178 | struct page **pages; |
| 179 | /* offset into the virtual address space of the vector at |
| 180 | * which we last left off. */ |
| 181 | u64 offset; |
| 182 | }; |
| 183 | |
| 184 | struct user_sdma_request { |
| 185 | struct sdma_req_info info; |
| 186 | struct hfi1_user_sdma_pkt_q *pq; |
| 187 | struct hfi1_user_sdma_comp_q *cq; |
| 188 | /* This is the original header from user space */ |
| 189 | struct hfi1_pkt_header hdr; |
| 190 | /* |
| 191 | * Pointer to the SDMA engine for this request. |
| 192 | * Since different request could be on different VLs, |
| 193 | * each request will need it's own engine pointer. |
| 194 | */ |
| 195 | struct sdma_engine *sde; |
| 196 | u8 ahg_idx; |
| 197 | u32 ahg[9]; |
| 198 | /* |
| 199 | * KDETH.Offset (Eager) field |
| 200 | * We need to remember the initial value so the headers |
| 201 | * can be updated properly. |
| 202 | */ |
| 203 | u32 koffset; |
| 204 | /* |
| 205 | * KDETH.OFFSET (TID) field |
| 206 | * The offset can cover multiple packets, depending on the |
| 207 | * size of the TID entry. |
| 208 | */ |
| 209 | u32 tidoffset; |
| 210 | /* |
| 211 | * KDETH.OM |
| 212 | * Remember this because the header template always sets it |
| 213 | * to 0. |
| 214 | */ |
| 215 | u8 omfactor; |
| 216 | /* |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 217 | * pointer to the user's mm_struct. We are going to |
| 218 | * get a reference to it so it doesn't get freed |
| 219 | * since we might not be in process context when we |
| 220 | * are processing the iov's. |
| 221 | * Using this mm_struct, we can get vma based on the |
| 222 | * iov's address (find_vma()). |
| 223 | */ |
| 224 | struct mm_struct *user_mm; |
| 225 | /* |
| 226 | * We copy the iovs for this request (based on |
| 227 | * info.iovcnt). These are only the data vectors |
| 228 | */ |
| 229 | unsigned data_iovs; |
| 230 | /* total length of the data in the request */ |
| 231 | u32 data_len; |
| 232 | /* progress index moving along the iovs array */ |
| 233 | unsigned iov_idx; |
| 234 | struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ]; |
| 235 | /* number of elements copied to the tids array */ |
| 236 | u16 n_tids; |
| 237 | /* TID array values copied from the tid_iov vector */ |
| 238 | u32 *tids; |
| 239 | u16 tididx; |
| 240 | u32 sent; |
| 241 | u64 seqnum; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 242 | struct list_head txps; |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 243 | spinlock_t txcmp_lock; /* protect txcmp list */ |
| 244 | struct list_head txcmp; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 245 | unsigned long flags; |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 246 | /* status of the last txreq completed */ |
| 247 | int status; |
| 248 | struct work_struct worker; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 249 | }; |
| 250 | |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 251 | /* |
| 252 | * A single txreq could span up to 3 physical pages when the MTU |
| 253 | * is sufficiently large (> 4K). Each of the IOV pointers also |
| 254 | * needs it's own set of flags so the vector has been handled |
| 255 | * independently of each other. |
| 256 | */ |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 257 | struct user_sdma_txreq { |
| 258 | /* Packet header for the txreq */ |
| 259 | struct hfi1_pkt_header hdr; |
| 260 | struct sdma_txreq txreq; |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 261 | struct list_head list; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 262 | struct user_sdma_request *req; |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 263 | struct { |
| 264 | struct user_sdma_iovec *vec; |
| 265 | u8 flags; |
| 266 | } iovecs[3]; |
| 267 | int idx; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 268 | u16 flags; |
| 269 | unsigned busycount; |
| 270 | u64 seqnum; |
| 271 | }; |
| 272 | |
| 273 | #define SDMA_DBG(req, fmt, ...) \ |
| 274 | hfi1_cdbg(SDMA, "[%u:%u:%u:%u] " fmt, (req)->pq->dd->unit, \ |
| 275 | (req)->pq->ctxt, (req)->pq->subctxt, (req)->info.comp_idx, \ |
| 276 | ##__VA_ARGS__) |
| 277 | #define SDMA_Q_DBG(pq, fmt, ...) \ |
| 278 | hfi1_cdbg(SDMA, "[%u:%u:%u] " fmt, (pq)->dd->unit, (pq)->ctxt, \ |
| 279 | (pq)->subctxt, ##__VA_ARGS__) |
| 280 | |
| 281 | static int user_sdma_send_pkts(struct user_sdma_request *, unsigned); |
| 282 | static int num_user_pages(const struct iovec *); |
| 283 | static void user_sdma_txreq_cb(struct sdma_txreq *, int, int); |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 284 | static void user_sdma_delayed_completion(struct work_struct *); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 285 | static void user_sdma_free_request(struct user_sdma_request *); |
| 286 | static int pin_vector_pages(struct user_sdma_request *, |
| 287 | struct user_sdma_iovec *); |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 288 | static void unpin_vector_pages(struct user_sdma_request *, |
| 289 | struct user_sdma_iovec *); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 290 | static int check_header_template(struct user_sdma_request *, |
| 291 | struct hfi1_pkt_header *, u32, u32); |
| 292 | static int set_txreq_header(struct user_sdma_request *, |
| 293 | struct user_sdma_txreq *, u32); |
| 294 | static int set_txreq_header_ahg(struct user_sdma_request *, |
| 295 | struct user_sdma_txreq *, u32); |
| 296 | static inline void set_comp_state(struct user_sdma_request *, |
| 297 | enum hfi1_sdma_comp_state, int); |
| 298 | static inline u32 set_pkt_bth_psn(__be32, u8, u32); |
| 299 | static inline u32 get_lrh_len(struct hfi1_pkt_header, u32 len); |
| 300 | |
| 301 | static int defer_packet_queue( |
| 302 | struct sdma_engine *, |
| 303 | struct iowait *, |
| 304 | struct sdma_txreq *, |
| 305 | unsigned seq); |
| 306 | static void activate_packet_queue(struct iowait *, int); |
| 307 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 308 | static int defer_packet_queue( |
| 309 | struct sdma_engine *sde, |
| 310 | struct iowait *wait, |
| 311 | struct sdma_txreq *txreq, |
| 312 | unsigned seq) |
| 313 | { |
| 314 | struct hfi1_user_sdma_pkt_q *pq = |
| 315 | container_of(wait, struct hfi1_user_sdma_pkt_q, busy); |
| 316 | struct hfi1_ibdev *dev = &pq->dd->verbs_dev; |
| 317 | struct user_sdma_txreq *tx = |
| 318 | container_of(txreq, struct user_sdma_txreq, txreq); |
| 319 | |
| 320 | if (sdma_progress(sde, seq, txreq)) { |
| 321 | if (tx->busycount++ < MAX_DEFER_RETRY_COUNT) |
| 322 | goto eagain; |
| 323 | } |
| 324 | /* |
| 325 | * We are assuming that if the list is enqueued somewhere, it |
| 326 | * is to the dmawait list since that is the only place where |
| 327 | * it is supposed to be enqueued. |
| 328 | */ |
| 329 | xchg(&pq->state, SDMA_PKT_Q_DEFERRED); |
| 330 | write_seqlock(&dev->iowait_lock); |
| 331 | if (list_empty(&pq->busy.list)) |
| 332 | list_add_tail(&pq->busy.list, &sde->dmawait); |
| 333 | write_sequnlock(&dev->iowait_lock); |
| 334 | return -EBUSY; |
| 335 | eagain: |
| 336 | return -EAGAIN; |
| 337 | } |
| 338 | |
| 339 | static void activate_packet_queue(struct iowait *wait, int reason) |
| 340 | { |
| 341 | struct hfi1_user_sdma_pkt_q *pq = |
| 342 | container_of(wait, struct hfi1_user_sdma_pkt_q, busy); |
| 343 | xchg(&pq->state, SDMA_PKT_Q_ACTIVE); |
| 344 | wake_up(&wait->wait_dma); |
| 345 | }; |
| 346 | |
| 347 | static void sdma_kmem_cache_ctor(void *obj) |
| 348 | { |
| 349 | struct user_sdma_txreq *tx = (struct user_sdma_txreq *)obj; |
| 350 | |
| 351 | memset(tx, 0, sizeof(*tx)); |
| 352 | } |
| 353 | |
| 354 | int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt, struct file *fp) |
| 355 | { |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 356 | struct hfi1_filedata *fd; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 357 | int ret = 0; |
| 358 | unsigned memsize; |
| 359 | char buf[64]; |
| 360 | struct hfi1_devdata *dd; |
| 361 | struct hfi1_user_sdma_comp_q *cq; |
| 362 | struct hfi1_user_sdma_pkt_q *pq; |
| 363 | unsigned long flags; |
| 364 | |
| 365 | if (!uctxt || !fp) { |
| 366 | ret = -EBADF; |
| 367 | goto done; |
| 368 | } |
| 369 | |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 370 | fd = fp->private_data; |
| 371 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 372 | if (!hfi1_sdma_comp_ring_size) { |
| 373 | ret = -EINVAL; |
| 374 | goto done; |
| 375 | } |
| 376 | |
| 377 | dd = uctxt->dd; |
| 378 | |
| 379 | pq = kzalloc(sizeof(*pq), GFP_KERNEL); |
Alison Schofield | 806e6e1 | 2015-10-12 14:28:36 -0700 | [diff] [blame] | 380 | if (!pq) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 381 | goto pq_nomem; |
Alison Schofield | 806e6e1 | 2015-10-12 14:28:36 -0700 | [diff] [blame] | 382 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 383 | memsize = sizeof(*pq->reqs) * hfi1_sdma_comp_ring_size; |
| 384 | pq->reqs = kmalloc(memsize, GFP_KERNEL); |
Alison Schofield | 806e6e1 | 2015-10-12 14:28:36 -0700 | [diff] [blame] | 385 | if (!pq->reqs) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 386 | goto pq_reqs_nomem; |
Alison Schofield | 806e6e1 | 2015-10-12 14:28:36 -0700 | [diff] [blame] | 387 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 388 | INIT_LIST_HEAD(&pq->list); |
| 389 | pq->dd = dd; |
| 390 | pq->ctxt = uctxt->ctxt; |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 391 | pq->subctxt = fd->subctxt; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 392 | pq->n_max_reqs = hfi1_sdma_comp_ring_size; |
| 393 | pq->state = SDMA_PKT_Q_INACTIVE; |
| 394 | atomic_set(&pq->n_reqs, 0); |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 395 | init_waitqueue_head(&pq->wait); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 396 | |
| 397 | iowait_init(&pq->busy, 0, NULL, defer_packet_queue, |
| 398 | activate_packet_queue); |
| 399 | pq->reqidx = 0; |
| 400 | snprintf(buf, 64, "txreq-kmem-cache-%u-%u-%u", dd->unit, uctxt->ctxt, |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 401 | fd->subctxt); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 402 | pq->txreq_cache = kmem_cache_create(buf, |
| 403 | sizeof(struct user_sdma_txreq), |
| 404 | L1_CACHE_BYTES, |
| 405 | SLAB_HWCACHE_ALIGN, |
| 406 | sdma_kmem_cache_ctor); |
| 407 | if (!pq->txreq_cache) { |
| 408 | dd_dev_err(dd, "[%u] Failed to allocate TxReq cache\n", |
| 409 | uctxt->ctxt); |
| 410 | goto pq_txreq_nomem; |
| 411 | } |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 412 | fd->pq = pq; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 413 | cq = kzalloc(sizeof(*cq), GFP_KERNEL); |
Alison Schofield | 806e6e1 | 2015-10-12 14:28:36 -0700 | [diff] [blame] | 414 | if (!cq) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 415 | goto cq_nomem; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 416 | |
| 417 | memsize = ALIGN(sizeof(*cq->comps) * hfi1_sdma_comp_ring_size, |
| 418 | PAGE_SIZE); |
| 419 | cq->comps = vmalloc_user(memsize); |
Alison Schofield | 806e6e1 | 2015-10-12 14:28:36 -0700 | [diff] [blame] | 420 | if (!cq->comps) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 421 | goto cq_comps_nomem; |
Alison Schofield | 806e6e1 | 2015-10-12 14:28:36 -0700 | [diff] [blame] | 422 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 423 | cq->nentries = hfi1_sdma_comp_ring_size; |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 424 | fd->cq = cq; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 425 | |
| 426 | spin_lock_irqsave(&uctxt->sdma_qlock, flags); |
| 427 | list_add(&pq->list, &uctxt->sdma_queues); |
| 428 | spin_unlock_irqrestore(&uctxt->sdma_qlock, flags); |
| 429 | goto done; |
| 430 | |
| 431 | cq_comps_nomem: |
| 432 | kfree(cq); |
| 433 | cq_nomem: |
| 434 | kmem_cache_destroy(pq->txreq_cache); |
| 435 | pq_txreq_nomem: |
| 436 | kfree(pq->reqs); |
| 437 | pq_reqs_nomem: |
| 438 | kfree(pq); |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 439 | fd->pq = NULL; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 440 | pq_nomem: |
| 441 | ret = -ENOMEM; |
| 442 | done: |
| 443 | return ret; |
| 444 | } |
| 445 | |
| 446 | int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd) |
| 447 | { |
| 448 | struct hfi1_ctxtdata *uctxt = fd->uctxt; |
| 449 | struct hfi1_user_sdma_pkt_q *pq; |
| 450 | unsigned long flags; |
| 451 | |
| 452 | hfi1_cdbg(SDMA, "[%u:%u:%u] Freeing user SDMA queues", uctxt->dd->unit, |
| 453 | uctxt->ctxt, fd->subctxt); |
| 454 | pq = fd->pq; |
| 455 | if (pq) { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 456 | spin_lock_irqsave(&uctxt->sdma_qlock, flags); |
| 457 | if (!list_empty(&pq->list)) |
| 458 | list_del_init(&pq->list); |
| 459 | spin_unlock_irqrestore(&uctxt->sdma_qlock, flags); |
| 460 | iowait_sdma_drain(&pq->busy); |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 461 | /* Wait until all requests have been freed. */ |
| 462 | wait_event_interruptible( |
| 463 | pq->wait, |
| 464 | (ACCESS_ONCE(pq->state) == SDMA_PKT_Q_INACTIVE)); |
| 465 | kfree(pq->reqs); |
Julia Lawall | adad44d | 2015-09-13 14:15:04 +0200 | [diff] [blame] | 466 | kmem_cache_destroy(pq->txreq_cache); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 467 | kfree(pq); |
| 468 | fd->pq = NULL; |
| 469 | } |
| 470 | if (fd->cq) { |
| 471 | if (fd->cq->comps) |
| 472 | vfree(fd->cq->comps); |
| 473 | kfree(fd->cq); |
| 474 | fd->cq = NULL; |
| 475 | } |
| 476 | return 0; |
| 477 | } |
| 478 | |
| 479 | int hfi1_user_sdma_process_request(struct file *fp, struct iovec *iovec, |
| 480 | unsigned long dim, unsigned long *count) |
| 481 | { |
| 482 | int ret = 0, i = 0, sent; |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 483 | struct hfi1_filedata *fd = fp->private_data; |
| 484 | struct hfi1_ctxtdata *uctxt = fd->uctxt; |
| 485 | struct hfi1_user_sdma_pkt_q *pq = fd->pq; |
| 486 | struct hfi1_user_sdma_comp_q *cq = fd->cq; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 487 | struct hfi1_devdata *dd = pq->dd; |
| 488 | unsigned long idx = 0; |
| 489 | u8 pcount = initial_pkt_count; |
| 490 | struct sdma_req_info info; |
| 491 | struct user_sdma_request *req; |
| 492 | u8 opcode, sc, vl; |
| 493 | |
| 494 | if (iovec[idx].iov_len < sizeof(info) + sizeof(req->hdr)) { |
| 495 | hfi1_cdbg( |
| 496 | SDMA, |
| 497 | "[%u:%u:%u] First vector not big enough for header %lu/%lu", |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 498 | dd->unit, uctxt->ctxt, fd->subctxt, |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 499 | iovec[idx].iov_len, sizeof(info) + sizeof(req->hdr)); |
Mitko Haralanov | faa98b8 | 2015-12-08 17:10:11 -0500 | [diff] [blame] | 500 | return -EINVAL; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 501 | } |
| 502 | ret = copy_from_user(&info, iovec[idx].iov_base, sizeof(info)); |
| 503 | if (ret) { |
| 504 | hfi1_cdbg(SDMA, "[%u:%u:%u] Failed to copy info QW (%d)", |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 505 | dd->unit, uctxt->ctxt, fd->subctxt, ret); |
Mitko Haralanov | faa98b8 | 2015-12-08 17:10:11 -0500 | [diff] [blame] | 506 | return -EFAULT; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 507 | } |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 508 | trace_hfi1_sdma_user_reqinfo(dd, uctxt->ctxt, fd->subctxt, |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 509 | (u16 *)&info); |
| 510 | if (cq->comps[info.comp_idx].status == QUEUED) { |
| 511 | hfi1_cdbg(SDMA, "[%u:%u:%u] Entry %u is in QUEUED state", |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 512 | dd->unit, uctxt->ctxt, fd->subctxt, |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 513 | info.comp_idx); |
Mitko Haralanov | faa98b8 | 2015-12-08 17:10:11 -0500 | [diff] [blame] | 514 | return -EBADSLT; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 515 | } |
| 516 | if (!info.fragsize) { |
| 517 | hfi1_cdbg(SDMA, |
| 518 | "[%u:%u:%u:%u] Request does not specify fragsize", |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 519 | dd->unit, uctxt->ctxt, fd->subctxt, info.comp_idx); |
Mitko Haralanov | faa98b8 | 2015-12-08 17:10:11 -0500 | [diff] [blame] | 520 | return -EINVAL; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 521 | } |
| 522 | /* |
| 523 | * We've done all the safety checks that we can up to this point, |
| 524 | * "allocate" the request entry. |
| 525 | */ |
| 526 | hfi1_cdbg(SDMA, "[%u:%u:%u] Using req/comp entry %u\n", dd->unit, |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 527 | uctxt->ctxt, fd->subctxt, info.comp_idx); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 528 | req = pq->reqs + info.comp_idx; |
| 529 | memset(req, 0, sizeof(*req)); |
| 530 | /* Mark the request as IN_USE before we start filling it in. */ |
| 531 | set_bit(SDMA_REQ_IN_USE, &req->flags); |
| 532 | req->data_iovs = req_iovcnt(info.ctrl) - 1; |
| 533 | req->pq = pq; |
| 534 | req->cq = cq; |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 535 | req->status = -1; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 536 | INIT_LIST_HEAD(&req->txps); |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 537 | INIT_LIST_HEAD(&req->txcmp); |
| 538 | INIT_WORK(&req->worker, user_sdma_delayed_completion); |
| 539 | |
| 540 | spin_lock_init(&req->txcmp_lock); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 541 | memcpy(&req->info, &info, sizeof(info)); |
| 542 | |
| 543 | if (req_opcode(info.ctrl) == EXPECTED) |
| 544 | req->data_iovs--; |
| 545 | |
| 546 | if (!info.npkts || req->data_iovs > MAX_VECTORS_PER_REQ) { |
| 547 | SDMA_DBG(req, "Too many vectors (%u/%u)", req->data_iovs, |
| 548 | MAX_VECTORS_PER_REQ); |
Mitko Haralanov | faa98b8 | 2015-12-08 17:10:11 -0500 | [diff] [blame] | 549 | return -EINVAL; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 550 | } |
| 551 | /* Copy the header from the user buffer */ |
| 552 | ret = copy_from_user(&req->hdr, iovec[idx].iov_base + sizeof(info), |
| 553 | sizeof(req->hdr)); |
| 554 | if (ret) { |
| 555 | SDMA_DBG(req, "Failed to copy header template (%d)", ret); |
| 556 | ret = -EFAULT; |
| 557 | goto free_req; |
| 558 | } |
| 559 | |
| 560 | /* If Static rate control is not enabled, sanitize the header. */ |
| 561 | if (!HFI1_CAP_IS_USET(STATIC_RATE_CTRL)) |
| 562 | req->hdr.pbc[2] = 0; |
| 563 | |
| 564 | /* Validate the opcode. Do not trust packets from user space blindly. */ |
| 565 | opcode = (be32_to_cpu(req->hdr.bth[0]) >> 24) & 0xff; |
| 566 | if ((opcode & USER_OPCODE_CHECK_MASK) != |
| 567 | USER_OPCODE_CHECK_VAL) { |
| 568 | SDMA_DBG(req, "Invalid opcode (%d)", opcode); |
| 569 | ret = -EINVAL; |
| 570 | goto free_req; |
| 571 | } |
| 572 | /* |
| 573 | * Validate the vl. Do not trust packets from user space blindly. |
| 574 | * VL comes from PBC, SC comes from LRH, and the VL needs to |
| 575 | * match the SC look up. |
| 576 | */ |
| 577 | vl = (le16_to_cpu(req->hdr.pbc[0]) >> 12) & 0xF; |
| 578 | sc = (((be16_to_cpu(req->hdr.lrh[0]) >> 12) & 0xF) | |
| 579 | (((le16_to_cpu(req->hdr.pbc[1]) >> 14) & 0x1) << 4)); |
| 580 | if (vl >= dd->pport->vls_operational || |
| 581 | vl != sc_to_vlt(dd, sc)) { |
| 582 | SDMA_DBG(req, "Invalid SC(%u)/VL(%u)", sc, vl); |
| 583 | ret = -EINVAL; |
| 584 | goto free_req; |
| 585 | } |
| 586 | |
| 587 | /* |
| 588 | * Also should check the BTH.lnh. If it says the next header is GRH then |
| 589 | * the RXE parsing will be off and will land in the middle of the KDETH |
| 590 | * or miss it entirely. |
| 591 | */ |
| 592 | if ((be16_to_cpu(req->hdr.lrh[0]) & 0x3) == HFI1_LRH_GRH) { |
| 593 | SDMA_DBG(req, "User tried to pass in a GRH"); |
| 594 | ret = -EINVAL; |
| 595 | goto free_req; |
| 596 | } |
| 597 | |
| 598 | req->koffset = le32_to_cpu(req->hdr.kdeth.swdata[6]); |
| 599 | /* Calculate the initial TID offset based on the values of |
| 600 | KDETH.OFFSET and KDETH.OM that are passed in. */ |
| 601 | req->tidoffset = KDETH_GET(req->hdr.kdeth.ver_tid_offset, OFFSET) * |
| 602 | (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ? |
| 603 | KDETH_OM_LARGE : KDETH_OM_SMALL); |
| 604 | SDMA_DBG(req, "Initial TID offset %u", req->tidoffset); |
| 605 | idx++; |
| 606 | |
| 607 | /* Save all the IO vector structures */ |
| 608 | while (i < req->data_iovs) { |
| 609 | memcpy(&req->iovs[i].iov, iovec + idx++, sizeof(struct iovec)); |
| 610 | req->iovs[i].offset = 0; |
| 611 | req->data_len += req->iovs[i++].iov.iov_len; |
| 612 | } |
| 613 | SDMA_DBG(req, "total data length %u", req->data_len); |
| 614 | |
| 615 | if (pcount > req->info.npkts) |
| 616 | pcount = req->info.npkts; |
| 617 | /* |
| 618 | * Copy any TID info |
| 619 | * User space will provide the TID info only when the |
| 620 | * request type is EXPECTED. This is true even if there is |
| 621 | * only one packet in the request and the header is already |
| 622 | * setup. The reason for the singular TID case is that the |
| 623 | * driver needs to perform safety checks. |
| 624 | */ |
| 625 | if (req_opcode(req->info.ctrl) == EXPECTED) { |
| 626 | u16 ntids = iovec[idx].iov_len / sizeof(*req->tids); |
| 627 | |
| 628 | if (!ntids || ntids > MAX_TID_PAIR_ENTRIES) { |
| 629 | ret = -EINVAL; |
| 630 | goto free_req; |
| 631 | } |
| 632 | req->tids = kcalloc(ntids, sizeof(*req->tids), GFP_KERNEL); |
| 633 | if (!req->tids) { |
| 634 | ret = -ENOMEM; |
| 635 | goto free_req; |
| 636 | } |
| 637 | /* |
| 638 | * We have to copy all of the tids because they may vary |
| 639 | * in size and, therefore, the TID count might not be |
| 640 | * equal to the pkt count. However, there is no way to |
| 641 | * tell at this point. |
| 642 | */ |
| 643 | ret = copy_from_user(req->tids, iovec[idx].iov_base, |
| 644 | ntids * sizeof(*req->tids)); |
| 645 | if (ret) { |
| 646 | SDMA_DBG(req, "Failed to copy %d TIDs (%d)", |
| 647 | ntids, ret); |
| 648 | ret = -EFAULT; |
| 649 | goto free_req; |
| 650 | } |
| 651 | req->n_tids = ntids; |
| 652 | idx++; |
| 653 | } |
| 654 | |
| 655 | /* Have to select the engine */ |
| 656 | req->sde = sdma_select_engine_vl(dd, |
Ira Weiny | 9e10af4 | 2015-10-30 18:58:40 -0400 | [diff] [blame] | 657 | (u32)(uctxt->ctxt + fd->subctxt), |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 658 | vl); |
| 659 | if (!req->sde || !sdma_running(req->sde)) { |
| 660 | ret = -ECOMM; |
| 661 | goto free_req; |
| 662 | } |
| 663 | |
| 664 | /* We don't need an AHG entry if the request contains only one packet */ |
| 665 | if (req->info.npkts > 1 && HFI1_CAP_IS_USET(SDMA_AHG)) { |
| 666 | int ahg = sdma_ahg_alloc(req->sde); |
| 667 | |
| 668 | if (likely(ahg >= 0)) { |
| 669 | req->ahg_idx = (u8)ahg; |
| 670 | set_bit(SDMA_REQ_HAVE_AHG, &req->flags); |
| 671 | } |
| 672 | } |
| 673 | |
| 674 | set_comp_state(req, QUEUED, 0); |
| 675 | /* Send the first N packets in the request to buy us some time */ |
| 676 | sent = user_sdma_send_pkts(req, pcount); |
| 677 | if (unlikely(sent < 0)) { |
| 678 | if (sent != -EBUSY) { |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 679 | req->status = sent; |
| 680 | set_comp_state(req, ERROR, req->status); |
| 681 | return sent; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 682 | } else |
| 683 | sent = 0; |
| 684 | } |
| 685 | atomic_inc(&pq->n_reqs); |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 686 | xchg(&pq->state, SDMA_PKT_Q_ACTIVE); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 687 | |
| 688 | if (sent < req->info.npkts) { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 689 | /* |
| 690 | * This is a somewhat blocking send implementation. |
| 691 | * The driver will block the caller until all packets of the |
| 692 | * request have been submitted to the SDMA engine. However, it |
| 693 | * will not wait for send completions. |
| 694 | */ |
| 695 | while (!test_bit(SDMA_REQ_SEND_DONE, &req->flags)) { |
| 696 | ret = user_sdma_send_pkts(req, pcount); |
| 697 | if (ret < 0) { |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 698 | if (ret != -EBUSY) { |
| 699 | req->status = ret; |
| 700 | return ret; |
| 701 | } |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 702 | wait_event_interruptible_timeout( |
| 703 | pq->busy.wait_dma, |
| 704 | (pq->state == SDMA_PKT_Q_ACTIVE), |
| 705 | msecs_to_jiffies( |
| 706 | SDMA_IOWAIT_TIMEOUT)); |
| 707 | } |
| 708 | } |
| 709 | |
| 710 | } |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 711 | *count += idx; |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 712 | return 0; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 713 | free_req: |
| 714 | user_sdma_free_request(req); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 715 | return ret; |
| 716 | } |
| 717 | |
| 718 | static inline u32 compute_data_length(struct user_sdma_request *req, |
| 719 | struct user_sdma_txreq *tx) |
| 720 | { |
| 721 | /* |
| 722 | * Determine the proper size of the packet data. |
| 723 | * The size of the data of the first packet is in the header |
| 724 | * template. However, it includes the header and ICRC, which need |
| 725 | * to be subtracted. |
| 726 | * The size of the remaining packets is the minimum of the frag |
| 727 | * size (MTU) or remaining data in the request. |
| 728 | */ |
| 729 | u32 len; |
| 730 | |
| 731 | if (!req->seqnum) { |
| 732 | len = ((be16_to_cpu(req->hdr.lrh[2]) << 2) - |
| 733 | (sizeof(tx->hdr) - 4)); |
| 734 | } else if (req_opcode(req->info.ctrl) == EXPECTED) { |
| 735 | u32 tidlen = EXP_TID_GET(req->tids[req->tididx], LEN) * |
| 736 | PAGE_SIZE; |
| 737 | /* Get the data length based on the remaining space in the |
| 738 | * TID pair. */ |
| 739 | len = min(tidlen - req->tidoffset, (u32)req->info.fragsize); |
| 740 | /* If we've filled up the TID pair, move to the next one. */ |
| 741 | if (unlikely(!len) && ++req->tididx < req->n_tids && |
| 742 | req->tids[req->tididx]) { |
| 743 | tidlen = EXP_TID_GET(req->tids[req->tididx], |
| 744 | LEN) * PAGE_SIZE; |
| 745 | req->tidoffset = 0; |
| 746 | len = min_t(u32, tidlen, req->info.fragsize); |
| 747 | } |
| 748 | /* Since the TID pairs map entire pages, make sure that we |
| 749 | * are not going to try to send more data that we have |
| 750 | * remaining. */ |
| 751 | len = min(len, req->data_len - req->sent); |
| 752 | } else |
| 753 | len = min(req->data_len - req->sent, (u32)req->info.fragsize); |
| 754 | SDMA_DBG(req, "Data Length = %u", len); |
| 755 | return len; |
| 756 | } |
| 757 | |
| 758 | static inline u32 get_lrh_len(struct hfi1_pkt_header hdr, u32 len) |
| 759 | { |
| 760 | /* (Size of complete header - size of PBC) + 4B ICRC + data length */ |
| 761 | return ((sizeof(hdr) - sizeof(hdr.pbc)) + 4 + len); |
| 762 | } |
| 763 | |
| 764 | static int user_sdma_send_pkts(struct user_sdma_request *req, unsigned maxpkts) |
| 765 | { |
| 766 | int ret = 0; |
| 767 | unsigned npkts = 0; |
| 768 | struct user_sdma_txreq *tx = NULL; |
| 769 | struct hfi1_user_sdma_pkt_q *pq = NULL; |
| 770 | struct user_sdma_iovec *iovec = NULL; |
| 771 | |
Mitko Haralanov | faa98b8 | 2015-12-08 17:10:11 -0500 | [diff] [blame] | 772 | if (!req->pq) |
| 773 | return -EINVAL; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 774 | |
| 775 | pq = req->pq; |
| 776 | |
Mitko Haralanov | 6a5464f | 2015-12-08 17:10:12 -0500 | [diff] [blame] | 777 | /* If tx completion has reported an error, we are done. */ |
| 778 | if (test_bit(SDMA_REQ_HAS_ERROR, &req->flags)) { |
| 779 | set_bit(SDMA_REQ_DONE_ERROR, &req->flags); |
| 780 | return -EFAULT; |
| 781 | } |
| 782 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 783 | /* |
| 784 | * Check if we might have sent the entire request already |
| 785 | */ |
| 786 | if (unlikely(req->seqnum == req->info.npkts)) { |
| 787 | if (!list_empty(&req->txps)) |
| 788 | goto dosend; |
Mitko Haralanov | faa98b8 | 2015-12-08 17:10:11 -0500 | [diff] [blame] | 789 | return ret; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 790 | } |
| 791 | |
| 792 | if (!maxpkts || maxpkts > req->info.npkts - req->seqnum) |
| 793 | maxpkts = req->info.npkts - req->seqnum; |
| 794 | |
| 795 | while (npkts < maxpkts) { |
| 796 | u32 datalen = 0, queued = 0, data_sent = 0; |
| 797 | u64 iov_offset = 0; |
| 798 | |
| 799 | /* |
| 800 | * Check whether any of the completions have come back |
| 801 | * with errors. If so, we are not going to process any |
| 802 | * more packets from this request. |
| 803 | */ |
| 804 | if (test_bit(SDMA_REQ_HAS_ERROR, &req->flags)) { |
| 805 | set_bit(SDMA_REQ_DONE_ERROR, &req->flags); |
Mitko Haralanov | faa98b8 | 2015-12-08 17:10:11 -0500 | [diff] [blame] | 806 | return -EFAULT; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 807 | } |
| 808 | |
| 809 | tx = kmem_cache_alloc(pq->txreq_cache, GFP_KERNEL); |
Mitko Haralanov | faa98b8 | 2015-12-08 17:10:11 -0500 | [diff] [blame] | 810 | if (!tx) |
| 811 | return -ENOMEM; |
| 812 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 813 | tx->flags = 0; |
| 814 | tx->req = req; |
| 815 | tx->busycount = 0; |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 816 | tx->idx = -1; |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 817 | INIT_LIST_HEAD(&tx->list); |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 818 | memset(tx->iovecs, 0, sizeof(tx->iovecs)); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 819 | |
| 820 | if (req->seqnum == req->info.npkts - 1) |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 821 | tx->flags |= TXREQ_FLAGS_REQ_LAST_PKT; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 822 | |
| 823 | /* |
| 824 | * Calculate the payload size - this is min of the fragment |
| 825 | * (MTU) size or the remaining bytes in the request but only |
| 826 | * if we have payload data. |
| 827 | */ |
| 828 | if (req->data_len) { |
| 829 | iovec = &req->iovs[req->iov_idx]; |
| 830 | if (ACCESS_ONCE(iovec->offset) == iovec->iov.iov_len) { |
| 831 | if (++req->iov_idx == req->data_iovs) { |
| 832 | ret = -EFAULT; |
| 833 | goto free_txreq; |
| 834 | } |
| 835 | iovec = &req->iovs[req->iov_idx]; |
| 836 | WARN_ON(iovec->offset); |
| 837 | } |
| 838 | |
| 839 | /* |
| 840 | * This request might include only a header and no user |
| 841 | * data, so pin pages only if there is data and it the |
| 842 | * pages have not been pinned already. |
| 843 | */ |
| 844 | if (unlikely(!iovec->pages && iovec->iov.iov_len)) { |
| 845 | ret = pin_vector_pages(req, iovec); |
| 846 | if (ret) |
| 847 | goto free_tx; |
| 848 | } |
| 849 | |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 850 | tx->iovecs[++tx->idx].vec = iovec; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 851 | datalen = compute_data_length(req, tx); |
| 852 | if (!datalen) { |
| 853 | SDMA_DBG(req, |
| 854 | "Request has data but pkt len is 0"); |
| 855 | ret = -EFAULT; |
| 856 | goto free_tx; |
| 857 | } |
| 858 | } |
| 859 | |
| 860 | if (test_bit(SDMA_REQ_HAVE_AHG, &req->flags)) { |
| 861 | if (!req->seqnum) { |
| 862 | u16 pbclen = le16_to_cpu(req->hdr.pbc[0]); |
| 863 | u32 lrhlen = get_lrh_len(req->hdr, datalen); |
| 864 | /* |
| 865 | * Copy the request header into the tx header |
| 866 | * because the HW needs a cacheline-aligned |
| 867 | * address. |
| 868 | * This copy can be optimized out if the hdr |
| 869 | * member of user_sdma_request were also |
| 870 | * cacheline aligned. |
| 871 | */ |
| 872 | memcpy(&tx->hdr, &req->hdr, sizeof(tx->hdr)); |
| 873 | if (PBC2LRH(pbclen) != lrhlen) { |
| 874 | pbclen = (pbclen & 0xf000) | |
| 875 | LRH2PBC(lrhlen); |
| 876 | tx->hdr.pbc[0] = cpu_to_le16(pbclen); |
| 877 | } |
| 878 | ret = sdma_txinit_ahg(&tx->txreq, |
| 879 | SDMA_TXREQ_F_AHG_COPY, |
| 880 | sizeof(tx->hdr) + datalen, |
| 881 | req->ahg_idx, 0, NULL, 0, |
| 882 | user_sdma_txreq_cb); |
| 883 | if (ret) |
| 884 | goto free_tx; |
| 885 | ret = sdma_txadd_kvaddr(pq->dd, &tx->txreq, |
| 886 | &tx->hdr, |
| 887 | sizeof(tx->hdr)); |
| 888 | if (ret) |
| 889 | goto free_txreq; |
| 890 | } else { |
| 891 | int changes; |
| 892 | |
| 893 | changes = set_txreq_header_ahg(req, tx, |
| 894 | datalen); |
| 895 | if (changes < 0) |
| 896 | goto free_tx; |
| 897 | sdma_txinit_ahg(&tx->txreq, |
| 898 | SDMA_TXREQ_F_USE_AHG, |
| 899 | datalen, req->ahg_idx, changes, |
| 900 | req->ahg, sizeof(req->hdr), |
| 901 | user_sdma_txreq_cb); |
| 902 | } |
| 903 | } else { |
| 904 | ret = sdma_txinit(&tx->txreq, 0, sizeof(req->hdr) + |
| 905 | datalen, user_sdma_txreq_cb); |
| 906 | if (ret) |
| 907 | goto free_tx; |
| 908 | /* |
| 909 | * Modify the header for this packet. This only needs |
| 910 | * to be done if we are not going to use AHG. Otherwise, |
| 911 | * the HW will do it based on the changes we gave it |
| 912 | * during sdma_txinit_ahg(). |
| 913 | */ |
| 914 | ret = set_txreq_header(req, tx, datalen); |
| 915 | if (ret) |
| 916 | goto free_txreq; |
| 917 | } |
| 918 | |
| 919 | /* |
| 920 | * If the request contains any data vectors, add up to |
| 921 | * fragsize bytes to the descriptor. |
| 922 | */ |
| 923 | while (queued < datalen && |
| 924 | (req->sent + data_sent) < req->data_len) { |
| 925 | unsigned long base, offset; |
| 926 | unsigned pageidx, len; |
| 927 | |
| 928 | base = (unsigned long)iovec->iov.iov_base; |
| 929 | offset = ((base + iovec->offset + iov_offset) & |
| 930 | ~PAGE_MASK); |
| 931 | pageidx = (((iovec->offset + iov_offset + |
| 932 | base) - (base & PAGE_MASK)) >> PAGE_SHIFT); |
| 933 | len = offset + req->info.fragsize > PAGE_SIZE ? |
| 934 | PAGE_SIZE - offset : req->info.fragsize; |
| 935 | len = min((datalen - queued), len); |
| 936 | ret = sdma_txadd_page(pq->dd, &tx->txreq, |
| 937 | iovec->pages[pageidx], |
| 938 | offset, len); |
| 939 | if (ret) { |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 940 | int i; |
| 941 | |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 942 | SDMA_DBG(req, "SDMA txreq add page failed %d\n", |
| 943 | ret); |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 944 | /* Mark all assigned vectors as complete so they |
| 945 | * are unpinned in the callback. */ |
| 946 | for (i = tx->idx; i >= 0; i--) { |
| 947 | tx->iovecs[i].flags |= |
| 948 | TXREQ_FLAGS_IOVEC_LAST_PKT; |
| 949 | } |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 950 | goto free_txreq; |
| 951 | } |
| 952 | iov_offset += len; |
| 953 | queued += len; |
| 954 | data_sent += len; |
| 955 | if (unlikely(queued < datalen && |
| 956 | pageidx == iovec->npages && |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 957 | req->iov_idx < req->data_iovs - 1 && |
| 958 | tx->idx < ARRAY_SIZE(tx->iovecs))) { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 959 | iovec->offset += iov_offset; |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 960 | tx->iovecs[tx->idx].flags |= |
| 961 | TXREQ_FLAGS_IOVEC_LAST_PKT; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 962 | iovec = &req->iovs[++req->iov_idx]; |
| 963 | if (!iovec->pages) { |
| 964 | ret = pin_vector_pages(req, iovec); |
| 965 | if (ret) |
| 966 | goto free_txreq; |
| 967 | } |
| 968 | iov_offset = 0; |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 969 | tx->iovecs[++tx->idx].vec = iovec; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 970 | } |
| 971 | } |
| 972 | /* |
| 973 | * The txreq was submitted successfully so we can update |
| 974 | * the counters. |
| 975 | */ |
| 976 | req->koffset += datalen; |
| 977 | if (req_opcode(req->info.ctrl) == EXPECTED) |
| 978 | req->tidoffset += datalen; |
| 979 | req->sent += data_sent; |
| 980 | if (req->data_len) { |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 981 | tx->iovecs[tx->idx].vec->offset += iov_offset; |
| 982 | /* If we've reached the end of the io vector, mark it |
| 983 | * so the callback can unpin the pages and free it. */ |
| 984 | if (tx->iovecs[tx->idx].vec->offset == |
| 985 | tx->iovecs[tx->idx].vec->iov.iov_len) |
| 986 | tx->iovecs[tx->idx].flags |= |
| 987 | TXREQ_FLAGS_IOVEC_LAST_PKT; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 988 | } |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 989 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 990 | /* |
| 991 | * It is important to increment this here as it is used to |
| 992 | * generate the BTH.PSN and, therefore, can't be bulk-updated |
| 993 | * outside of the loop. |
| 994 | */ |
| 995 | tx->seqnum = req->seqnum++; |
| 996 | list_add_tail(&tx->txreq.list, &req->txps); |
| 997 | npkts++; |
| 998 | } |
| 999 | dosend: |
| 1000 | ret = sdma_send_txlist(req->sde, &pq->busy, &req->txps); |
| 1001 | if (list_empty(&req->txps)) |
| 1002 | if (req->seqnum == req->info.npkts) { |
| 1003 | set_bit(SDMA_REQ_SEND_DONE, &req->flags); |
| 1004 | /* |
| 1005 | * The txreq has already been submitted to the HW queue |
| 1006 | * so we can free the AHG entry now. Corruption will not |
| 1007 | * happen due to the sequential manner in which |
| 1008 | * descriptors are processed. |
| 1009 | */ |
| 1010 | if (test_bit(SDMA_REQ_HAVE_AHG, &req->flags)) |
| 1011 | sdma_ahg_free(req->sde, req->ahg_idx); |
| 1012 | } |
Mitko Haralanov | faa98b8 | 2015-12-08 17:10:11 -0500 | [diff] [blame] | 1013 | return ret; |
| 1014 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1015 | free_txreq: |
| 1016 | sdma_txclean(pq->dd, &tx->txreq); |
| 1017 | free_tx: |
| 1018 | kmem_cache_free(pq->txreq_cache, tx); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1019 | return ret; |
| 1020 | } |
| 1021 | |
| 1022 | /* |
| 1023 | * How many pages in this iovec element? |
| 1024 | */ |
| 1025 | static inline int num_user_pages(const struct iovec *iov) |
| 1026 | { |
| 1027 | const unsigned long addr = (unsigned long) iov->iov_base; |
| 1028 | const unsigned long len = iov->iov_len; |
| 1029 | const unsigned long spage = addr & PAGE_MASK; |
| 1030 | const unsigned long epage = (addr + len - 1) & PAGE_MASK; |
| 1031 | |
| 1032 | return 1 + ((epage - spage) >> PAGE_SHIFT); |
| 1033 | } |
| 1034 | |
| 1035 | static int pin_vector_pages(struct user_sdma_request *req, |
| 1036 | struct user_sdma_iovec *iovec) { |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1037 | int pinned, npages; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1038 | |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1039 | npages = num_user_pages(&iovec->iov); |
| 1040 | iovec->pages = kcalloc(npages, sizeof(*iovec->pages), GFP_KERNEL); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1041 | if (!iovec->pages) { |
| 1042 | SDMA_DBG(req, "Failed page array alloc"); |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1043 | return -ENOMEM; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1044 | } |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1045 | |
| 1046 | /* |
| 1047 | * Get a reference to the process's mm so we can use it when |
| 1048 | * unpinning the io vectors. |
| 1049 | */ |
| 1050 | req->pq->user_mm = get_task_mm(current); |
| 1051 | |
| 1052 | pinned = hfi1_acquire_user_pages((unsigned long)iovec->iov.iov_base, |
| 1053 | npages, 0, iovec->pages); |
| 1054 | |
| 1055 | if (pinned < 0) |
| 1056 | return pinned; |
| 1057 | |
| 1058 | iovec->npages = pinned; |
| 1059 | if (pinned != npages) { |
| 1060 | SDMA_DBG(req, "Failed to pin pages (%d/%u)", pinned, npages); |
| 1061 | unpin_vector_pages(req, iovec); |
| 1062 | return -EFAULT; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1063 | } |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1064 | return 0; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1065 | } |
| 1066 | |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1067 | static void unpin_vector_pages(struct user_sdma_request *req, |
| 1068 | struct user_sdma_iovec *iovec) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1069 | { |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1070 | /* |
| 1071 | * Unpinning is done through the workqueue so use the |
| 1072 | * process's mm if we have a reference to it. |
| 1073 | */ |
| 1074 | if ((current->flags & PF_KTHREAD) && req->pq->user_mm) |
| 1075 | use_mm(req->pq->user_mm); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1076 | |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1077 | hfi1_release_user_pages(iovec->pages, iovec->npages, 0); |
| 1078 | |
| 1079 | /* |
| 1080 | * Unuse the user's mm (see above) and release the |
| 1081 | * reference to it. |
| 1082 | */ |
| 1083 | if (req->pq->user_mm) { |
| 1084 | if (current->flags & PF_KTHREAD) |
| 1085 | unuse_mm(req->pq->user_mm); |
| 1086 | mmput(req->pq->user_mm); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1087 | } |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1088 | |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1089 | kfree(iovec->pages); |
| 1090 | iovec->pages = NULL; |
| 1091 | iovec->npages = 0; |
| 1092 | iovec->offset = 0; |
| 1093 | } |
| 1094 | |
| 1095 | static int check_header_template(struct user_sdma_request *req, |
| 1096 | struct hfi1_pkt_header *hdr, u32 lrhlen, |
| 1097 | u32 datalen) |
| 1098 | { |
| 1099 | /* |
| 1100 | * Perform safety checks for any type of packet: |
| 1101 | * - transfer size is multiple of 64bytes |
| 1102 | * - packet length is multiple of 4bytes |
| 1103 | * - entire request length is multiple of 4bytes |
| 1104 | * - packet length is not larger than MTU size |
| 1105 | * |
| 1106 | * These checks are only done for the first packet of the |
| 1107 | * transfer since the header is "given" to us by user space. |
| 1108 | * For the remainder of the packets we compute the values. |
| 1109 | */ |
| 1110 | if (req->info.fragsize % PIO_BLOCK_SIZE || |
| 1111 | lrhlen & 0x3 || req->data_len & 0x3 || |
| 1112 | lrhlen > get_lrh_len(*hdr, req->info.fragsize)) |
| 1113 | return -EINVAL; |
| 1114 | |
| 1115 | if (req_opcode(req->info.ctrl) == EXPECTED) { |
| 1116 | /* |
| 1117 | * The header is checked only on the first packet. Furthermore, |
| 1118 | * we ensure that at least one TID entry is copied when the |
| 1119 | * request is submitted. Therefore, we don't have to verify that |
| 1120 | * tididx points to something sane. |
| 1121 | */ |
| 1122 | u32 tidval = req->tids[req->tididx], |
| 1123 | tidlen = EXP_TID_GET(tidval, LEN) * PAGE_SIZE, |
| 1124 | tididx = EXP_TID_GET(tidval, IDX), |
| 1125 | tidctrl = EXP_TID_GET(tidval, CTRL), |
| 1126 | tidoff; |
| 1127 | __le32 kval = hdr->kdeth.ver_tid_offset; |
| 1128 | |
| 1129 | tidoff = KDETH_GET(kval, OFFSET) * |
| 1130 | (KDETH_GET(req->hdr.kdeth.ver_tid_offset, OM) ? |
| 1131 | KDETH_OM_LARGE : KDETH_OM_SMALL); |
| 1132 | /* |
| 1133 | * Expected receive packets have the following |
| 1134 | * additional checks: |
| 1135 | * - offset is not larger than the TID size |
| 1136 | * - TIDCtrl values match between header and TID array |
| 1137 | * - TID indexes match between header and TID array |
| 1138 | */ |
| 1139 | if ((tidoff + datalen > tidlen) || |
| 1140 | KDETH_GET(kval, TIDCTRL) != tidctrl || |
| 1141 | KDETH_GET(kval, TID) != tididx) |
| 1142 | return -EINVAL; |
| 1143 | } |
| 1144 | return 0; |
| 1145 | } |
| 1146 | |
| 1147 | /* |
| 1148 | * Correctly set the BTH.PSN field based on type of |
| 1149 | * transfer - eager packets can just increment the PSN but |
| 1150 | * expected packets encode generation and sequence in the |
| 1151 | * BTH.PSN field so just incrementing will result in errors. |
| 1152 | */ |
| 1153 | static inline u32 set_pkt_bth_psn(__be32 bthpsn, u8 expct, u32 frags) |
| 1154 | { |
| 1155 | u32 val = be32_to_cpu(bthpsn), |
| 1156 | mask = (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffffull : |
| 1157 | 0xffffffull), |
| 1158 | psn = val & mask; |
| 1159 | if (expct) |
| 1160 | psn = (psn & ~BTH_SEQ_MASK) | ((psn + frags) & BTH_SEQ_MASK); |
| 1161 | else |
| 1162 | psn = psn + frags; |
| 1163 | return psn & mask; |
| 1164 | } |
| 1165 | |
| 1166 | static int set_txreq_header(struct user_sdma_request *req, |
| 1167 | struct user_sdma_txreq *tx, u32 datalen) |
| 1168 | { |
| 1169 | struct hfi1_user_sdma_pkt_q *pq = req->pq; |
| 1170 | struct hfi1_pkt_header *hdr = &tx->hdr; |
| 1171 | u16 pbclen; |
| 1172 | int ret; |
| 1173 | u32 tidval = 0, lrhlen = get_lrh_len(*hdr, datalen); |
| 1174 | |
| 1175 | /* Copy the header template to the request before modification */ |
| 1176 | memcpy(hdr, &req->hdr, sizeof(*hdr)); |
| 1177 | |
| 1178 | /* |
| 1179 | * Check if the PBC and LRH length are mismatched. If so |
| 1180 | * adjust both in the header. |
| 1181 | */ |
| 1182 | pbclen = le16_to_cpu(hdr->pbc[0]); |
| 1183 | if (PBC2LRH(pbclen) != lrhlen) { |
| 1184 | pbclen = (pbclen & 0xf000) | LRH2PBC(lrhlen); |
| 1185 | hdr->pbc[0] = cpu_to_le16(pbclen); |
| 1186 | hdr->lrh[2] = cpu_to_be16(lrhlen >> 2); |
| 1187 | /* |
| 1188 | * Third packet |
| 1189 | * This is the first packet in the sequence that has |
| 1190 | * a "static" size that can be used for the rest of |
| 1191 | * the packets (besides the last one). |
| 1192 | */ |
| 1193 | if (unlikely(req->seqnum == 2)) { |
| 1194 | /* |
| 1195 | * From this point on the lengths in both the |
| 1196 | * PBC and LRH are the same until the last |
| 1197 | * packet. |
| 1198 | * Adjust the template so we don't have to update |
| 1199 | * every packet |
| 1200 | */ |
| 1201 | req->hdr.pbc[0] = hdr->pbc[0]; |
| 1202 | req->hdr.lrh[2] = hdr->lrh[2]; |
| 1203 | } |
| 1204 | } |
| 1205 | /* |
| 1206 | * We only have to modify the header if this is not the |
| 1207 | * first packet in the request. Otherwise, we use the |
| 1208 | * header given to us. |
| 1209 | */ |
| 1210 | if (unlikely(!req->seqnum)) { |
| 1211 | ret = check_header_template(req, hdr, lrhlen, datalen); |
| 1212 | if (ret) |
| 1213 | return ret; |
| 1214 | goto done; |
| 1215 | |
| 1216 | } |
| 1217 | |
| 1218 | hdr->bth[2] = cpu_to_be32( |
| 1219 | set_pkt_bth_psn(hdr->bth[2], |
| 1220 | (req_opcode(req->info.ctrl) == EXPECTED), |
| 1221 | req->seqnum)); |
| 1222 | |
| 1223 | /* Set ACK request on last packet */ |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 1224 | if (unlikely(tx->flags & TXREQ_FLAGS_REQ_LAST_PKT)) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1225 | hdr->bth[2] |= cpu_to_be32(1UL<<31); |
| 1226 | |
| 1227 | /* Set the new offset */ |
| 1228 | hdr->kdeth.swdata[6] = cpu_to_le32(req->koffset); |
| 1229 | /* Expected packets have to fill in the new TID information */ |
| 1230 | if (req_opcode(req->info.ctrl) == EXPECTED) { |
| 1231 | tidval = req->tids[req->tididx]; |
| 1232 | /* |
| 1233 | * If the offset puts us at the end of the current TID, |
| 1234 | * advance everything. |
| 1235 | */ |
| 1236 | if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) * |
| 1237 | PAGE_SIZE)) { |
| 1238 | req->tidoffset = 0; |
| 1239 | /* Since we don't copy all the TIDs, all at once, |
| 1240 | * we have to check again. */ |
| 1241 | if (++req->tididx > req->n_tids - 1 || |
| 1242 | !req->tids[req->tididx]) { |
| 1243 | return -EINVAL; |
| 1244 | } |
| 1245 | tidval = req->tids[req->tididx]; |
| 1246 | } |
| 1247 | req->omfactor = EXP_TID_GET(tidval, LEN) * PAGE_SIZE >= |
| 1248 | KDETH_OM_MAX_SIZE ? KDETH_OM_LARGE : KDETH_OM_SMALL; |
| 1249 | /* Set KDETH.TIDCtrl based on value for this TID. */ |
| 1250 | KDETH_SET(hdr->kdeth.ver_tid_offset, TIDCTRL, |
| 1251 | EXP_TID_GET(tidval, CTRL)); |
| 1252 | /* Set KDETH.TID based on value for this TID */ |
| 1253 | KDETH_SET(hdr->kdeth.ver_tid_offset, TID, |
| 1254 | EXP_TID_GET(tidval, IDX)); |
| 1255 | /* Clear KDETH.SH only on the last packet */ |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 1256 | if (unlikely(tx->flags & TXREQ_FLAGS_REQ_LAST_PKT)) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1257 | KDETH_SET(hdr->kdeth.ver_tid_offset, SH, 0); |
| 1258 | /* |
| 1259 | * Set the KDETH.OFFSET and KDETH.OM based on size of |
| 1260 | * transfer. |
| 1261 | */ |
| 1262 | SDMA_DBG(req, "TID offset %ubytes %uunits om%u", |
| 1263 | req->tidoffset, req->tidoffset / req->omfactor, |
| 1264 | !!(req->omfactor - KDETH_OM_SMALL)); |
| 1265 | KDETH_SET(hdr->kdeth.ver_tid_offset, OFFSET, |
| 1266 | req->tidoffset / req->omfactor); |
| 1267 | KDETH_SET(hdr->kdeth.ver_tid_offset, OM, |
| 1268 | !!(req->omfactor - KDETH_OM_SMALL)); |
| 1269 | } |
| 1270 | done: |
| 1271 | trace_hfi1_sdma_user_header(pq->dd, pq->ctxt, pq->subctxt, |
| 1272 | req->info.comp_idx, hdr, tidval); |
| 1273 | return sdma_txadd_kvaddr(pq->dd, &tx->txreq, hdr, sizeof(*hdr)); |
| 1274 | } |
| 1275 | |
| 1276 | static int set_txreq_header_ahg(struct user_sdma_request *req, |
| 1277 | struct user_sdma_txreq *tx, u32 len) |
| 1278 | { |
| 1279 | int diff = 0; |
| 1280 | struct hfi1_user_sdma_pkt_q *pq = req->pq; |
| 1281 | struct hfi1_pkt_header *hdr = &req->hdr; |
| 1282 | u16 pbclen = le16_to_cpu(hdr->pbc[0]); |
| 1283 | u32 val32, tidval = 0, lrhlen = get_lrh_len(*hdr, len); |
| 1284 | |
| 1285 | if (PBC2LRH(pbclen) != lrhlen) { |
| 1286 | /* PBC.PbcLengthDWs */ |
| 1287 | AHG_HEADER_SET(req->ahg, diff, 0, 0, 12, |
| 1288 | cpu_to_le16(LRH2PBC(lrhlen))); |
| 1289 | /* LRH.PktLen (we need the full 16 bits due to byte swap) */ |
| 1290 | AHG_HEADER_SET(req->ahg, diff, 3, 0, 16, |
| 1291 | cpu_to_be16(lrhlen >> 2)); |
| 1292 | } |
| 1293 | |
| 1294 | /* |
| 1295 | * Do the common updates |
| 1296 | */ |
| 1297 | /* BTH.PSN and BTH.A */ |
| 1298 | val32 = (be32_to_cpu(hdr->bth[2]) + req->seqnum) & |
| 1299 | (HFI1_CAP_IS_KSET(EXTENDED_PSN) ? 0x7fffffff : 0xffffff); |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 1300 | if (unlikely(tx->flags & TXREQ_FLAGS_REQ_LAST_PKT)) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1301 | val32 |= 1UL << 31; |
| 1302 | AHG_HEADER_SET(req->ahg, diff, 6, 0, 16, cpu_to_be16(val32 >> 16)); |
| 1303 | AHG_HEADER_SET(req->ahg, diff, 6, 16, 16, cpu_to_be16(val32 & 0xffff)); |
| 1304 | /* KDETH.Offset */ |
| 1305 | AHG_HEADER_SET(req->ahg, diff, 15, 0, 16, |
| 1306 | cpu_to_le16(req->koffset & 0xffff)); |
| 1307 | AHG_HEADER_SET(req->ahg, diff, 15, 16, 16, |
| 1308 | cpu_to_le16(req->koffset >> 16)); |
| 1309 | if (req_opcode(req->info.ctrl) == EXPECTED) { |
| 1310 | __le16 val; |
| 1311 | |
| 1312 | tidval = req->tids[req->tididx]; |
| 1313 | |
| 1314 | /* |
| 1315 | * If the offset puts us at the end of the current TID, |
| 1316 | * advance everything. |
| 1317 | */ |
| 1318 | if ((req->tidoffset) == (EXP_TID_GET(tidval, LEN) * |
| 1319 | PAGE_SIZE)) { |
| 1320 | req->tidoffset = 0; |
| 1321 | /* Since we don't copy all the TIDs, all at once, |
| 1322 | * we have to check again. */ |
| 1323 | if (++req->tididx > req->n_tids - 1 || |
| 1324 | !req->tids[req->tididx]) { |
| 1325 | return -EINVAL; |
| 1326 | } |
| 1327 | tidval = req->tids[req->tididx]; |
| 1328 | } |
| 1329 | req->omfactor = ((EXP_TID_GET(tidval, LEN) * |
| 1330 | PAGE_SIZE) >= |
| 1331 | KDETH_OM_MAX_SIZE) ? KDETH_OM_LARGE : |
| 1332 | KDETH_OM_SMALL; |
| 1333 | /* KDETH.OM and KDETH.OFFSET (TID) */ |
| 1334 | AHG_HEADER_SET(req->ahg, diff, 7, 0, 16, |
| 1335 | ((!!(req->omfactor - KDETH_OM_SMALL)) << 15 | |
| 1336 | ((req->tidoffset / req->omfactor) & 0x7fff))); |
| 1337 | /* KDETH.TIDCtrl, KDETH.TID */ |
| 1338 | val = cpu_to_le16(((EXP_TID_GET(tidval, CTRL) & 0x3) << 10) | |
| 1339 | (EXP_TID_GET(tidval, IDX) & 0x3ff)); |
| 1340 | /* Clear KDETH.SH on last packet */ |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 1341 | if (unlikely(tx->flags & TXREQ_FLAGS_REQ_LAST_PKT)) { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1342 | val |= cpu_to_le16(KDETH_GET(hdr->kdeth.ver_tid_offset, |
| 1343 | INTR) >> 16); |
| 1344 | val &= cpu_to_le16(~(1U << 13)); |
| 1345 | AHG_HEADER_SET(req->ahg, diff, 7, 16, 14, val); |
| 1346 | } else |
| 1347 | AHG_HEADER_SET(req->ahg, diff, 7, 16, 12, val); |
| 1348 | } |
| 1349 | |
| 1350 | trace_hfi1_sdma_user_header_ahg(pq->dd, pq->ctxt, pq->subctxt, |
| 1351 | req->info.comp_idx, req->sde->this_idx, |
| 1352 | req->ahg_idx, req->ahg, diff, tidval); |
| 1353 | return diff; |
| 1354 | } |
| 1355 | |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1356 | /* |
| 1357 | * SDMA tx request completion callback. Called when the SDMA progress |
| 1358 | * state machine gets notification that the SDMA descriptors for this |
| 1359 | * tx request have been processed by the DMA engine. Called in |
| 1360 | * interrupt context. |
| 1361 | */ |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1362 | static void user_sdma_txreq_cb(struct sdma_txreq *txreq, int status, |
| 1363 | int drain) |
| 1364 | { |
| 1365 | struct user_sdma_txreq *tx = |
| 1366 | container_of(txreq, struct user_sdma_txreq, txreq); |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1367 | struct user_sdma_request *req; |
| 1368 | bool defer; |
| 1369 | int i; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1370 | |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1371 | if (!tx->req) |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1372 | return; |
| 1373 | |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1374 | req = tx->req; |
| 1375 | /* |
| 1376 | * If this is the callback for the last packet of the request, |
| 1377 | * queue up the request for clean up. |
| 1378 | */ |
| 1379 | defer = (tx->seqnum == req->info.npkts - 1); |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 1380 | |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1381 | /* |
| 1382 | * If we have any io vectors associated with this txreq, |
| 1383 | * check whether they need to be 'freed'. We can't free them |
| 1384 | * here because the unpin function needs to be able to sleep. |
| 1385 | */ |
| 1386 | for (i = tx->idx; i >= 0; i--) { |
| 1387 | if (tx->iovecs[i].flags & TXREQ_FLAGS_IOVEC_LAST_PKT) { |
| 1388 | defer = true; |
| 1389 | break; |
Mitko Haralanov | b9fb631 | 2015-10-26 10:28:37 -0400 | [diff] [blame] | 1390 | } |
| 1391 | } |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1392 | |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1393 | req->status = status; |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1394 | if (status != SDMA_TXREQ_S_OK) { |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1395 | SDMA_DBG(req, "SDMA completion with error %d", |
| 1396 | status); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1397 | set_bit(SDMA_REQ_HAS_ERROR, &req->flags); |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1398 | defer = true; |
| 1399 | } |
| 1400 | |
| 1401 | /* |
| 1402 | * Defer the clean up of the iovectors and the request until later |
| 1403 | * so it can be done outside of interrupt context. |
| 1404 | */ |
| 1405 | if (defer) { |
| 1406 | spin_lock(&req->txcmp_lock); |
| 1407 | list_add_tail(&tx->list, &req->txcmp); |
| 1408 | spin_unlock(&req->txcmp_lock); |
| 1409 | schedule_work(&req->worker); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1410 | } else { |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1411 | kmem_cache_free(req->pq->txreq_cache, tx); |
| 1412 | } |
| 1413 | } |
| 1414 | |
| 1415 | static void user_sdma_delayed_completion(struct work_struct *work) |
| 1416 | { |
| 1417 | struct user_sdma_request *req = |
| 1418 | container_of(work, struct user_sdma_request, worker); |
| 1419 | struct hfi1_user_sdma_pkt_q *pq = req->pq; |
| 1420 | struct user_sdma_txreq *tx = NULL; |
| 1421 | unsigned long flags; |
| 1422 | u64 seqnum; |
| 1423 | int i; |
| 1424 | |
| 1425 | while (1) { |
| 1426 | spin_lock_irqsave(&req->txcmp_lock, flags); |
| 1427 | if (!list_empty(&req->txcmp)) { |
| 1428 | tx = list_first_entry(&req->txcmp, |
| 1429 | struct user_sdma_txreq, list); |
| 1430 | list_del(&tx->list); |
| 1431 | } |
| 1432 | spin_unlock_irqrestore(&req->txcmp_lock, flags); |
| 1433 | if (!tx) |
| 1434 | break; |
| 1435 | |
| 1436 | for (i = tx->idx; i >= 0; i--) |
| 1437 | if (tx->iovecs[i].flags & TXREQ_FLAGS_IOVEC_LAST_PKT) |
| 1438 | unpin_vector_pages(req, tx->iovecs[i].vec); |
| 1439 | |
| 1440 | seqnum = tx->seqnum; |
| 1441 | kmem_cache_free(pq->txreq_cache, tx); |
| 1442 | tx = NULL; |
| 1443 | |
| 1444 | if (req->status != SDMA_TXREQ_S_OK) { |
| 1445 | if (seqnum == ACCESS_ONCE(req->seqnum) && |
| 1446 | test_bit(SDMA_REQ_DONE_ERROR, &req->flags)) { |
| 1447 | atomic_dec(&pq->n_reqs); |
| 1448 | set_comp_state(req, ERROR, req->status); |
| 1449 | user_sdma_free_request(req); |
| 1450 | break; |
| 1451 | } |
| 1452 | } else { |
| 1453 | if (seqnum == req->info.npkts - 1) { |
| 1454 | atomic_dec(&pq->n_reqs); |
| 1455 | set_comp_state(req, COMPLETE, 0); |
| 1456 | user_sdma_free_request(req); |
| 1457 | break; |
| 1458 | } |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1459 | } |
| 1460 | } |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1461 | |
| 1462 | if (!atomic_read(&pq->n_reqs)) { |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1463 | xchg(&pq->state, SDMA_PKT_Q_INACTIVE); |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1464 | wake_up(&pq->wait); |
| 1465 | } |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1466 | } |
| 1467 | |
| 1468 | static void user_sdma_free_request(struct user_sdma_request *req) |
| 1469 | { |
| 1470 | if (!list_empty(&req->txps)) { |
| 1471 | struct sdma_txreq *t, *p; |
| 1472 | |
| 1473 | list_for_each_entry_safe(t, p, &req->txps, list) { |
| 1474 | struct user_sdma_txreq *tx = |
| 1475 | container_of(t, struct user_sdma_txreq, txreq); |
| 1476 | list_del_init(&t->list); |
| 1477 | sdma_txclean(req->pq->dd, t); |
| 1478 | kmem_cache_free(req->pq->txreq_cache, tx); |
| 1479 | } |
| 1480 | } |
| 1481 | if (req->data_iovs) { |
| 1482 | int i; |
| 1483 | |
| 1484 | for (i = 0; i < req->data_iovs; i++) |
| 1485 | if (req->iovs[i].npages && req->iovs[i].pages) |
Mitko Haralanov | a0d4069 | 2015-12-08 17:10:13 -0500 | [diff] [blame] | 1486 | unpin_vector_pages(req, &req->iovs[i]); |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1487 | } |
Mike Marciniszyn | 7724105 | 2015-07-30 15:17:43 -0400 | [diff] [blame] | 1488 | kfree(req->tids); |
| 1489 | clear_bit(SDMA_REQ_IN_USE, &req->flags); |
| 1490 | } |
| 1491 | |
| 1492 | static inline void set_comp_state(struct user_sdma_request *req, |
| 1493 | enum hfi1_sdma_comp_state state, |
| 1494 | int ret) |
| 1495 | { |
| 1496 | SDMA_DBG(req, "Setting completion status %u %d", state, ret); |
| 1497 | req->cq->comps[req->info.comp_idx].status = state; |
| 1498 | if (state == ERROR) |
| 1499 | req->cq->comps[req->info.comp_idx].errcode = -ret; |
| 1500 | trace_hfi1_sdma_user_completion(req->pq->dd, req->pq->ctxt, |
| 1501 | req->pq->subctxt, req->info.comp_idx, |
| 1502 | state, ret); |
| 1503 | } |