Umang Chheda | 599b096 | 2020-01-20 17:15:54 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2018, 2020, The Linux Foundation. All rights reserved. |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
Fenglin Wu | 22e4cf1 | 2018-08-01 15:07:28 +0800 | [diff] [blame] | 13 | #include <linux/debugfs.h> |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 14 | #include <linux/device.h> |
| 15 | #include <linux/err.h> |
Fenglin Wu | 22e4cf1 | 2018-08-01 15:07:28 +0800 | [diff] [blame] | 16 | #include <linux/fs.h> |
Fenglin Wu | 30f10b2 | 2018-06-15 07:49:23 +0800 | [diff] [blame] | 17 | #include <linux/hrtimer.h> |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 18 | #include <linux/init.h> |
| 19 | #include <linux/input.h> |
| 20 | #include <linux/interrupt.h> |
| 21 | #include <linux/kernel.h> |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/of.h> |
| 24 | #include <linux/of_address.h> |
| 25 | #include <linux/platform_device.h> |
| 26 | #include <linux/pwm.h> |
Umang Chheda | 599b096 | 2020-01-20 17:15:54 +0530 | [diff] [blame] | 27 | #include <linux/qpnp/qpnp-misc.h> |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 28 | #include <linux/regmap.h> |
| 29 | #include <linux/regulator/consumer.h> |
Fenglin Wu | 22e4cf1 | 2018-08-01 15:07:28 +0800 | [diff] [blame] | 30 | #include <linux/slab.h> |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 31 | #include <linux/types.h> |
Fenglin Wu | 22e4cf1 | 2018-08-01 15:07:28 +0800 | [diff] [blame] | 32 | #include <linux/uaccess.h> |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 33 | |
| 34 | enum actutor_type { |
| 35 | ACT_LRA, |
| 36 | ACT_ERM, |
| 37 | }; |
| 38 | |
| 39 | enum lra_res_sig_shape { |
| 40 | RES_SIG_SINE, |
| 41 | RES_SIG_SQUARE, |
| 42 | }; |
| 43 | |
| 44 | enum lra_auto_res_mode { |
| 45 | AUTO_RES_MODE_ZXD, |
| 46 | AUTO_RES_MODE_QWD, |
| 47 | }; |
| 48 | |
| 49 | enum wf_src { |
| 50 | INT_WF_VMAX, |
| 51 | INT_WF_BUFFER, |
| 52 | EXT_WF_AUDIO, |
| 53 | EXT_WF_PWM, |
| 54 | }; |
| 55 | |
| 56 | enum haptics_custom_effect_param { |
| 57 | CUSTOM_DATA_EFFECT_IDX, |
| 58 | CUSTOM_DATA_TIMEOUT_SEC_IDX, |
| 59 | CUSTOM_DATA_TIMEOUT_MSEC_IDX, |
| 60 | CUSTOM_DATA_LEN, |
| 61 | }; |
| 62 | |
| 63 | /* common definitions */ |
| 64 | #define HAP_BRAKE_PATTERN_MAX 4 |
| 65 | #define HAP_WAVEFORM_BUFFER_MAX 8 |
| 66 | #define HAP_VMAX_MV_DEFAULT 1800 |
| 67 | #define HAP_VMAX_MV_MAX 3596 |
| 68 | #define HAP_ILIM_MA_DEFAULT 400 |
| 69 | #define HAP_ILIM_MA_MAX 800 |
| 70 | #define HAP_PLAY_RATE_US_DEFAULT 5715 |
| 71 | #define HAP_PLAY_RATE_US_MAX 20475 |
| 72 | #define HAP_PLAY_RATE_US_LSB 5 |
| 73 | #define VMAX_MIN_PLAY_TIME_US 20000 |
| 74 | #define HAP_SC_DET_MAX_COUNT 5 |
| 75 | #define HAP_SC_DET_TIME_US 1000000 |
| 76 | #define FF_EFFECT_COUNT_MAX 32 |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 77 | #define HAP_DISABLE_DELAY_USEC 1000 |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 78 | |
| 79 | /* haptics module register definitions */ |
| 80 | #define REG_HAP_STATUS1 0x0A |
| 81 | #define HAP_SC_DET_BIT BIT(3) |
| 82 | #define HAP_BUSY_BIT BIT(1) |
| 83 | |
| 84 | #define REG_HAP_EN_CTL1 0x46 |
| 85 | #define HAP_EN_BIT BIT(7) |
| 86 | |
| 87 | #define REG_HAP_EN_CTL2 0x48 |
| 88 | #define HAP_AUTO_STANDBY_EN_BIT BIT(1) |
| 89 | #define HAP_BRAKE_EN_BIT BIT(0) |
| 90 | |
| 91 | #define REG_HAP_EN_CTL3 0x4A |
| 92 | #define HAP_HBRIDGE_EN_BIT BIT(7) |
| 93 | #define HAP_PWM_SIGNAL_EN_BIT BIT(6) |
| 94 | #define HAP_ILIM_EN_BIT BIT(5) |
| 95 | #define HAP_ILIM_CC_EN_BIT BIT(4) |
| 96 | #define HAP_AUTO_RES_RBIAS_EN_BIT BIT(3) |
| 97 | #define HAP_DAC_EN_BIT BIT(2) |
| 98 | #define HAP_ZX_HYST_EN_BIT BIT(1) |
| 99 | #define HAP_PWM_CTL_EN_BIT BIT(0) |
| 100 | |
| 101 | #define REG_HAP_AUTO_RES_CTRL 0x4B |
| 102 | #define HAP_AUTO_RES_EN_BIT BIT(7) |
| 103 | #define HAP_SEL_AUTO_RES_PERIOD BIT(6) |
| 104 | #define HAP_AUTO_RES_CNT_ERR_DELTA_MASK GENMASK(5, 4) |
| 105 | #define HAP_AUTO_RES_CNT_ERR_DELTA_SHIFT 4 |
| 106 | #define HAP_AUTO_RES_ERR_RECOVERY_BIT BIT(3) |
| 107 | #define HAP_AUTO_RES_EN_DLY_MASK GENMASK(2, 0) |
| 108 | #define AUTO_RES_CNT_ERR_DELTA(x) (x << HAP_AUTO_RES_CNT_ERR_DELTA_SHIFT) |
| 109 | #define AUTO_RES_EN_DLY(x) x |
| 110 | |
| 111 | #define REG_HAP_CFG1 0x4C |
| 112 | #define REG_HAP_CFG2 0x4D |
| 113 | #define HAP_LRA_RES_TYPE_BIT BIT(0) |
| 114 | |
| 115 | #define REG_HAP_SEL 0x4E |
| 116 | #define HAP_WF_SOURCE_MASK GENMASK(5, 4) |
| 117 | #define HAP_WF_SOURCE_SHIFT 4 |
| 118 | #define HAP_WF_TRIGGER_BIT BIT(0) |
| 119 | #define HAP_WF_SOURCE_VMAX (0 << HAP_WF_SOURCE_SHIFT) |
| 120 | #define HAP_WF_SOURCE_BUFFER (1 << HAP_WF_SOURCE_SHIFT) |
| 121 | #define HAP_WF_SOURCE_AUDIO (2 << HAP_WF_SOURCE_SHIFT) |
| 122 | #define HAP_WF_SOURCE_PWM (3 << HAP_WF_SOURCE_SHIFT) |
| 123 | |
| 124 | #define REG_HAP_AUTO_RES_CFG 0x4F |
| 125 | #define HAP_AUTO_RES_MODE_BIT BIT(7) |
| 126 | #define HAP_AUTO_RES_MODE_SHIFT 7 |
| 127 | #define HAP_AUTO_RES_CAL_DURATON_MASK GENMASK(6, 5) |
| 128 | #define HAP_CAL_EOP_EN_BIT BIT(3) |
| 129 | #define HAP_CAL_PERIOD_MASK GENMASK(2, 0) |
| 130 | #define HAP_CAL_OPT3_EVERY_8_PERIOD 2 |
| 131 | |
| 132 | #define REG_HAP_SLEW_CFG 0x50 |
| 133 | #define REG_HAP_VMAX_CFG 0x51 |
| 134 | #define HAP_VMAX_SIGN_BIT BIT(7) |
| 135 | #define HAP_VMAX_OVD_BIT BIT(6) |
| 136 | #define HAP_VMAX_MV_MASK GENMASK(5, 1) |
| 137 | #define HAP_VMAX_MV_SHIFT 1 |
| 138 | #define HAP_VMAX_MV_LSB 116 |
| 139 | |
| 140 | #define REG_HAP_ILIM_CFG 0x52 |
| 141 | #define REG_HAP_SC_DEB_CFG 0x53 |
| 142 | #define REG_HAP_RATE_CFG1 0x54 |
| 143 | #define REG_HAP_RATE_CFG2 0x55 |
| 144 | #define REG_HAP_INTERNAL_PWM 0x56 |
| 145 | #define REG_HAP_EXTERNAL_PWM 0x57 |
| 146 | #define REG_HAP_PWM 0x58 |
| 147 | |
| 148 | #define REG_HAP_SC_CLR 0x59 |
| 149 | #define HAP_SC_CLR_BIT BIT(0) |
| 150 | |
| 151 | #define REG_HAP_ZX_CFG 0x5A |
| 152 | #define HAP_ZX_DET_DEB_MASK GENMASK(2, 0) |
| 153 | #define ZX_DET_DEB_10US 0 |
| 154 | #define ZX_DET_DEB_20US 1 |
| 155 | #define ZX_DET_DEB_40US 2 |
| 156 | #define ZX_DET_DEB_80US 3 |
| 157 | |
| 158 | #define REG_HAP_BRAKE 0x5C |
| 159 | #define HAP_BRAKE_PATTERN_MASK 0x3 |
| 160 | #define HAP_BRAKE_PATTERN_SHIFT 2 |
| 161 | |
| 162 | #define REG_HAP_WF_REPEAT 0x5E |
| 163 | #define HAP_WF_REPEAT_MASK GENMASK(6, 4) |
| 164 | #define HAP_WF_REPEAT_SHIFT 4 |
| 165 | #define HAP_WF_S_REPEAT_MASK GENMASK(1, 0) |
| 166 | |
| 167 | #define REG_HAP_WF_S1 0x60 |
| 168 | #define HAP_WF_SIGN_BIT BIT(7) |
| 169 | #define HAP_WF_OVD_BIT BIT(6) |
| 170 | #define HAP_WF_AMP_BIT GENMASK(5, 1) |
| 171 | #define HAP_WF_AMP_SHIFT 1 |
| 172 | |
| 173 | #define REG_HAP_PLAY 0x70 |
| 174 | #define HAP_PLAY_BIT BIT(7) |
| 175 | |
| 176 | #define REG_HAP_SEC_ACCESS 0xD0 |
Umang Chheda | 599b096 | 2020-01-20 17:15:54 +0530 | [diff] [blame] | 177 | #define REG_HAP_PERPH_RESET_CTL3 0xDA |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 178 | |
| 179 | struct qti_hap_effect { |
| 180 | int id; |
| 181 | u8 *pattern; |
| 182 | int pattern_length; |
| 183 | u16 play_rate_us; |
Fenglin Wu | 659c004 | 2018-07-18 11:02:43 +0800 | [diff] [blame] | 184 | u16 vmax_mv; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 185 | u8 wf_repeat_n; |
| 186 | u8 wf_s_repeat_n; |
Fenglin Wu | cf1a1b9 | 2018-06-11 07:39:44 +0800 | [diff] [blame] | 187 | u8 brake[HAP_BRAKE_PATTERN_MAX]; |
| 188 | int brake_pattern_length; |
| 189 | bool brake_en; |
| 190 | bool lra_auto_res_disable; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 191 | }; |
| 192 | |
| 193 | struct qti_hap_play_info { |
| 194 | struct qti_hap_effect *effect; |
| 195 | u16 vmax_mv; |
| 196 | int length_us; |
| 197 | int playing_pos; |
| 198 | bool playing_pattern; |
| 199 | }; |
| 200 | |
| 201 | struct qti_hap_config { |
| 202 | enum actutor_type act_type; |
| 203 | enum lra_res_sig_shape lra_shape; |
| 204 | enum lra_auto_res_mode lra_auto_res_mode; |
| 205 | enum wf_src ext_src; |
| 206 | u16 vmax_mv; |
| 207 | u16 ilim_ma; |
| 208 | u16 play_rate_us; |
Fenglin Wu | cf1a1b9 | 2018-06-11 07:39:44 +0800 | [diff] [blame] | 209 | bool lra_allow_variable_play_rate; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 210 | bool use_ext_wf_src; |
| 211 | }; |
| 212 | |
| 213 | struct qti_hap_chip { |
| 214 | struct platform_device *pdev; |
| 215 | struct device *dev; |
| 216 | struct regmap *regmap; |
| 217 | struct input_dev *input_dev; |
| 218 | struct pwm_device *pwm_dev; |
| 219 | struct qti_hap_config config; |
| 220 | struct qti_hap_play_info play; |
| 221 | struct qti_hap_effect *predefined; |
| 222 | struct qti_hap_effect constant; |
| 223 | struct regulator *vdd_supply; |
Fenglin Wu | 30f10b2 | 2018-06-15 07:49:23 +0800 | [diff] [blame] | 224 | struct hrtimer stop_timer; |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 225 | struct hrtimer hap_disable_timer; |
Fenglin Wu | 22e4cf1 | 2018-08-01 15:07:28 +0800 | [diff] [blame] | 226 | struct dentry *hap_debugfs; |
Umang Chheda | 599b096 | 2020-01-20 17:15:54 +0530 | [diff] [blame] | 227 | struct notifier_block twm_nb; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 228 | spinlock_t bus_lock; |
| 229 | ktime_t last_sc_time; |
| 230 | int play_irq; |
| 231 | int sc_irq; |
| 232 | int effects_count; |
| 233 | int sc_det_count; |
| 234 | u16 reg_base; |
| 235 | bool perm_disable; |
| 236 | bool play_irq_en; |
| 237 | bool vdd_enabled; |
Umang Chheda | 599b096 | 2020-01-20 17:15:54 +0530 | [diff] [blame] | 238 | bool twm_state; |
| 239 | bool haptics_ext_pin_twm; |
| 240 | }; |
| 241 | |
| 242 | struct hap_addr_val { |
| 243 | u16 addr; |
| 244 | u8 value; |
| 245 | }; |
| 246 | |
| 247 | static struct hap_addr_val twm_ext_cfg[] = { |
| 248 | {REG_HAP_PLAY, 0x00}, /* Stop playing haptics waveform */ |
| 249 | {REG_HAP_PERPH_RESET_CTL3, 0x0D}, /* Disable SHUTDOWN1_RB reset */ |
| 250 | {REG_HAP_SEL, 0x01}, /* Configure for external-pin mode */ |
| 251 | {REG_HAP_EN_CTL1, 0x80}, /* Enable haptics driver */ |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 252 | }; |
| 253 | |
| 254 | static int wf_repeat[8] = {1, 2, 4, 8, 16, 32, 64, 128}; |
| 255 | static int wf_s_repeat[4] = {1, 2, 4, 8}; |
| 256 | |
| 257 | static inline bool is_secure(u8 addr) |
| 258 | { |
| 259 | return ((addr & 0xFF) > 0xD0); |
| 260 | } |
| 261 | |
| 262 | static int qti_haptics_read(struct qti_hap_chip *chip, |
| 263 | u8 addr, u8 *val, int len) |
| 264 | { |
| 265 | int rc = 0; |
| 266 | unsigned long flags; |
| 267 | |
| 268 | spin_lock_irqsave(&chip->bus_lock, flags); |
| 269 | |
| 270 | rc = regmap_bulk_read(chip->regmap, chip->reg_base + addr, val, len); |
| 271 | if (rc < 0) |
| 272 | dev_err(chip->dev, "Reading addr 0x%x failed, rc=%d\n", |
| 273 | addr, rc); |
| 274 | spin_unlock_irqrestore(&chip->bus_lock, flags); |
| 275 | |
| 276 | return rc; |
| 277 | } |
| 278 | |
| 279 | static int qti_haptics_write(struct qti_hap_chip *chip, |
| 280 | u8 addr, u8 *val, int len) |
| 281 | { |
| 282 | int rc = 0, i; |
| 283 | unsigned long flags; |
| 284 | |
| 285 | spin_lock_irqsave(&chip->bus_lock, flags); |
| 286 | if (is_secure(addr)) { |
| 287 | for (i = 0; i < len; i++) { |
| 288 | rc = regmap_write(chip->regmap, |
| 289 | chip->reg_base + REG_HAP_SEC_ACCESS, |
| 290 | 0xA5); |
| 291 | if (rc < 0) { |
| 292 | dev_err(chip->dev, "write SEC_ACCESS failed, rc=%d\n", |
| 293 | rc); |
| 294 | goto unlock; |
| 295 | } |
| 296 | |
| 297 | rc = regmap_write(chip->regmap, |
| 298 | chip->reg_base + addr + i, val[i]); |
| 299 | if (rc < 0) { |
| 300 | dev_err(chip->dev, "write val 0x%x to addr 0x%x failed, rc=%d\n", |
| 301 | val[i], addr + i, rc); |
| 302 | goto unlock; |
| 303 | } |
| 304 | } |
| 305 | } else { |
| 306 | if (len > 1) |
| 307 | rc = regmap_bulk_write(chip->regmap, |
| 308 | chip->reg_base + addr, val, len); |
| 309 | else |
| 310 | rc = regmap_write(chip->regmap, |
| 311 | chip->reg_base + addr, *val); |
| 312 | |
| 313 | if (rc < 0) |
| 314 | dev_err(chip->dev, "write addr 0x%x failed, rc=%d\n", |
| 315 | addr, rc); |
| 316 | } |
| 317 | |
| 318 | for (i = 0; i < len; i++) |
| 319 | dev_dbg(chip->dev, "Update addr 0x%x to val 0x%x\n", |
| 320 | addr + i, val[i]); |
| 321 | |
| 322 | unlock: |
| 323 | spin_unlock_irqrestore(&chip->bus_lock, flags); |
| 324 | return rc; |
| 325 | } |
| 326 | |
| 327 | static int qti_haptics_masked_write(struct qti_hap_chip *chip, u8 addr, |
| 328 | u8 mask, u8 val) |
| 329 | { |
| 330 | int rc; |
| 331 | unsigned long flags; |
| 332 | |
| 333 | spin_lock_irqsave(&chip->bus_lock, flags); |
| 334 | if (is_secure(addr)) { |
| 335 | rc = regmap_write(chip->regmap, |
| 336 | chip->reg_base + REG_HAP_SEC_ACCESS, |
| 337 | 0xA5); |
| 338 | if (rc < 0) { |
| 339 | dev_err(chip->dev, "write SEC_ACCESS failed, rc=%d\n", |
| 340 | rc); |
| 341 | goto unlock; |
| 342 | } |
| 343 | } |
| 344 | |
| 345 | rc = regmap_update_bits(chip->regmap, chip->reg_base + addr, mask, val); |
| 346 | if (rc < 0) |
| 347 | dev_err(chip->dev, "Update addr 0x%x to val 0x%x with mask 0x%x failed, rc=%d\n", |
| 348 | addr, val, mask, rc); |
| 349 | |
| 350 | dev_dbg(chip->dev, "Update addr 0x%x to val 0x%x with mask 0x%x\n", |
| 351 | addr, val, mask); |
| 352 | unlock: |
| 353 | spin_unlock_irqrestore(&chip->bus_lock, flags); |
| 354 | |
| 355 | return rc; |
| 356 | } |
| 357 | |
| 358 | static void construct_constant_waveform_in_pattern( |
| 359 | struct qti_hap_play_info *play) |
| 360 | { |
| 361 | struct qti_hap_chip *chip = container_of(play, |
| 362 | struct qti_hap_chip, play); |
| 363 | struct qti_hap_config *config = &chip->config; |
| 364 | struct qti_hap_effect *effect = play->effect; |
| 365 | int total_samples, samples, left, magnitude, i, j, k; |
| 366 | int delta = INT_MAX, delta_min = INT_MAX; |
| 367 | |
| 368 | /* Using play_rate_us in config for constant waveform */ |
| 369 | effect->play_rate_us = config->play_rate_us; |
| 370 | total_samples = play->length_us / effect->play_rate_us; |
| 371 | left = play->length_us % effect->play_rate_us; |
| 372 | |
| 373 | if (total_samples <= HAP_WAVEFORM_BUFFER_MAX) { |
| 374 | effect->pattern_length = total_samples; |
| 375 | effect->wf_s_repeat_n = 0; |
| 376 | effect->wf_repeat_n = 0; |
| 377 | } else { |
| 378 | /* |
| 379 | * Find a closest setting to achieve the constant waveform |
| 380 | * with the required length by using buffer waveform source: |
| 381 | * play_length_us = pattern_length * wf_s_repeat_n |
| 382 | * * wf_repeat_n * play_rate_us |
| 383 | */ |
| 384 | for (i = 0; i < ARRAY_SIZE(wf_repeat); i++) { |
| 385 | for (j = 0; j < ARRAY_SIZE(wf_s_repeat); j++) { |
| 386 | for (k = 1; k <= HAP_WAVEFORM_BUFFER_MAX; k++) { |
| 387 | samples = k * wf_s_repeat[j] * |
| 388 | wf_repeat[i]; |
| 389 | delta = abs(total_samples - samples); |
| 390 | if (delta < delta_min) { |
| 391 | delta_min = delta; |
| 392 | effect->pattern_length = k; |
| 393 | effect->wf_s_repeat_n = j; |
| 394 | effect->wf_repeat_n = i; |
| 395 | } |
| 396 | if (samples > total_samples) |
| 397 | break; |
| 398 | } |
| 399 | } |
| 400 | } |
| 401 | } |
| 402 | |
| 403 | if (left > 0 && effect->pattern_length < HAP_WAVEFORM_BUFFER_MAX) |
| 404 | effect->pattern_length++; |
| 405 | |
| 406 | play->length_us = effect->pattern_length * effect->play_rate_us; |
| 407 | dev_dbg(chip->dev, "total_samples = %d, pattern_length = %d, wf_s_repeat = %d, wf_repeat = %d\n", |
| 408 | total_samples, effect->pattern_length, |
| 409 | wf_s_repeat[effect->wf_s_repeat_n], |
| 410 | wf_repeat[effect->wf_repeat_n]); |
| 411 | |
| 412 | for (i = 0; i < effect->pattern_length; i++) { |
| 413 | magnitude = play->vmax_mv / HAP_VMAX_MV_LSB; |
| 414 | effect->pattern[i] = (u8)magnitude << HAP_WF_AMP_SHIFT; |
| 415 | } |
| 416 | } |
| 417 | |
| 418 | static int qti_haptics_config_wf_buffer(struct qti_hap_chip *chip) |
| 419 | { |
| 420 | struct qti_hap_play_info *play = &chip->play; |
| 421 | struct qti_hap_effect *effect = play->effect; |
| 422 | u8 addr, pattern[HAP_WAVEFORM_BUFFER_MAX] = {0}; |
| 423 | int rc = 0; |
| 424 | size_t len; |
| 425 | |
| 426 | if (play->playing_pos == effect->pattern_length) { |
| 427 | dev_dbg(chip->dev, "pattern playing done\n"); |
| 428 | return 0; |
| 429 | } |
| 430 | |
| 431 | if (effect->pattern_length - play->playing_pos |
| 432 | >= HAP_WAVEFORM_BUFFER_MAX) |
| 433 | len = HAP_WAVEFORM_BUFFER_MAX; |
| 434 | else |
| 435 | len = effect->pattern_length - play->playing_pos; |
| 436 | |
| 437 | dev_dbg(chip->dev, "copy %d bytes start from %d\n", |
| 438 | (int)len, play->playing_pos); |
| 439 | memcpy(pattern, &effect->pattern[play->playing_pos], len); |
| 440 | |
| 441 | play->playing_pos += len; |
| 442 | |
| 443 | addr = REG_HAP_WF_S1; |
| 444 | rc = qti_haptics_write(chip, REG_HAP_WF_S1, pattern, |
| 445 | HAP_WAVEFORM_BUFFER_MAX); |
| 446 | if (rc < 0) |
| 447 | dev_err(chip->dev, "Program WF_SAMPLE failed, rc=%d\n", rc); |
| 448 | |
| 449 | return rc; |
| 450 | } |
| 451 | |
| 452 | static int qti_haptics_config_wf_repeat(struct qti_hap_chip *chip) |
| 453 | { |
| 454 | struct qti_hap_effect *effect = chip->play.effect; |
| 455 | u8 addr, mask, val; |
| 456 | int rc = 0; |
| 457 | |
| 458 | addr = REG_HAP_WF_REPEAT; |
| 459 | mask = HAP_WF_REPEAT_MASK | HAP_WF_S_REPEAT_MASK; |
| 460 | val = effect->wf_repeat_n << HAP_WF_REPEAT_SHIFT; |
| 461 | val |= effect->wf_s_repeat_n; |
| 462 | rc = qti_haptics_masked_write(chip, addr, mask, val); |
| 463 | if (rc < 0) |
| 464 | dev_err(chip->dev, "Program WF_REPEAT failed, rc=%d\n", rc); |
| 465 | |
| 466 | return rc; |
| 467 | } |
| 468 | |
| 469 | static int qti_haptics_play(struct qti_hap_chip *chip, bool play) |
| 470 | { |
| 471 | int rc = 0; |
| 472 | u8 val = play ? HAP_PLAY_BIT : 0; |
| 473 | |
| 474 | rc = qti_haptics_write(chip, |
| 475 | REG_HAP_PLAY, &val, 1); |
| 476 | if (rc < 0) |
| 477 | dev_err(chip->dev, "%s playing haptics failed, rc=%d\n", |
| 478 | play ? "start" : "stop", rc); |
| 479 | |
| 480 | return rc; |
| 481 | } |
| 482 | |
| 483 | static int qti_haptics_module_en(struct qti_hap_chip *chip, bool en) |
| 484 | { |
| 485 | int rc = 0; |
| 486 | u8 val = en ? HAP_EN_BIT : 0; |
| 487 | |
| 488 | rc = qti_haptics_write(chip, |
| 489 | REG_HAP_EN_CTL1, &val, 1); |
| 490 | if (rc < 0) |
| 491 | dev_err(chip->dev, "%s haptics failed, rc=%d\n", |
| 492 | en ? "enable" : "disable", rc); |
| 493 | |
| 494 | |
| 495 | return rc; |
| 496 | } |
| 497 | |
| 498 | static int qti_haptics_config_vmax(struct qti_hap_chip *chip, int vmax_mv) |
| 499 | { |
| 500 | u8 addr, mask, val; |
| 501 | int rc; |
| 502 | |
| 503 | addr = REG_HAP_VMAX_CFG; |
| 504 | mask = HAP_VMAX_MV_MASK; |
| 505 | val = (vmax_mv / HAP_VMAX_MV_LSB) << HAP_VMAX_MV_SHIFT; |
| 506 | rc = qti_haptics_masked_write(chip, addr, mask, val); |
| 507 | if (rc < 0) |
| 508 | dev_err(chip->dev, "write VMAX_CFG failed, rc=%d\n", |
| 509 | rc); |
| 510 | |
| 511 | return rc; |
| 512 | } |
| 513 | |
| 514 | static int qti_haptics_config_wf_src(struct qti_hap_chip *chip, |
| 515 | enum wf_src src) |
| 516 | { |
| 517 | u8 addr, mask, val = 0; |
| 518 | int rc; |
| 519 | |
| 520 | addr = REG_HAP_SEL; |
| 521 | mask = HAP_WF_SOURCE_MASK | HAP_WF_TRIGGER_BIT; |
| 522 | val = src << HAP_WF_SOURCE_SHIFT; |
| 523 | if (src == EXT_WF_AUDIO || src == EXT_WF_PWM) |
| 524 | val |= HAP_WF_TRIGGER_BIT; |
| 525 | |
| 526 | rc = qti_haptics_masked_write(chip, addr, mask, val); |
| 527 | if (rc < 0) |
| 528 | dev_err(chip->dev, "set HAP_SEL failed, rc=%d\n", rc); |
| 529 | |
| 530 | return rc; |
| 531 | } |
| 532 | |
| 533 | static int qti_haptics_config_play_rate_us(struct qti_hap_chip *chip, |
| 534 | int play_rate_us) |
| 535 | { |
| 536 | u8 addr, val[2]; |
| 537 | int tmp, rc; |
| 538 | |
| 539 | addr = REG_HAP_RATE_CFG1; |
| 540 | tmp = play_rate_us / HAP_PLAY_RATE_US_LSB; |
| 541 | val[0] = tmp & 0xff; |
| 542 | val[1] = (tmp >> 8) & 0xf; |
| 543 | rc = qti_haptics_write(chip, addr, val, 2); |
| 544 | if (rc < 0) |
| 545 | dev_err(chip->dev, "write play_rate failed, rc=%d\n", rc); |
| 546 | |
| 547 | return rc; |
| 548 | } |
| 549 | |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 550 | static int qti_haptics_brake_enable(struct qti_hap_chip *chip, bool en) |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 551 | { |
| 552 | u8 addr, mask, val; |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 553 | int rc; |
| 554 | |
| 555 | addr = REG_HAP_EN_CTL2; |
| 556 | mask = HAP_BRAKE_EN_BIT; |
| 557 | val = en ? HAP_BRAKE_EN_BIT : 0; |
| 558 | rc = qti_haptics_masked_write(chip, addr, mask, val); |
| 559 | if (rc < 0) |
| 560 | dev_err(chip->dev, "write BRAKE_EN failed, rc=%d\n", rc); |
| 561 | |
| 562 | return rc; |
| 563 | } |
| 564 | |
| 565 | static int qti_haptics_config_brake(struct qti_hap_chip *chip, u8 *brake) |
| 566 | { |
| 567 | u8 addr, val; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 568 | int i, rc; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 569 | |
| 570 | addr = REG_HAP_BRAKE; |
| 571 | for (val = 0, i = 0; i < HAP_BRAKE_PATTERN_MAX; i++) |
| 572 | val |= (brake[i] & HAP_BRAKE_PATTERN_MASK) << |
| 573 | i * HAP_BRAKE_PATTERN_SHIFT; |
| 574 | |
| 575 | rc = qti_haptics_write(chip, addr, &val, 1); |
| 576 | if (rc < 0) { |
| 577 | dev_err(chip->dev, "write brake pattern failed, rc=%d\n", rc); |
| 578 | return rc; |
| 579 | } |
Fenglin Wu | f3907c8 | 2018-07-27 09:06:32 +0800 | [diff] [blame] | 580 | /* |
| 581 | * Set BRAKE_EN regardless of the brake pattern, this helps to stop |
| 582 | * playing immediately once the valid values in WF_Sx are played. |
| 583 | */ |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 584 | rc = qti_haptics_brake_enable(chip, true); |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 585 | |
| 586 | return rc; |
| 587 | } |
| 588 | |
Fenglin Wu | cf1a1b9 | 2018-06-11 07:39:44 +0800 | [diff] [blame] | 589 | static int qti_haptics_lra_auto_res_enable(struct qti_hap_chip *chip, bool en) |
| 590 | { |
| 591 | int rc; |
| 592 | u8 addr, val, mask; |
| 593 | |
| 594 | addr = REG_HAP_AUTO_RES_CTRL; |
| 595 | mask = HAP_AUTO_RES_EN_BIT; |
| 596 | val = en ? HAP_AUTO_RES_EN_BIT : 0; |
| 597 | rc = qti_haptics_masked_write(chip, addr, mask, val); |
| 598 | if (rc < 0) |
| 599 | dev_err(chip->dev, "set AUTO_RES_CTRL failed, rc=%d\n", rc); |
| 600 | |
| 601 | return rc; |
| 602 | } |
| 603 | |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 604 | #define HAP_CLEAR_PLAYING_RATE_US 15 |
| 605 | static int qti_haptics_clear_settings(struct qti_hap_chip *chip) |
| 606 | { |
| 607 | int rc; |
| 608 | u8 pattern[HAP_WAVEFORM_BUFFER_MAX] = {1, 0, 0, 0, 0, 0, 0, 0}; |
| 609 | |
| 610 | rc = qti_haptics_brake_enable(chip, false); |
| 611 | if (rc < 0) |
| 612 | return rc; |
| 613 | |
| 614 | rc = qti_haptics_lra_auto_res_enable(chip, false); |
| 615 | if (rc < 0) |
| 616 | return rc; |
| 617 | |
| 618 | rc = qti_haptics_config_play_rate_us(chip, HAP_CLEAR_PLAYING_RATE_US); |
| 619 | if (rc < 0) |
| 620 | return rc; |
| 621 | |
| 622 | rc = qti_haptics_write(chip, REG_HAP_WF_S1, pattern, |
| 623 | HAP_WAVEFORM_BUFFER_MAX); |
| 624 | if (rc < 0) |
| 625 | return rc; |
| 626 | |
| 627 | rc = qti_haptics_play(chip, true); |
| 628 | if (rc < 0) |
| 629 | return rc; |
| 630 | |
| 631 | rc = qti_haptics_play(chip, false); |
| 632 | if (rc < 0) |
| 633 | return rc; |
| 634 | |
| 635 | return 0; |
| 636 | } |
| 637 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 638 | static int qti_haptics_load_constant_waveform(struct qti_hap_chip *chip) |
| 639 | { |
| 640 | struct qti_hap_play_info *play = &chip->play; |
| 641 | struct qti_hap_config *config = &chip->config; |
| 642 | int rc = 0; |
| 643 | |
Fenglin Wu | f3907c8 | 2018-07-27 09:06:32 +0800 | [diff] [blame] | 644 | rc = qti_haptics_config_play_rate_us(chip, config->play_rate_us); |
| 645 | if (rc < 0) |
| 646 | return rc; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 647 | /* |
| 648 | * Using VMAX waveform source if playing length is >= 20ms, |
| 649 | * otherwise using buffer waveform source and calculate the |
| 650 | * pattern length and repeating times to achieve accurate |
| 651 | * playing time accuracy. |
| 652 | */ |
| 653 | if (play->length_us >= VMAX_MIN_PLAY_TIME_US) { |
| 654 | rc = qti_haptics_config_vmax(chip, play->vmax_mv); |
| 655 | if (rc < 0) |
| 656 | return rc; |
| 657 | |
Fenglin Wu | cf1a1b9 | 2018-06-11 07:39:44 +0800 | [diff] [blame] | 658 | /* Enable Auto-Resonance when VMAX wf-src is selected */ |
| 659 | if (config->act_type == ACT_LRA) { |
| 660 | rc = qti_haptics_lra_auto_res_enable(chip, true); |
| 661 | if (rc < 0) |
| 662 | return rc; |
| 663 | } |
| 664 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 665 | /* Set WF_SOURCE to VMAX */ |
| 666 | rc = qti_haptics_config_wf_src(chip, INT_WF_VMAX); |
| 667 | if (rc < 0) |
| 668 | return rc; |
| 669 | |
| 670 | play->playing_pattern = false; |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 671 | play->effect = NULL; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 672 | } else { |
| 673 | rc = qti_haptics_config_vmax(chip, config->vmax_mv); |
| 674 | if (rc < 0) |
| 675 | return rc; |
| 676 | |
| 677 | play->effect = &chip->constant; |
| 678 | play->playing_pos = 0; |
| 679 | /* Format and config waveform in patterns */ |
| 680 | construct_constant_waveform_in_pattern(play); |
| 681 | rc = qti_haptics_config_wf_buffer(chip); |
| 682 | if (rc < 0) |
| 683 | return rc; |
| 684 | |
| 685 | rc = qti_haptics_config_wf_repeat(chip); |
| 686 | if (rc < 0) |
| 687 | return rc; |
| 688 | |
| 689 | /* Set WF_SOURCE to buffer */ |
| 690 | rc = qti_haptics_config_wf_src(chip, INT_WF_BUFFER); |
| 691 | if (rc < 0) |
| 692 | return rc; |
| 693 | |
| 694 | play->playing_pattern = true; |
| 695 | } |
| 696 | |
| 697 | return 0; |
| 698 | } |
| 699 | |
| 700 | static int qti_haptics_load_predefined_effect(struct qti_hap_chip *chip, |
| 701 | int effect_idx) |
| 702 | { |
| 703 | struct qti_hap_play_info *play = &chip->play; |
| 704 | struct qti_hap_config *config = &chip->config; |
| 705 | int rc = 0; |
| 706 | |
| 707 | if (effect_idx >= chip->effects_count) |
| 708 | return -EINVAL; |
| 709 | |
| 710 | play->effect = &chip->predefined[effect_idx]; |
| 711 | play->playing_pos = 0; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 712 | rc = qti_haptics_config_vmax(chip, play->vmax_mv); |
| 713 | if (rc < 0) |
| 714 | return rc; |
| 715 | |
Fenglin Wu | cf1a1b9 | 2018-06-11 07:39:44 +0800 | [diff] [blame] | 716 | rc = qti_haptics_config_play_rate_us(chip, play->effect->play_rate_us); |
| 717 | if (rc < 0) |
| 718 | return rc; |
| 719 | |
| 720 | if (config->act_type == ACT_LRA) { |
| 721 | rc = qti_haptics_lra_auto_res_enable(chip, |
| 722 | !play->effect->lra_auto_res_disable); |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 723 | if (rc < 0) |
| 724 | return rc; |
| 725 | } |
| 726 | |
Fenglin Wu | cf1a1b9 | 2018-06-11 07:39:44 +0800 | [diff] [blame] | 727 | /* Set brake pattern in the effect */ |
| 728 | rc = qti_haptics_config_brake(chip, play->effect->brake); |
| 729 | if (rc < 0) |
| 730 | return rc; |
| 731 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 732 | rc = qti_haptics_config_wf_buffer(chip); |
| 733 | if (rc < 0) |
| 734 | return rc; |
| 735 | |
| 736 | rc = qti_haptics_config_wf_repeat(chip); |
| 737 | if (rc < 0) |
| 738 | return rc; |
| 739 | |
| 740 | /* Set WF_SOURCE to buffer */ |
| 741 | rc = qti_haptics_config_wf_src(chip, INT_WF_BUFFER); |
| 742 | if (rc < 0) |
| 743 | return rc; |
| 744 | |
| 745 | play->playing_pattern = true; |
| 746 | |
| 747 | return 0; |
| 748 | } |
| 749 | |
| 750 | static irqreturn_t qti_haptics_play_irq_handler(int irq, void *data) |
| 751 | { |
| 752 | struct qti_hap_chip *chip = (struct qti_hap_chip *)data; |
| 753 | struct qti_hap_play_info *play = &chip->play; |
| 754 | struct qti_hap_effect *effect = play->effect; |
| 755 | int rc; |
| 756 | |
| 757 | dev_dbg(chip->dev, "play_irq triggered\n"); |
| 758 | if (play->playing_pos == effect->pattern_length) { |
| 759 | dev_dbg(chip->dev, "waveform playing done\n"); |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 760 | if (chip->play_irq_en) { |
| 761 | disable_irq_nosync(chip->play_irq); |
| 762 | chip->play_irq_en = false; |
| 763 | } |
| 764 | |
| 765 | goto handled; |
| 766 | } |
| 767 | |
| 768 | /* Config to play remaining patterns */ |
| 769 | rc = qti_haptics_config_wf_repeat(chip); |
| 770 | if (rc < 0) |
| 771 | goto handled; |
| 772 | |
| 773 | rc = qti_haptics_config_wf_buffer(chip); |
| 774 | if (rc < 0) |
| 775 | goto handled; |
| 776 | |
| 777 | handled: |
| 778 | return IRQ_HANDLED; |
| 779 | } |
| 780 | |
| 781 | static irqreturn_t qti_haptics_sc_irq_handler(int irq, void *data) |
| 782 | { |
| 783 | struct qti_hap_chip *chip = (struct qti_hap_chip *)data; |
| 784 | u8 addr, val; |
| 785 | ktime_t temp; |
| 786 | s64 sc_delta_time_us; |
| 787 | int rc; |
| 788 | |
| 789 | dev_dbg(chip->dev, "sc_irq triggered\n"); |
| 790 | addr = REG_HAP_STATUS1; |
| 791 | rc = qti_haptics_read(chip, addr, &val, 1); |
| 792 | if (rc < 0) { |
| 793 | dev_err(chip->dev, "read HAP_STATUS1 failed, rc=%d\n", rc); |
| 794 | goto handled; |
| 795 | } |
| 796 | |
| 797 | if (!(val & HAP_SC_DET_BIT)) |
| 798 | goto handled; |
| 799 | |
| 800 | temp = ktime_get(); |
| 801 | sc_delta_time_us = ktime_us_delta(temp, chip->last_sc_time); |
| 802 | chip->last_sc_time = temp; |
| 803 | |
| 804 | if (sc_delta_time_us > HAP_SC_DET_TIME_US) |
| 805 | chip->sc_det_count = 0; |
| 806 | else |
| 807 | chip->sc_det_count++; |
| 808 | |
| 809 | addr = REG_HAP_SC_CLR; |
| 810 | val = HAP_SC_CLR_BIT; |
| 811 | rc = qti_haptics_write(chip, addr, &val, 1); |
| 812 | if (rc < 0) { |
| 813 | dev_err(chip->dev, "write SC_CLR failed, rc=%d\n", rc); |
| 814 | goto handled; |
| 815 | } |
| 816 | |
| 817 | if (chip->sc_det_count > HAP_SC_DET_MAX_COUNT) { |
| 818 | rc = qti_haptics_module_en(chip, false); |
| 819 | if (rc < 0) |
| 820 | goto handled; |
| 821 | |
| 822 | dev_crit(chip->dev, "Short circuit persists, disable haptics\n"); |
| 823 | chip->perm_disable = true; |
| 824 | } |
| 825 | |
| 826 | handled: |
| 827 | return IRQ_HANDLED; |
| 828 | } |
| 829 | |
| 830 | static inline void get_play_length(struct qti_hap_play_info *play, |
| 831 | int *length_us) |
| 832 | { |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 833 | struct qti_hap_effect *effect = play->effect; |
| 834 | int tmp; |
| 835 | |
| 836 | tmp = effect->pattern_length * effect->play_rate_us; |
| 837 | tmp *= wf_s_repeat[effect->wf_s_repeat_n]; |
| 838 | tmp *= wf_repeat[effect->wf_repeat_n]; |
Fenglin Wu | cf1a1b9 | 2018-06-11 07:39:44 +0800 | [diff] [blame] | 839 | if (effect->brake_en) |
| 840 | tmp += effect->play_rate_us * effect->brake_pattern_length; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 841 | |
| 842 | *length_us = tmp; |
| 843 | } |
| 844 | |
| 845 | static int qti_haptics_upload_effect(struct input_dev *dev, |
| 846 | struct ff_effect *effect, struct ff_effect *old) |
| 847 | { |
| 848 | struct qti_hap_chip *chip = input_get_drvdata(dev); |
| 849 | struct qti_hap_config *config = &chip->config; |
| 850 | struct qti_hap_play_info *play = &chip->play; |
| 851 | int rc = 0, tmp, i; |
| 852 | s16 level, data[CUSTOM_DATA_LEN]; |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 853 | ktime_t rem; |
| 854 | s64 time_us; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 855 | |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 856 | if (hrtimer_active(&chip->hap_disable_timer)) { |
| 857 | rem = hrtimer_get_remaining(&chip->hap_disable_timer); |
| 858 | time_us = ktime_to_us(rem); |
| 859 | dev_dbg(chip->dev, "waiting for playing clear sequence: %lld us\n", |
| 860 | time_us); |
| 861 | usleep_range(time_us, time_us + 100); |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 862 | } |
| 863 | |
| 864 | switch (effect->type) { |
| 865 | case FF_CONSTANT: |
| 866 | play->length_us = effect->replay.length * USEC_PER_MSEC; |
| 867 | level = effect->u.constant.level; |
| 868 | tmp = level * config->vmax_mv; |
| 869 | play->vmax_mv = tmp / 0x7fff; |
| 870 | dev_dbg(chip->dev, "upload constant effect, length = %dus, vmax_mv=%d\n", |
| 871 | play->length_us, play->vmax_mv); |
| 872 | |
| 873 | rc = qti_haptics_load_constant_waveform(chip); |
| 874 | if (rc < 0) { |
| 875 | dev_err(chip->dev, "Play constant waveform failed, rc=%d\n", |
| 876 | rc); |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 877 | return rc; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 878 | } |
| 879 | break; |
| 880 | |
| 881 | case FF_PERIODIC: |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 882 | if (chip->effects_count == 0) |
| 883 | return -EINVAL; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 884 | |
| 885 | if (effect->u.periodic.waveform != FF_CUSTOM) { |
| 886 | dev_err(chip->dev, "Only accept custom waveforms\n"); |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 887 | return -EINVAL; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 888 | } |
| 889 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 890 | if (copy_from_user(data, effect->u.periodic.custom_data, |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 891 | sizeof(s16) * CUSTOM_DATA_LEN)) |
| 892 | return -EFAULT; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 893 | |
| 894 | for (i = 0; i < chip->effects_count; i++) |
| 895 | if (chip->predefined[i].id == |
| 896 | data[CUSTOM_DATA_EFFECT_IDX]) |
| 897 | break; |
| 898 | |
| 899 | if (i == chip->effects_count) { |
| 900 | dev_err(chip->dev, "predefined effect %d is NOT supported\n", |
| 901 | data[0]); |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 902 | return -EINVAL; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 903 | } |
| 904 | |
Fenglin Wu | 659c004 | 2018-07-18 11:02:43 +0800 | [diff] [blame] | 905 | level = effect->u.periodic.magnitude; |
| 906 | tmp = level * chip->predefined[i].vmax_mv; |
| 907 | play->vmax_mv = tmp / 0x7fff; |
| 908 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 909 | dev_dbg(chip->dev, "upload effect %d, vmax_mv=%d\n", |
| 910 | chip->predefined[i].id, play->vmax_mv); |
| 911 | rc = qti_haptics_load_predefined_effect(chip, i); |
| 912 | if (rc < 0) { |
| 913 | dev_err(chip->dev, "Play predefined effect %d failed, rc=%d\n", |
| 914 | chip->predefined[i].id, rc); |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 915 | return rc; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 916 | } |
| 917 | |
| 918 | get_play_length(play, &play->length_us); |
| 919 | data[CUSTOM_DATA_TIMEOUT_SEC_IDX] = |
| 920 | play->length_us / USEC_PER_SEC; |
| 921 | data[CUSTOM_DATA_TIMEOUT_MSEC_IDX] = |
| 922 | (play->length_us % USEC_PER_SEC) / USEC_PER_MSEC; |
| 923 | |
| 924 | /* |
| 925 | * Copy the custom data contains the play length back to |
| 926 | * userspace so that the userspace client can wait and |
| 927 | * send stop playing command after it's done. |
| 928 | */ |
| 929 | if (copy_to_user(effect->u.periodic.custom_data, data, |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 930 | sizeof(s16) * CUSTOM_DATA_LEN)) |
| 931 | return -EFAULT; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 932 | break; |
| 933 | |
| 934 | default: |
| 935 | dev_err(chip->dev, "Unsupported effect type: %d\n", |
| 936 | effect->type); |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 937 | return -EINVAL; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 938 | } |
| 939 | |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 940 | if (chip->vdd_supply && !chip->vdd_enabled) { |
| 941 | rc = regulator_enable(chip->vdd_supply); |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 942 | if (rc < 0) { |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 943 | dev_err(chip->dev, "Enable VDD supply failed, rc=%d\n", |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 944 | rc); |
| 945 | return rc; |
| 946 | } |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 947 | chip->vdd_enabled = true; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 948 | } |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 949 | |
| 950 | return 0; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 951 | } |
| 952 | |
| 953 | static int qti_haptics_playback(struct input_dev *dev, int effect_id, int val) |
| 954 | { |
| 955 | struct qti_hap_chip *chip = input_get_drvdata(dev); |
| 956 | struct qti_hap_play_info *play = &chip->play; |
Fenglin Wu | 30f10b2 | 2018-06-15 07:49:23 +0800 | [diff] [blame] | 957 | s64 secs; |
| 958 | unsigned long nsecs; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 959 | int rc = 0; |
| 960 | |
| 961 | dev_dbg(chip->dev, "playback, val = %d\n", val); |
| 962 | if (!!val) { |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 963 | rc = qti_haptics_module_en(chip, true); |
| 964 | if (rc < 0) |
| 965 | return rc; |
| 966 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 967 | rc = qti_haptics_play(chip, true); |
| 968 | if (rc < 0) |
| 969 | return rc; |
| 970 | |
| 971 | if (play->playing_pattern) { |
| 972 | if (!chip->play_irq_en) { |
| 973 | enable_irq(chip->play_irq); |
| 974 | chip->play_irq_en = true; |
| 975 | } |
Fenglin Wu | f3907c8 | 2018-07-27 09:06:32 +0800 | [diff] [blame] | 976 | /* Toggle PLAY when playing pattern */ |
| 977 | rc = qti_haptics_play(chip, false); |
| 978 | if (rc < 0) |
| 979 | return rc; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 980 | } else { |
| 981 | if (chip->play_irq_en) { |
| 982 | disable_irq_nosync(chip->play_irq); |
| 983 | chip->play_irq_en = false; |
| 984 | } |
Fenglin Wu | 30f10b2 | 2018-06-15 07:49:23 +0800 | [diff] [blame] | 985 | secs = play->length_us / USEC_PER_SEC; |
| 986 | nsecs = (play->length_us % USEC_PER_SEC) * |
| 987 | NSEC_PER_USEC; |
| 988 | hrtimer_start(&chip->stop_timer, ktime_set(secs, nsecs), |
| 989 | HRTIMER_MODE_REL); |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 990 | } |
| 991 | } else { |
| 992 | play->length_us = 0; |
| 993 | rc = qti_haptics_play(chip, false); |
| 994 | if (rc < 0) |
| 995 | return rc; |
| 996 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 997 | if (chip->play_irq_en) { |
| 998 | disable_irq_nosync(chip->play_irq); |
| 999 | chip->play_irq_en = false; |
| 1000 | } |
| 1001 | } |
| 1002 | |
| 1003 | return rc; |
| 1004 | } |
| 1005 | |
| 1006 | static int qti_haptics_erase(struct input_dev *dev, int effect_id) |
| 1007 | { |
| 1008 | struct qti_hap_chip *chip = input_get_drvdata(dev); |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 1009 | int delay_us, rc = 0; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1010 | |
| 1011 | if (chip->vdd_supply && chip->vdd_enabled) { |
| 1012 | rc = regulator_disable(chip->vdd_supply); |
| 1013 | if (rc < 0) { |
| 1014 | dev_err(chip->dev, "Disable VDD supply failed, rc=%d\n", |
| 1015 | rc); |
| 1016 | return rc; |
| 1017 | } |
| 1018 | chip->vdd_enabled = false; |
| 1019 | } |
| 1020 | |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 1021 | rc = qti_haptics_clear_settings(chip); |
| 1022 | if (rc < 0) { |
| 1023 | dev_err(chip->dev, "clear setting failed, rc=%d\n", rc); |
| 1024 | return rc; |
| 1025 | } |
| 1026 | |
| 1027 | if (chip->play.effect) |
| 1028 | delay_us = chip->play.effect->play_rate_us; |
| 1029 | else |
| 1030 | delay_us = chip->config.play_rate_us; |
| 1031 | |
| 1032 | delay_us += HAP_DISABLE_DELAY_USEC; |
| 1033 | hrtimer_start(&chip->hap_disable_timer, |
| 1034 | ktime_set(0, delay_us * NSEC_PER_USEC), |
| 1035 | HRTIMER_MODE_REL); |
| 1036 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1037 | return rc; |
| 1038 | } |
| 1039 | |
Fenglin Wu | d92ef74 | 2018-07-16 15:50:08 +0800 | [diff] [blame] | 1040 | static void qti_haptics_set_gain(struct input_dev *dev, u16 gain) |
| 1041 | { |
| 1042 | struct qti_hap_chip *chip = input_get_drvdata(dev); |
| 1043 | struct qti_hap_config *config = &chip->config; |
| 1044 | struct qti_hap_play_info *play = &chip->play; |
| 1045 | |
| 1046 | if (gain == 0) |
| 1047 | return; |
| 1048 | |
| 1049 | if (gain > 0x7fff) |
| 1050 | gain = 0x7fff; |
| 1051 | |
| 1052 | play->vmax_mv = ((u32)(gain * config->vmax_mv)) / 0x7fff; |
| 1053 | qti_haptics_config_vmax(chip, play->vmax_mv); |
| 1054 | } |
| 1055 | |
Umang Chheda | 599b096 | 2020-01-20 17:15:54 +0530 | [diff] [blame] | 1056 | static int qti_haptics_twm_config(struct qti_hap_chip *chip) |
| 1057 | { |
| 1058 | int rc, i; |
| 1059 | |
| 1060 | for (i = 0; i < ARRAY_SIZE(twm_ext_cfg); i++) { |
| 1061 | rc = qti_haptics_write(chip, twm_ext_cfg[i].addr, |
| 1062 | &twm_ext_cfg[i].value, 1); |
| 1063 | if (rc < 0) { |
| 1064 | dev_err(chip->dev, "Haptics TWM config failed, rc=%d\n", |
| 1065 | rc); |
| 1066 | return rc; |
| 1067 | } |
| 1068 | } |
| 1069 | pr_debug("Enabled haptics for TWM mode\n"); |
| 1070 | |
| 1071 | return 0; |
| 1072 | } |
| 1073 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1074 | static int qti_haptics_hw_init(struct qti_hap_chip *chip) |
| 1075 | { |
| 1076 | struct qti_hap_config *config = &chip->config; |
| 1077 | u8 addr, val, mask; |
| 1078 | int rc = 0; |
| 1079 | |
| 1080 | /* Config actuator type */ |
| 1081 | addr = REG_HAP_CFG1; |
| 1082 | val = config->act_type; |
| 1083 | rc = qti_haptics_write(chip, addr, &val, 1); |
| 1084 | if (rc < 0) { |
| 1085 | dev_err(chip->dev, "write actuator type failed, rc=%d\n", rc); |
| 1086 | return rc; |
| 1087 | } |
| 1088 | |
| 1089 | /* Config ilim_ma */ |
| 1090 | addr = REG_HAP_ILIM_CFG; |
| 1091 | val = config->ilim_ma == 400 ? 0 : 1; |
| 1092 | rc = qti_haptics_write(chip, addr, &val, 1); |
| 1093 | if (rc < 0) { |
| 1094 | dev_err(chip->dev, "write ilim_ma failed, rc=%d\n", rc); |
| 1095 | return rc; |
| 1096 | } |
| 1097 | |
| 1098 | /* Set HAP_EN_CTL3 */ |
| 1099 | addr = REG_HAP_EN_CTL3; |
| 1100 | val = HAP_HBRIDGE_EN_BIT | HAP_PWM_SIGNAL_EN_BIT | HAP_ILIM_EN_BIT | |
Fenglin Wu | cf1a1b9 | 2018-06-11 07:39:44 +0800 | [diff] [blame] | 1101 | HAP_ILIM_CC_EN_BIT | HAP_AUTO_RES_RBIAS_EN_BIT | |
| 1102 | HAP_DAC_EN_BIT | HAP_PWM_CTL_EN_BIT; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1103 | rc = qti_haptics_write(chip, addr, &val, 1); |
| 1104 | if (rc < 0) { |
| 1105 | dev_err(chip->dev, "set EN_CTL3 failed, rc=%d\n", rc); |
| 1106 | return rc; |
| 1107 | } |
| 1108 | |
| 1109 | /* Set ZX_CFG */ |
| 1110 | addr = REG_HAP_ZX_CFG; |
| 1111 | mask = HAP_ZX_DET_DEB_MASK; |
| 1112 | val = ZX_DET_DEB_80US; |
| 1113 | rc = qti_haptics_masked_write(chip, addr, mask, val); |
| 1114 | if (rc < 0) { |
| 1115 | dev_err(chip->dev, "write ZX_CFG failed, rc=%d\n", rc); |
| 1116 | return rc; |
| 1117 | } |
| 1118 | |
| 1119 | /* |
| 1120 | * Config play rate: this is the resonance period for LRA, |
| 1121 | * or the play duration of each waveform sample for ERM. |
| 1122 | */ |
| 1123 | rc = qti_haptics_config_play_rate_us(chip, config->play_rate_us); |
| 1124 | if (rc < 0) |
| 1125 | return rc; |
| 1126 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1127 | /* Set external waveform source if it's used */ |
| 1128 | if (config->use_ext_wf_src) { |
| 1129 | rc = qti_haptics_config_wf_src(chip, config->ext_src); |
| 1130 | if (rc < 0) |
| 1131 | return rc; |
| 1132 | } |
| 1133 | |
| 1134 | /* |
| 1135 | * Skip configurations below for ERM actuator |
| 1136 | * as they're only for LRA actuators |
| 1137 | */ |
| 1138 | if (config->act_type == ACT_ERM) |
| 1139 | return 0; |
| 1140 | |
| 1141 | addr = REG_HAP_CFG2; |
| 1142 | val = config->lra_shape; |
| 1143 | rc = qti_haptics_write(chip, addr, &val, 1); |
| 1144 | if (rc < 0) { |
| 1145 | dev_err(chip->dev, "write lra_sig_shape failed, rc=%d\n", rc); |
| 1146 | return rc; |
| 1147 | } |
| 1148 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1149 | addr = REG_HAP_AUTO_RES_CFG; |
| 1150 | mask = HAP_AUTO_RES_MODE_BIT | HAP_CAL_EOP_EN_BIT | HAP_CAL_PERIOD_MASK; |
| 1151 | val = config->lra_auto_res_mode << HAP_AUTO_RES_MODE_SHIFT; |
| 1152 | val |= HAP_CAL_EOP_EN_BIT | HAP_CAL_OPT3_EVERY_8_PERIOD; |
| 1153 | rc = qti_haptics_masked_write(chip, addr, mask, val); |
| 1154 | if (rc < 0) { |
| 1155 | dev_err(chip->dev, "set AUTO_RES_CFG failed, rc=%d\n", rc); |
| 1156 | return rc; |
| 1157 | } |
| 1158 | |
| 1159 | addr = REG_HAP_AUTO_RES_CTRL; |
Fenglin Wu | cf1a1b9 | 2018-06-11 07:39:44 +0800 | [diff] [blame] | 1160 | val = HAP_AUTO_RES_EN_BIT | HAP_SEL_AUTO_RES_PERIOD | |
| 1161 | AUTO_RES_CNT_ERR_DELTA(2) | HAP_AUTO_RES_ERR_RECOVERY_BIT | |
| 1162 | AUTO_RES_EN_DLY(4); |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1163 | rc = qti_haptics_write(chip, addr, &val, 1); |
| 1164 | if (rc < 0) { |
| 1165 | dev_err(chip->dev, "set AUTO_RES_CTRL failed, rc=%d\n", |
| 1166 | rc); |
| 1167 | return rc; |
| 1168 | } |
| 1169 | |
| 1170 | return 0; |
| 1171 | } |
| 1172 | |
Fenglin Wu | 30f10b2 | 2018-06-15 07:49:23 +0800 | [diff] [blame] | 1173 | static enum hrtimer_restart qti_hap_stop_timer(struct hrtimer *timer) |
| 1174 | { |
| 1175 | struct qti_hap_chip *chip = container_of(timer, struct qti_hap_chip, |
| 1176 | stop_timer); |
| 1177 | int rc; |
| 1178 | |
| 1179 | chip->play.length_us = 0; |
| 1180 | rc = qti_haptics_play(chip, false); |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 1181 | if (rc < 0) |
Fenglin Wu | 30f10b2 | 2018-06-15 07:49:23 +0800 | [diff] [blame] | 1182 | dev_err(chip->dev, "Stop playing failed, rc=%d\n", rc); |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 1183 | |
| 1184 | return HRTIMER_NORESTART; |
| 1185 | } |
| 1186 | |
| 1187 | static enum hrtimer_restart qti_hap_disable_timer(struct hrtimer *timer) |
| 1188 | { |
| 1189 | struct qti_hap_chip *chip = container_of(timer, struct qti_hap_chip, |
| 1190 | hap_disable_timer); |
| 1191 | int rc; |
Fenglin Wu | 30f10b2 | 2018-06-15 07:49:23 +0800 | [diff] [blame] | 1192 | |
| 1193 | rc = qti_haptics_module_en(chip, false); |
| 1194 | if (rc < 0) |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 1195 | dev_err(chip->dev, "Disable haptics module failed, rc=%d\n", |
| 1196 | rc); |
| 1197 | |
Fenglin Wu | 30f10b2 | 2018-06-15 07:49:23 +0800 | [diff] [blame] | 1198 | return HRTIMER_NORESTART; |
| 1199 | } |
| 1200 | |
Fenglin Wu | 22e4cf1 | 2018-08-01 15:07:28 +0800 | [diff] [blame] | 1201 | static void verify_brake_setting(struct qti_hap_effect *effect) |
| 1202 | { |
| 1203 | int i = effect->brake_pattern_length - 1; |
| 1204 | u8 val = 0; |
| 1205 | |
| 1206 | for (; i >= 0; i--) { |
| 1207 | if (effect->brake[i] != 0) |
| 1208 | break; |
| 1209 | |
| 1210 | effect->brake_pattern_length--; |
| 1211 | } |
| 1212 | |
| 1213 | for (i = 0; i < effect->brake_pattern_length; i++) { |
| 1214 | effect->brake[i] &= HAP_BRAKE_PATTERN_MASK; |
| 1215 | val |= effect->brake[i] << (i * HAP_BRAKE_PATTERN_SHIFT); |
| 1216 | } |
| 1217 | |
| 1218 | effect->brake_en = (val != 0); |
| 1219 | } |
| 1220 | |
Umang Chheda | 599b096 | 2020-01-20 17:15:54 +0530 | [diff] [blame] | 1221 | static int twm_notifier_cb(struct notifier_block *nb, |
| 1222 | unsigned long action, void *data) |
| 1223 | { |
| 1224 | struct qti_hap_chip *chip = container_of(nb, |
| 1225 | struct qti_hap_chip, twm_nb); |
| 1226 | |
| 1227 | if (action != PMIC_TWM_CLEAR && |
| 1228 | action != PMIC_TWM_ENABLE) |
| 1229 | pr_debug("Unsupported option %lu\n", action); |
| 1230 | else |
| 1231 | chip->twm_state = (u8)action; |
| 1232 | |
| 1233 | return NOTIFY_OK; |
| 1234 | } |
| 1235 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1236 | static int qti_haptics_parse_dt(struct qti_hap_chip *chip) |
| 1237 | { |
| 1238 | struct qti_hap_config *config = &chip->config; |
| 1239 | const struct device_node *node = chip->dev->of_node; |
| 1240 | struct device_node *child_node; |
| 1241 | struct qti_hap_effect *effect; |
| 1242 | const char *str; |
Fenglin Wu | f3907c8 | 2018-07-27 09:06:32 +0800 | [diff] [blame] | 1243 | int rc = 0, tmp, i = 0, j, m; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1244 | |
| 1245 | rc = of_property_read_u32(node, "reg", &tmp); |
| 1246 | if (rc < 0) { |
| 1247 | dev_err(chip->dev, "Failed to reg base, rc=%d\n", rc); |
| 1248 | return rc; |
| 1249 | } |
| 1250 | chip->reg_base = (u16)tmp; |
| 1251 | |
| 1252 | chip->sc_irq = platform_get_irq_byname(chip->pdev, "hap-sc-irq"); |
| 1253 | if (chip->sc_irq < 0) { |
| 1254 | dev_err(chip->dev, "Failed to get hap-sc-irq\n"); |
| 1255 | return chip->sc_irq; |
| 1256 | } |
| 1257 | |
| 1258 | chip->play_irq = platform_get_irq_byname(chip->pdev, "hap-play-irq"); |
| 1259 | if (chip->play_irq < 0) { |
| 1260 | dev_err(chip->dev, "Failed to get hap-play-irq\n"); |
| 1261 | return chip->play_irq; |
| 1262 | } |
| 1263 | |
| 1264 | config->act_type = ACT_LRA; |
| 1265 | rc = of_property_read_string(node, "qcom,actuator-type", &str); |
| 1266 | if (!rc) { |
| 1267 | if (strcmp(str, "erm") == 0) { |
| 1268 | config->act_type = ACT_ERM; |
| 1269 | } else if (strcmp(str, "lra") == 0) { |
| 1270 | config->act_type = ACT_LRA; |
| 1271 | } else { |
| 1272 | dev_err(chip->dev, "Invalid actuator type: %s\n", |
| 1273 | str); |
| 1274 | return -EINVAL; |
| 1275 | } |
| 1276 | } |
| 1277 | |
| 1278 | config->vmax_mv = HAP_VMAX_MV_DEFAULT; |
| 1279 | rc = of_property_read_u32(node, "qcom,vmax-mv", &tmp); |
| 1280 | if (!rc) |
| 1281 | config->vmax_mv = (tmp > HAP_VMAX_MV_MAX) ? |
| 1282 | HAP_VMAX_MV_MAX : tmp; |
| 1283 | |
| 1284 | config->ilim_ma = HAP_ILIM_MA_DEFAULT; |
| 1285 | rc = of_property_read_u32(node, "qcom,ilim-ma", &tmp); |
| 1286 | if (!rc) |
| 1287 | config->ilim_ma = (tmp >= HAP_ILIM_MA_MAX) ? |
| 1288 | HAP_ILIM_MA_MAX : HAP_ILIM_MA_DEFAULT; |
| 1289 | |
| 1290 | config->play_rate_us = HAP_PLAY_RATE_US_DEFAULT; |
| 1291 | rc = of_property_read_u32(node, "qcom,play-rate-us", &tmp); |
| 1292 | if (!rc) |
| 1293 | config->play_rate_us = (tmp >= HAP_PLAY_RATE_US_MAX) ? |
| 1294 | HAP_PLAY_RATE_US_MAX : tmp; |
| 1295 | |
Umang Chheda | 599b096 | 2020-01-20 17:15:54 +0530 | [diff] [blame] | 1296 | chip->haptics_ext_pin_twm = of_property_read_bool(node, |
| 1297 | "qcom,haptics-ext-pin-twm"); |
| 1298 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1299 | if (of_find_property(node, "qcom,external-waveform-source", NULL)) { |
| 1300 | if (!of_property_read_string(node, |
| 1301 | "qcom,external-waveform-source", &str)) { |
| 1302 | if (strcmp(str, "audio") == 0) { |
| 1303 | config->ext_src = EXT_WF_AUDIO; |
| 1304 | } else if (strcmp(str, "pwm") == 0) { |
| 1305 | config->ext_src = EXT_WF_PWM; |
| 1306 | } else { |
| 1307 | dev_err(chip->dev, "Invalid external waveform source: %s\n", |
| 1308 | str); |
| 1309 | return -EINVAL; |
| 1310 | } |
| 1311 | } |
| 1312 | config->use_ext_wf_src = true; |
| 1313 | } |
| 1314 | |
| 1315 | if (of_find_property(node, "vdd-supply", NULL)) { |
| 1316 | chip->vdd_supply = devm_regulator_get(chip->dev, "vdd"); |
| 1317 | if (IS_ERR(chip->vdd_supply)) { |
| 1318 | rc = PTR_ERR(chip->vdd_supply); |
| 1319 | if (rc != -EPROBE_DEFER) |
| 1320 | dev_err(chip->dev, "Failed to get vdd regulator"); |
| 1321 | return rc; |
| 1322 | } |
| 1323 | } |
| 1324 | |
| 1325 | if (config->act_type == ACT_LRA) { |
| 1326 | config->lra_shape = RES_SIG_SINE; |
| 1327 | rc = of_property_read_string(node, |
| 1328 | "qcom,lra-resonance-sig-shape", &str); |
| 1329 | if (!rc) { |
| 1330 | if (strcmp(str, "sine") == 0) { |
| 1331 | config->lra_shape = RES_SIG_SINE; |
| 1332 | } else if (strcmp(str, "square") == 0) { |
| 1333 | config->lra_shape = RES_SIG_SQUARE; |
| 1334 | } else { |
| 1335 | dev_err(chip->dev, "Invalid resonance signal shape: %s\n", |
| 1336 | str); |
| 1337 | return -EINVAL; |
| 1338 | } |
| 1339 | } |
| 1340 | |
Fenglin Wu | cf1a1b9 | 2018-06-11 07:39:44 +0800 | [diff] [blame] | 1341 | config->lra_allow_variable_play_rate = of_property_read_bool( |
| 1342 | node, "qcom,lra-allow-variable-play-rate"); |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1343 | |
| 1344 | config->lra_auto_res_mode = AUTO_RES_MODE_ZXD; |
| 1345 | rc = of_property_read_string(node, |
| 1346 | "qcom,lra-auto-resonance-mode", &str); |
| 1347 | if (!rc) { |
| 1348 | if (strcmp(str, "zxd") == 0) { |
| 1349 | config->lra_auto_res_mode = AUTO_RES_MODE_ZXD; |
| 1350 | } else if (strcmp(str, "qwd") == 0) { |
| 1351 | config->lra_auto_res_mode = AUTO_RES_MODE_QWD; |
| 1352 | } else { |
| 1353 | dev_err(chip->dev, "Invalid auto resonance mode: %s\n", |
| 1354 | str); |
| 1355 | return -EINVAL; |
| 1356 | } |
| 1357 | } |
| 1358 | } |
| 1359 | |
| 1360 | chip->constant.pattern = devm_kcalloc(chip->dev, |
| 1361 | HAP_WAVEFORM_BUFFER_MAX, |
| 1362 | sizeof(u8), GFP_KERNEL); |
| 1363 | if (!chip->constant.pattern) |
| 1364 | return -ENOMEM; |
| 1365 | |
| 1366 | tmp = of_get_available_child_count(node); |
| 1367 | if (tmp == 0) |
| 1368 | return 0; |
| 1369 | |
| 1370 | chip->predefined = devm_kcalloc(chip->dev, tmp, |
| 1371 | sizeof(*chip->predefined), GFP_KERNEL); |
| 1372 | if (!chip->predefined) |
| 1373 | return -ENOMEM; |
| 1374 | |
| 1375 | chip->effects_count = tmp; |
| 1376 | |
| 1377 | for_each_available_child_of_node(node, child_node) { |
| 1378 | effect = &chip->predefined[i++]; |
| 1379 | rc = of_property_read_u32(child_node, "qcom,effect-id", |
| 1380 | &effect->id); |
| 1381 | if (rc < 0) { |
| 1382 | dev_err(chip->dev, "Read qcom,effect-id failed, rc=%d\n", |
| 1383 | rc); |
| 1384 | return rc; |
| 1385 | } |
| 1386 | |
Fenglin Wu | 659c004 | 2018-07-18 11:02:43 +0800 | [diff] [blame] | 1387 | effect->vmax_mv = config->vmax_mv; |
| 1388 | rc = of_property_read_u32(child_node, "qcom,wf-vmax-mv", &tmp); |
| 1389 | if (rc < 0) |
| 1390 | dev_dbg(chip->dev, "Read qcom,wf-vmax-mv failed, rc=%d\n", |
| 1391 | rc); |
| 1392 | else |
| 1393 | effect->vmax_mv = (tmp > HAP_VMAX_MV_MAX) ? |
| 1394 | HAP_VMAX_MV_MAX : tmp; |
| 1395 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1396 | rc = of_property_count_elems_of_size(child_node, |
| 1397 | "qcom,wf-pattern", sizeof(u8)); |
| 1398 | if (rc < 0) { |
| 1399 | dev_err(chip->dev, "Count qcom,wf-pattern property failed, rc=%d\n", |
| 1400 | rc); |
| 1401 | return rc; |
| 1402 | } else if (rc == 0) { |
| 1403 | dev_dbg(chip->dev, "qcom,wf-pattern has no data\n"); |
| 1404 | return -EINVAL; |
| 1405 | } |
| 1406 | |
| 1407 | effect->pattern_length = rc; |
| 1408 | effect->pattern = devm_kcalloc(chip->dev, |
| 1409 | effect->pattern_length, sizeof(u8), GFP_KERNEL); |
| 1410 | if (!effect->pattern) |
| 1411 | return -ENOMEM; |
| 1412 | |
| 1413 | rc = of_property_read_u8_array(child_node, "qcom,wf-pattern", |
| 1414 | effect->pattern, effect->pattern_length); |
| 1415 | if (rc < 0) { |
| 1416 | dev_err(chip->dev, "Read qcom,wf-pattern property failed, rc=%d\n", |
| 1417 | rc); |
| 1418 | return rc; |
| 1419 | } |
| 1420 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1421 | effect->play_rate_us = config->play_rate_us; |
| 1422 | rc = of_property_read_u32(child_node, "qcom,wf-play-rate-us", |
| 1423 | &tmp); |
| 1424 | if (rc < 0) |
| 1425 | dev_dbg(chip->dev, "Read qcom,wf-play-rate-us failed, rc=%d\n", |
| 1426 | rc); |
| 1427 | else |
| 1428 | effect->play_rate_us = tmp; |
| 1429 | |
| 1430 | if (config->act_type == ACT_LRA && |
Fenglin Wu | cf1a1b9 | 2018-06-11 07:39:44 +0800 | [diff] [blame] | 1431 | !config->lra_allow_variable_play_rate && |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1432 | config->play_rate_us != effect->play_rate_us) { |
| 1433 | dev_warn(chip->dev, "play rate should match with LRA resonance frequency\n"); |
| 1434 | effect->play_rate_us = config->play_rate_us; |
| 1435 | } |
| 1436 | |
| 1437 | rc = of_property_read_u32(child_node, "qcom,wf-repeat-count", |
| 1438 | &tmp); |
| 1439 | if (rc < 0) { |
| 1440 | dev_dbg(chip->dev, "Read qcom,wf-repeat-count failed, rc=%d\n", |
| 1441 | rc); |
| 1442 | } else { |
| 1443 | for (j = 0; j < ARRAY_SIZE(wf_repeat); j++) |
| 1444 | if (tmp <= wf_repeat[j]) |
| 1445 | break; |
| 1446 | |
| 1447 | effect->wf_repeat_n = j; |
| 1448 | } |
| 1449 | |
| 1450 | rc = of_property_read_u32(child_node, "qcom,wf-s-repeat-count", |
| 1451 | &tmp); |
| 1452 | if (rc < 0) { |
| 1453 | dev_dbg(chip->dev, "Read qcom,wf-s-repeat-count failed, rc=%d\n", |
| 1454 | rc); |
| 1455 | } else { |
| 1456 | for (j = 0; j < ARRAY_SIZE(wf_s_repeat); j++) |
| 1457 | if (tmp <= wf_s_repeat[j]) |
| 1458 | break; |
| 1459 | |
| 1460 | effect->wf_s_repeat_n = j; |
| 1461 | } |
Fenglin Wu | cf1a1b9 | 2018-06-11 07:39:44 +0800 | [diff] [blame] | 1462 | |
Fenglin Wu | f3907c8 | 2018-07-27 09:06:32 +0800 | [diff] [blame] | 1463 | effect->lra_auto_res_disable = of_property_read_bool(child_node, |
Fenglin Wu | cf1a1b9 | 2018-06-11 07:39:44 +0800 | [diff] [blame] | 1464 | "qcom,lra-auto-resonance-disable"); |
| 1465 | |
| 1466 | tmp = of_property_count_elems_of_size(child_node, |
| 1467 | "qcom,wf-brake-pattern", sizeof(u8)); |
| 1468 | if (tmp <= 0) |
| 1469 | continue; |
| 1470 | |
| 1471 | if (tmp > HAP_BRAKE_PATTERN_MAX) { |
| 1472 | dev_err(chip->dev, "wf-brake-pattern shouldn't be more than %d bytes\n", |
| 1473 | HAP_BRAKE_PATTERN_MAX); |
| 1474 | return -EINVAL; |
| 1475 | } |
| 1476 | |
| 1477 | rc = of_property_read_u8_array(child_node, |
| 1478 | "qcom,wf-brake-pattern", effect->brake, tmp); |
| 1479 | if (rc < 0) { |
| 1480 | dev_err(chip->dev, "Failed to get wf-brake-pattern, rc=%d\n", |
| 1481 | rc); |
| 1482 | return rc; |
| 1483 | } |
| 1484 | |
| 1485 | effect->brake_pattern_length = tmp; |
Fenglin Wu | 22e4cf1 | 2018-08-01 15:07:28 +0800 | [diff] [blame] | 1486 | verify_brake_setting(effect); |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1487 | } |
| 1488 | |
Fenglin Wu | f3907c8 | 2018-07-27 09:06:32 +0800 | [diff] [blame] | 1489 | for (j = 0; j < i; j++) { |
| 1490 | dev_dbg(chip->dev, "effect: %d\n", chip->predefined[j].id); |
| 1491 | dev_dbg(chip->dev, " vmax: %d mv\n", |
| 1492 | chip->predefined[j].vmax_mv); |
| 1493 | dev_dbg(chip->dev, " play_rate: %d us\n", |
| 1494 | chip->predefined[j].play_rate_us); |
| 1495 | for (m = 0; m < chip->predefined[j].pattern_length; m++) |
| 1496 | dev_dbg(chip->dev, " pattern[%d]: 0x%x\n", |
| 1497 | m, chip->predefined[j].pattern[m]); |
| 1498 | for (m = 0; m < chip->predefined[j].brake_pattern_length; m++) |
| 1499 | dev_dbg(chip->dev, " brake_pattern[%d]: 0x%x\n", |
| 1500 | m, chip->predefined[j].brake[m]); |
| 1501 | dev_dbg(chip->dev, " brake_en: %d\n", |
| 1502 | chip->predefined[j].brake_en); |
| 1503 | dev_dbg(chip->dev, " wf_repeat_n: %d\n", |
| 1504 | chip->predefined[j].wf_repeat_n); |
| 1505 | dev_dbg(chip->dev, " wf_s_repeat_n: %d\n", |
| 1506 | chip->predefined[j].wf_s_repeat_n); |
| 1507 | dev_dbg(chip->dev, " lra_auto_res_disable: %d\n", |
| 1508 | chip->predefined[j].lra_auto_res_disable); |
| 1509 | } |
| 1510 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1511 | return 0; |
| 1512 | } |
| 1513 | |
Fenglin Wu | 22e4cf1 | 2018-08-01 15:07:28 +0800 | [diff] [blame] | 1514 | #ifdef CONFIG_DEBUG_FS |
| 1515 | static int play_rate_dbgfs_read(void *data, u64 *val) |
| 1516 | { |
| 1517 | struct qti_hap_effect *effect = (struct qti_hap_effect *)data; |
| 1518 | |
| 1519 | *val = effect->play_rate_us; |
| 1520 | |
| 1521 | return 0; |
| 1522 | } |
| 1523 | |
| 1524 | static int play_rate_dbgfs_write(void *data, u64 val) |
| 1525 | { |
| 1526 | struct qti_hap_effect *effect = (struct qti_hap_effect *)data; |
| 1527 | |
| 1528 | if (val > HAP_PLAY_RATE_US_MAX) |
| 1529 | val = HAP_PLAY_RATE_US_MAX; |
| 1530 | |
| 1531 | effect->play_rate_us = val; |
| 1532 | |
| 1533 | return 0; |
| 1534 | } |
| 1535 | |
| 1536 | static int vmax_dbgfs_read(void *data, u64 *val) |
| 1537 | { |
| 1538 | struct qti_hap_effect *effect = (struct qti_hap_effect *)data; |
| 1539 | |
| 1540 | *val = effect->vmax_mv; |
| 1541 | |
| 1542 | return 0; |
| 1543 | } |
| 1544 | |
| 1545 | static int vmax_dbgfs_write(void *data, u64 val) |
| 1546 | { |
| 1547 | struct qti_hap_effect *effect = (struct qti_hap_effect *)data; |
| 1548 | |
| 1549 | if (val > HAP_VMAX_MV_MAX) |
| 1550 | val = HAP_VMAX_MV_MAX; |
| 1551 | |
| 1552 | effect->vmax_mv = val; |
| 1553 | |
| 1554 | return 0; |
| 1555 | } |
| 1556 | |
| 1557 | static int wf_repeat_n_dbgfs_read(void *data, u64 *val) |
| 1558 | { |
| 1559 | struct qti_hap_effect *effect = (struct qti_hap_effect *)data; |
| 1560 | |
| 1561 | *val = wf_repeat[effect->wf_repeat_n]; |
| 1562 | |
| 1563 | return 0; |
| 1564 | } |
| 1565 | |
| 1566 | static int wf_repeat_n_dbgfs_write(void *data, u64 val) |
| 1567 | { |
| 1568 | struct qti_hap_effect *effect = (struct qti_hap_effect *)data; |
| 1569 | int i; |
| 1570 | |
| 1571 | for (i = 0; i < ARRAY_SIZE(wf_repeat); i++) |
| 1572 | if (val == wf_repeat[i]) |
| 1573 | break; |
| 1574 | |
| 1575 | if (i == ARRAY_SIZE(wf_repeat)) |
| 1576 | pr_err("wf_repeat value %llu is invalid\n", val); |
| 1577 | else |
| 1578 | effect->wf_repeat_n = i; |
| 1579 | |
| 1580 | return 0; |
| 1581 | } |
| 1582 | |
| 1583 | static int wf_s_repeat_n_dbgfs_read(void *data, u64 *val) |
| 1584 | { |
| 1585 | struct qti_hap_effect *effect = (struct qti_hap_effect *)data; |
| 1586 | |
| 1587 | *val = wf_s_repeat[effect->wf_s_repeat_n]; |
| 1588 | |
| 1589 | return 0; |
| 1590 | } |
| 1591 | |
| 1592 | static int wf_s_repeat_n_dbgfs_write(void *data, u64 val) |
| 1593 | { |
| 1594 | struct qti_hap_effect *effect = (struct qti_hap_effect *)data; |
| 1595 | int i; |
| 1596 | |
| 1597 | for (i = 0; i < ARRAY_SIZE(wf_s_repeat); i++) |
| 1598 | if (val == wf_s_repeat[i]) |
| 1599 | break; |
| 1600 | |
| 1601 | if (i == ARRAY_SIZE(wf_s_repeat)) |
| 1602 | pr_err("wf_s_repeat value %llu is invalid\n", val); |
| 1603 | else |
| 1604 | effect->wf_s_repeat_n = i; |
| 1605 | |
| 1606 | return 0; |
| 1607 | } |
| 1608 | |
| 1609 | |
| 1610 | static int auto_res_dbgfs_read(void *data, u64 *val) |
| 1611 | { |
| 1612 | struct qti_hap_effect *effect = (struct qti_hap_effect *)data; |
| 1613 | |
| 1614 | *val = !effect->lra_auto_res_disable; |
| 1615 | |
| 1616 | return 0; |
| 1617 | } |
| 1618 | |
| 1619 | static int auto_res_dbgfs_write(void *data, u64 val) |
| 1620 | { |
| 1621 | struct qti_hap_effect *effect = (struct qti_hap_effect *)data; |
| 1622 | |
| 1623 | effect->lra_auto_res_disable = !val; |
| 1624 | |
| 1625 | return 0; |
| 1626 | } |
| 1627 | |
| 1628 | DEFINE_SIMPLE_ATTRIBUTE(play_rate_debugfs_ops, play_rate_dbgfs_read, |
| 1629 | play_rate_dbgfs_write, "%llu\n"); |
| 1630 | DEFINE_SIMPLE_ATTRIBUTE(vmax_debugfs_ops, vmax_dbgfs_read, |
| 1631 | vmax_dbgfs_write, "%llu\n"); |
| 1632 | DEFINE_SIMPLE_ATTRIBUTE(wf_repeat_n_debugfs_ops, wf_repeat_n_dbgfs_read, |
| 1633 | wf_repeat_n_dbgfs_write, "%llu\n"); |
| 1634 | DEFINE_SIMPLE_ATTRIBUTE(wf_s_repeat_n_debugfs_ops, wf_s_repeat_n_dbgfs_read, |
| 1635 | wf_s_repeat_n_dbgfs_write, "%llu\n"); |
| 1636 | DEFINE_SIMPLE_ATTRIBUTE(auto_res_debugfs_ops, auto_res_dbgfs_read, |
| 1637 | auto_res_dbgfs_write, "%llu\n"); |
| 1638 | |
| 1639 | #define CHAR_PER_PATTERN 8 |
| 1640 | static ssize_t brake_pattern_dbgfs_read(struct file *filep, |
| 1641 | char __user *buf, size_t count, loff_t *ppos) |
| 1642 | { |
| 1643 | struct qti_hap_effect *effect = |
| 1644 | (struct qti_hap_effect *)filep->private_data; |
| 1645 | char *kbuf, *tmp; |
| 1646 | int rc, length, i, len; |
| 1647 | |
| 1648 | kbuf = kcalloc(CHAR_PER_PATTERN, HAP_BRAKE_PATTERN_MAX, GFP_KERNEL); |
| 1649 | if (!kbuf) |
| 1650 | return -ENOMEM; |
| 1651 | |
| 1652 | tmp = kbuf; |
| 1653 | for (length = 0, i = 0; i < HAP_BRAKE_PATTERN_MAX; i++) { |
| 1654 | len = snprintf(tmp, CHAR_PER_PATTERN, "0x%x ", |
| 1655 | effect->brake[i]); |
| 1656 | tmp += len; |
| 1657 | length += len; |
| 1658 | } |
| 1659 | |
| 1660 | kbuf[length++] = '\n'; |
| 1661 | kbuf[length++] = '\0'; |
| 1662 | |
| 1663 | rc = simple_read_from_buffer(buf, count, ppos, kbuf, length); |
| 1664 | |
| 1665 | kfree(kbuf); |
| 1666 | return rc; |
| 1667 | } |
| 1668 | |
| 1669 | static ssize_t brake_pattern_dbgfs_write(struct file *filep, |
| 1670 | const char __user *buf, size_t count, loff_t *ppos) |
| 1671 | { |
| 1672 | struct qti_hap_effect *effect = |
| 1673 | (struct qti_hap_effect *)filep->private_data; |
| 1674 | char *kbuf, *token; |
| 1675 | int rc = 0, i = 0, j; |
| 1676 | u32 val; |
| 1677 | |
| 1678 | kbuf = kmalloc(count + 1, GFP_KERNEL); |
| 1679 | if (!kbuf) |
| 1680 | return -ENOMEM; |
| 1681 | |
| 1682 | rc = copy_from_user(kbuf, buf, count); |
| 1683 | if (rc > 0) { |
| 1684 | rc = -EFAULT; |
| 1685 | goto err; |
| 1686 | } |
| 1687 | |
| 1688 | kbuf[count] = '\0'; |
| 1689 | *ppos += count; |
| 1690 | |
| 1691 | while ((token = strsep(&kbuf, " ")) != NULL) { |
| 1692 | rc = kstrtouint(token, 0, &val); |
| 1693 | if (rc < 0) { |
| 1694 | rc = -EINVAL; |
| 1695 | goto err; |
| 1696 | } |
| 1697 | |
| 1698 | effect->brake[i++] = val & HAP_BRAKE_PATTERN_MASK; |
| 1699 | |
| 1700 | if (i >= HAP_BRAKE_PATTERN_MAX) |
| 1701 | break; |
| 1702 | } |
| 1703 | |
| 1704 | for (j = i; j < HAP_BRAKE_PATTERN_MAX; j++) |
| 1705 | effect->brake[j] = 0; |
| 1706 | |
| 1707 | effect->brake_pattern_length = i; |
| 1708 | verify_brake_setting(effect); |
| 1709 | |
| 1710 | rc = count; |
| 1711 | err: |
| 1712 | kfree(kbuf); |
| 1713 | return rc; |
| 1714 | } |
| 1715 | |
| 1716 | static const struct file_operations brake_pattern_dbgfs_ops = { |
| 1717 | .read = brake_pattern_dbgfs_read, |
| 1718 | .write = brake_pattern_dbgfs_write, |
| 1719 | .owner = THIS_MODULE, |
| 1720 | .open = simple_open, |
| 1721 | }; |
| 1722 | |
| 1723 | static ssize_t pattern_dbgfs_read(struct file *filep, |
| 1724 | char __user *buf, size_t count, loff_t *ppos) |
| 1725 | { |
| 1726 | struct qti_hap_effect *effect = |
| 1727 | (struct qti_hap_effect *)filep->private_data; |
| 1728 | char *kbuf, *tmp; |
| 1729 | int rc, length, i, len; |
| 1730 | |
| 1731 | kbuf = kcalloc(CHAR_PER_PATTERN, effect->pattern_length, GFP_KERNEL); |
| 1732 | if (!kbuf) |
| 1733 | return -ENOMEM; |
| 1734 | |
| 1735 | tmp = kbuf; |
| 1736 | for (length = 0, i = 0; i < effect->pattern_length; i++) { |
| 1737 | len = snprintf(tmp, CHAR_PER_PATTERN, "0x%x ", |
| 1738 | effect->pattern[i]); |
| 1739 | tmp += len; |
| 1740 | length += len; |
| 1741 | } |
| 1742 | |
| 1743 | kbuf[length++] = '\n'; |
| 1744 | kbuf[length++] = '\0'; |
| 1745 | |
| 1746 | rc = simple_read_from_buffer(buf, count, ppos, kbuf, length); |
| 1747 | |
| 1748 | kfree(kbuf); |
| 1749 | return rc; |
| 1750 | } |
| 1751 | |
| 1752 | static ssize_t pattern_dbgfs_write(struct file *filep, |
| 1753 | const char __user *buf, size_t count, loff_t *ppos) |
| 1754 | { |
| 1755 | struct qti_hap_effect *effect = |
| 1756 | (struct qti_hap_effect *)filep->private_data; |
| 1757 | char *kbuf, *token; |
| 1758 | int rc = 0, i = 0, j; |
| 1759 | u32 val; |
| 1760 | |
| 1761 | kbuf = kmalloc(count + 1, GFP_KERNEL); |
| 1762 | if (!kbuf) |
| 1763 | return -ENOMEM; |
| 1764 | |
| 1765 | rc = copy_from_user(kbuf, buf, count); |
| 1766 | if (rc > 0) { |
| 1767 | rc = -EFAULT; |
| 1768 | goto err; |
| 1769 | } |
| 1770 | |
| 1771 | kbuf[count] = '\0'; |
| 1772 | *ppos += count; |
| 1773 | |
| 1774 | while ((token = strsep(&kbuf, " ")) != NULL) { |
| 1775 | rc = kstrtouint(token, 0, &val); |
| 1776 | if (rc < 0) { |
| 1777 | rc = -EINVAL; |
| 1778 | goto err; |
| 1779 | } |
| 1780 | |
| 1781 | effect->pattern[i++] = val & 0xff; |
| 1782 | |
| 1783 | if (i >= effect->pattern_length) |
| 1784 | break; |
| 1785 | } |
| 1786 | |
| 1787 | for (j = i; j < effect->pattern_length; j++) |
| 1788 | effect->pattern[j] = 0; |
| 1789 | |
| 1790 | rc = count; |
| 1791 | err: |
| 1792 | kfree(kbuf); |
| 1793 | return rc; |
| 1794 | } |
| 1795 | |
| 1796 | static const struct file_operations pattern_dbgfs_ops = { |
| 1797 | .read = pattern_dbgfs_read, |
| 1798 | .write = pattern_dbgfs_write, |
| 1799 | .owner = THIS_MODULE, |
| 1800 | .open = simple_open, |
| 1801 | }; |
| 1802 | |
| 1803 | static int create_effect_debug_files(struct qti_hap_effect *effect, |
| 1804 | struct dentry *dir) |
| 1805 | { |
| 1806 | struct dentry *file; |
| 1807 | |
| 1808 | file = debugfs_create_file("play_rate_us", 0644, dir, |
| 1809 | effect, &play_rate_debugfs_ops); |
| 1810 | if (!file) { |
| 1811 | pr_err("create play-rate debugfs node failed\n"); |
| 1812 | return -ENOMEM; |
| 1813 | } |
| 1814 | |
| 1815 | file = debugfs_create_file("vmax_mv", 0644, dir, |
| 1816 | effect, &vmax_debugfs_ops); |
| 1817 | if (!file) { |
| 1818 | pr_err("create vmax debugfs node failed\n"); |
| 1819 | return -ENOMEM; |
| 1820 | } |
| 1821 | |
| 1822 | file = debugfs_create_file("wf_repeat_n", 0644, dir, |
| 1823 | effect, &wf_repeat_n_debugfs_ops); |
| 1824 | if (!file) { |
| 1825 | pr_err("create wf-repeat debugfs node failed\n"); |
| 1826 | return -ENOMEM; |
| 1827 | } |
| 1828 | |
| 1829 | file = debugfs_create_file("wf_s_repeat_n", 0644, dir, |
| 1830 | effect, &wf_s_repeat_n_debugfs_ops); |
| 1831 | if (!file) { |
| 1832 | pr_err("create wf-s-repeat debugfs node failed\n"); |
| 1833 | return -ENOMEM; |
| 1834 | } |
| 1835 | |
| 1836 | file = debugfs_create_file("lra_auto_res_en", 0644, dir, |
| 1837 | effect, &auto_res_debugfs_ops); |
| 1838 | if (!file) { |
| 1839 | pr_err("create lra-auto-res-en debugfs node failed\n"); |
| 1840 | return -ENOMEM; |
| 1841 | } |
| 1842 | |
| 1843 | file = debugfs_create_file("brake", 0644, dir, |
| 1844 | effect, &brake_pattern_dbgfs_ops); |
| 1845 | if (!file) { |
| 1846 | pr_err("create brake debugfs node failed\n"); |
| 1847 | return -ENOMEM; |
| 1848 | } |
| 1849 | |
| 1850 | file = debugfs_create_file("pattern", 0644, dir, |
| 1851 | effect, &pattern_dbgfs_ops); |
| 1852 | if (!file) { |
| 1853 | pr_err("create pattern debugfs node failed\n"); |
| 1854 | return -ENOMEM; |
| 1855 | } |
| 1856 | |
| 1857 | return 0; |
| 1858 | } |
| 1859 | |
| 1860 | static int qti_haptics_add_debugfs(struct qti_hap_chip *chip) |
| 1861 | { |
| 1862 | struct dentry *hap_dir, *effect_dir; |
| 1863 | char str[12] = {0}; |
| 1864 | int i, rc = 0; |
| 1865 | |
| 1866 | hap_dir = debugfs_create_dir("haptics", NULL); |
| 1867 | if (!hap_dir) { |
| 1868 | pr_err("create haptics debugfs directory failed\n"); |
| 1869 | return -ENOMEM; |
| 1870 | } |
| 1871 | |
| 1872 | for (i = 0; i < chip->effects_count; i++) { |
| 1873 | snprintf(str, ARRAY_SIZE(str), "effect%d", i); |
| 1874 | effect_dir = debugfs_create_dir(str, hap_dir); |
| 1875 | if (!effect_dir) { |
| 1876 | pr_err("create %s debugfs directory failed\n", str); |
| 1877 | rc = -ENOMEM; |
| 1878 | goto cleanup; |
| 1879 | } |
| 1880 | |
| 1881 | rc = create_effect_debug_files(&chip->predefined[i], |
| 1882 | effect_dir); |
| 1883 | if (rc < 0) { |
| 1884 | rc = -ENOMEM; |
| 1885 | goto cleanup; |
| 1886 | } |
| 1887 | } |
| 1888 | |
| 1889 | chip->hap_debugfs = hap_dir; |
| 1890 | return 0; |
| 1891 | |
| 1892 | cleanup: |
| 1893 | debugfs_remove_recursive(hap_dir); |
| 1894 | return rc; |
| 1895 | } |
| 1896 | #endif |
| 1897 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1898 | static int qti_haptics_probe(struct platform_device *pdev) |
| 1899 | { |
| 1900 | struct qti_hap_chip *chip; |
| 1901 | struct input_dev *input_dev; |
| 1902 | struct ff_device *ff; |
| 1903 | int rc = 0, effect_count_max; |
| 1904 | |
| 1905 | chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); |
| 1906 | if (!chip) |
| 1907 | return -ENOMEM; |
| 1908 | |
| 1909 | input_dev = devm_input_allocate_device(&pdev->dev); |
| 1910 | if (!input_dev) |
| 1911 | return -ENOMEM; |
| 1912 | |
| 1913 | chip->pdev = pdev; |
| 1914 | chip->dev = &pdev->dev; |
| 1915 | chip->regmap = dev_get_regmap(chip->dev->parent, NULL); |
| 1916 | if (!chip->regmap) { |
| 1917 | dev_err(chip->dev, "Failed to get regmap handle\n"); |
| 1918 | return -ENXIO; |
| 1919 | } |
| 1920 | |
| 1921 | rc = qti_haptics_parse_dt(chip); |
| 1922 | if (rc < 0) { |
| 1923 | dev_err(chip->dev, "parse device-tree failed, rc=%d\n", rc); |
| 1924 | return rc; |
| 1925 | } |
| 1926 | |
| 1927 | spin_lock_init(&chip->bus_lock); |
| 1928 | |
| 1929 | rc = qti_haptics_hw_init(chip); |
| 1930 | if (rc < 0) { |
| 1931 | dev_err(chip->dev, "parse device-tree failed, rc=%d\n", rc); |
| 1932 | return rc; |
| 1933 | } |
| 1934 | |
| 1935 | rc = devm_request_threaded_irq(chip->dev, chip->play_irq, NULL, |
| 1936 | qti_haptics_play_irq_handler, |
| 1937 | IRQF_ONESHOT, "hap_play_irq", chip); |
| 1938 | if (rc < 0) { |
| 1939 | dev_err(chip->dev, "request play-irq failed, rc=%d\n", rc); |
| 1940 | return rc; |
| 1941 | } |
| 1942 | |
| 1943 | disable_irq(chip->play_irq); |
| 1944 | chip->play_irq_en = false; |
| 1945 | |
| 1946 | rc = devm_request_threaded_irq(chip->dev, chip->sc_irq, NULL, |
| 1947 | qti_haptics_sc_irq_handler, |
| 1948 | IRQF_ONESHOT, "hap_sc_irq", chip); |
| 1949 | if (rc < 0) { |
| 1950 | dev_err(chip->dev, "request sc-irq failed, rc=%d\n", rc); |
| 1951 | return rc; |
| 1952 | } |
| 1953 | |
Umang Chheda | 599b096 | 2020-01-20 17:15:54 +0530 | [diff] [blame] | 1954 | chip->twm_nb.notifier_call = twm_notifier_cb; |
| 1955 | rc = qpnp_misc_twm_notifier_register(&chip->twm_nb); |
| 1956 | if (rc < 0) |
| 1957 | pr_err("Failed to register twm_notifier_cb rc=%d\n", rc); |
| 1958 | |
Fenglin Wu | 30f10b2 | 2018-06-15 07:49:23 +0800 | [diff] [blame] | 1959 | hrtimer_init(&chip->stop_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
| 1960 | chip->stop_timer.function = qti_hap_stop_timer; |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 1961 | hrtimer_init(&chip->hap_disable_timer, CLOCK_MONOTONIC, |
| 1962 | HRTIMER_MODE_REL); |
| 1963 | chip->hap_disable_timer.function = qti_hap_disable_timer; |
Fenglin Wu | 37aa349 | 2018-07-10 10:58:49 +0800 | [diff] [blame] | 1964 | input_dev->name = "qti-haptics"; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1965 | input_set_drvdata(input_dev, chip); |
| 1966 | chip->input_dev = input_dev; |
| 1967 | |
| 1968 | input_set_capability(input_dev, EV_FF, FF_CONSTANT); |
Fenglin Wu | d92ef74 | 2018-07-16 15:50:08 +0800 | [diff] [blame] | 1969 | input_set_capability(input_dev, EV_FF, FF_GAIN); |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1970 | if (chip->effects_count != 0) { |
| 1971 | input_set_capability(input_dev, EV_FF, FF_PERIODIC); |
| 1972 | input_set_capability(input_dev, EV_FF, FF_CUSTOM); |
| 1973 | } |
| 1974 | |
| 1975 | if (chip->effects_count + 1 > FF_EFFECT_COUNT_MAX) |
| 1976 | effect_count_max = chip->effects_count + 1; |
| 1977 | else |
| 1978 | effect_count_max = FF_EFFECT_COUNT_MAX; |
| 1979 | rc = input_ff_create(input_dev, effect_count_max); |
| 1980 | if (rc < 0) { |
| 1981 | dev_err(chip->dev, "create FF input device failed, rc=%d\n", |
| 1982 | rc); |
| 1983 | return rc; |
| 1984 | } |
| 1985 | |
| 1986 | ff = input_dev->ff; |
| 1987 | ff->upload = qti_haptics_upload_effect; |
| 1988 | ff->playback = qti_haptics_playback; |
| 1989 | ff->erase = qti_haptics_erase; |
Fenglin Wu | d92ef74 | 2018-07-16 15:50:08 +0800 | [diff] [blame] | 1990 | ff->set_gain = qti_haptics_set_gain; |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 1991 | |
| 1992 | rc = input_register_device(input_dev); |
| 1993 | if (rc < 0) { |
| 1994 | dev_err(chip->dev, "register input device failed, rc=%d\n", |
| 1995 | rc); |
| 1996 | goto destroy_ff; |
| 1997 | } |
| 1998 | |
| 1999 | dev_set_drvdata(chip->dev, chip); |
Fenglin Wu | 22e4cf1 | 2018-08-01 15:07:28 +0800 | [diff] [blame] | 2000 | #ifdef CONFIG_DEBUG_FS |
| 2001 | rc = qti_haptics_add_debugfs(chip); |
| 2002 | if (rc < 0) |
| 2003 | dev_dbg(chip->dev, "create debugfs failed, rc=%d\n", rc); |
| 2004 | #endif |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 2005 | return 0; |
| 2006 | |
| 2007 | destroy_ff: |
| 2008 | input_ff_destroy(chip->input_dev); |
Umang Chheda | 599b096 | 2020-01-20 17:15:54 +0530 | [diff] [blame] | 2009 | qpnp_misc_twm_notifier_unregister(&chip->twm_nb); |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 2010 | return rc; |
| 2011 | } |
| 2012 | |
| 2013 | static int qti_haptics_remove(struct platform_device *pdev) |
| 2014 | { |
| 2015 | struct qti_hap_chip *chip = dev_get_drvdata(&pdev->dev); |
| 2016 | |
Fenglin Wu | 22e4cf1 | 2018-08-01 15:07:28 +0800 | [diff] [blame] | 2017 | #ifdef CONFIG_DEBUG_FS |
| 2018 | debugfs_remove_recursive(chip->hap_debugfs); |
| 2019 | #endif |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 2020 | input_ff_destroy(chip->input_dev); |
Umang Chheda | 599b096 | 2020-01-20 17:15:54 +0530 | [diff] [blame] | 2021 | qpnp_misc_twm_notifier_unregister(&chip->twm_nb); |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 2022 | dev_set_drvdata(chip->dev, NULL); |
| 2023 | |
| 2024 | return 0; |
| 2025 | } |
| 2026 | |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 2027 | static void qti_haptics_shutdown(struct platform_device *pdev) |
| 2028 | { |
| 2029 | struct qti_hap_chip *chip = dev_get_drvdata(&pdev->dev); |
| 2030 | int rc; |
| 2031 | |
| 2032 | dev_dbg(chip->dev, "Shutdown!\n"); |
| 2033 | |
| 2034 | qti_haptics_module_en(chip, false); |
| 2035 | |
| 2036 | if (chip->vdd_supply && chip->vdd_enabled) { |
| 2037 | rc = regulator_disable(chip->vdd_supply); |
| 2038 | if (rc < 0) { |
| 2039 | dev_err(chip->dev, "Disable VDD supply failed, rc=%d\n", |
| 2040 | rc); |
| 2041 | return; |
| 2042 | } |
| 2043 | chip->vdd_enabled = false; |
| 2044 | } |
Umang Chheda | 599b096 | 2020-01-20 17:15:54 +0530 | [diff] [blame] | 2045 | |
| 2046 | if (chip->twm_state == PMIC_TWM_ENABLE && chip->haptics_ext_pin_twm) { |
| 2047 | rc = qti_haptics_twm_config(chip); |
| 2048 | if (rc < 0) |
| 2049 | pr_err("Haptics TWM config failed rc=%d\n", rc); |
| 2050 | } |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 2051 | } |
| 2052 | |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 2053 | static const struct of_device_id haptics_match_table[] = { |
| 2054 | { .compatible = "qcom,haptics" }, |
| 2055 | { .compatible = "qcom,pm660-haptics" }, |
| 2056 | { .compatible = "qcom,pm8150b-haptics" }, |
| 2057 | {}, |
| 2058 | }; |
| 2059 | |
| 2060 | static struct platform_driver qti_haptics_driver = { |
| 2061 | .driver = { |
| 2062 | .name = "qcom,haptics", |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 2063 | .owner = THIS_MODULE, |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 2064 | .of_match_table = haptics_match_table, |
| 2065 | }, |
| 2066 | .probe = qti_haptics_probe, |
| 2067 | .remove = qti_haptics_remove, |
Fenglin Wu | 802427a | 2018-08-31 16:07:59 +0800 | [diff] [blame] | 2068 | .shutdown = qti_haptics_shutdown, |
Fenglin Wu | 3840f8e | 2018-04-27 13:48:43 +0800 | [diff] [blame] | 2069 | }; |
| 2070 | module_platform_driver(qti_haptics_driver); |
| 2071 | |
| 2072 | MODULE_DESCRIPTION("QTI haptics driver"); |
| 2073 | MODULE_LICENSE("GPL v2"); |