blob: 80b7ea894ce3a7af47564327c5168f60c1e53cdc [file] [log] [blame]
Arun kumardb962812018-05-30 16:31:52 +05301/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#ifndef __MDSS_SPI_PANEL_H__
15#define __MDSS_SPI_PANEL_H__
16
17#if defined(CONFIG_FB_MSM_MDSS_SPI_PANEL) && defined(CONFIG_SPI_QUP)
18#include <linux/list.h>
19#include <linux/mdss_io_util.h>
20#include <linux/irqreturn.h>
21#include <linux/pinctrl/consumer.h>
22#include <linux/gpio.h>
23
24#include "mdss_panel.h"
25#include "mdp3_dma.h"
26
27#define MDSS_MAX_BL_BRIGHTNESS 255
28
29#define MDSS_SPI_RST_SEQ_LEN 10
30
31#define NONE_PANEL "none"
32
33#define CTRL_STATE_UNKNOWN 0x00
34#define CTRL_STATE_PANEL_INIT BIT(0)
35#define CTRL_STATE_MDP_ACTIVE BIT(1)
36
37#define MDSS_PINCTRL_STATE_DEFAULT "mdss_default"
38#define MDSS_PINCTRL_STATE_SLEEP "mdss_sleep"
39#define SPI_PANEL_TE_TIMEOUT 400
40
41enum spi_panel_data_type {
42 panel_cmd,
43 panel_parameter,
44 panel_pixel,
45 UNKNOWN_FORMAT,
46};
47
48enum spi_panel_bl_ctrl {
49 SPI_BL_PWM,
50 SPI_BL_WLED,
51 SPI_BL_DCS_CMD,
52 SPI_UNKNOWN_CTRL,
53};
54
55struct spi_pinctrl_res {
56 struct pinctrl *pinctrl;
57 struct pinctrl_state *gpio_state_active;
58 struct pinctrl_state *gpio_state_suspend;
59};
60#define SPI_PANEL_DST_FORMAT_RGB565 0
61
62struct spi_ctrl_hdr {
63 char wait; /* ms */
64 char dlen; /* 8 bits */
65};
66
67struct spi_cmd_desc {
68 struct spi_ctrl_hdr dchdr;
69 char *command;
70 char *parameter;
71};
72
73struct spi_panel_cmds {
74 char *buf;
75 int blen;
76 struct spi_cmd_desc *cmds;
77 int cmd_cnt;
78};
79
80enum spi_panel_status_mode {
81 SPI_ESD_REG,
82 SPI_SEND_PANEL_COMMAND,
83 SPI_ESD_MAX,
84};
85
86
87struct spi_panel_data {
88 struct mdss_panel_data panel_data;
89 struct mdss_util_intf *mdss_util;
90 struct spi_pinctrl_res pin_res;
91 struct mdss_module_power panel_power_data;
92 struct completion spi_panel_te;
93 struct mdp3_notification vsync_client;
94 unsigned int vsync_status;
95 int byte_pre_frame;
96 char *tx_buf;
97 u8 ctrl_state;
98 int disp_te_gpio;
99 int rst_gpio;
100 int disp_dc_gpio; /* command or data */
101 struct spi_panel_cmds on_cmds;
102 struct spi_panel_cmds off_cmds;
103 bool (*check_status)(struct spi_panel_data *pdata);
104 int (*on)(struct mdss_panel_data *pdata);
105 int (*off)(struct mdss_panel_data *pdata);
106 struct mutex spi_tx_mutex;
107 struct pwm_device *pwm_bl;
108 int bklt_ctrl; /* backlight ctrl */
109 bool pwm_pmi;
110 int pwm_period;
111 int pwm_pmic_gpio;
112 int pwm_lpg_chan;
113 int pwm_enabled;
114 int bklt_max;
115 int status_mode;
116 u32 status_cmds_rlen;
117 u8 panel_status_reg;
118 u8 *exp_status_value;
119 u8 *act_status_value;
120 unsigned char *return_buf;
121};
122
123int mdss_spi_panel_kickoff(struct mdss_panel_data *pdata,
124 char *buf, int len, int stride);
125int is_spi_panel_continuous_splash_on(struct mdss_panel_data *pdata);
126void mdp3_spi_vsync_enable(struct mdss_panel_data *pdata,
127 struct mdp3_notification *vsync_client);
128void mdp3_check_spi_panel_status(struct work_struct *work,
129 uint32_t interval);
130
131#else
132static inline int mdss_spi_panel_kickoff(struct mdss_panel_data *pdata,
133 char *buf, int len, int stride){
134 return 0;
135}
136static inline int is_spi_panel_continuous_splash_on(
137 struct mdss_panel_data *pdata)
138{
139 return 0;
140}
141static inline int mdp3_spi_vsync_enable(struct mdss_panel_data *pdata,
142 struct mdp3_notification *vsync_client){
143 return 0;
144}
145
146#endif/* End of CONFIG_FB_MSM_MDSS_SPI_PANEL && ONFIG_SPI_QUP */
147
148#endif /* End of __MDSS_SPI_PANEL_H__ */