blob: f199e69a5d0b0a83fd39e7d5464a5fa439c79265 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * include/asm-alpha/cache.h
3 */
4#ifndef __ARCH_ALPHA_CACHE_H
5#define __ARCH_ALPHA_CACHE_H
6
Linus Torvalds1da177e2005-04-16 15:20:36 -07007
8/* Bytes per L1 (data) cache line. */
9#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EV6)
10# define L1_CACHE_BYTES 64
11# define L1_CACHE_SHIFT 6
12#else
13/* Both EV4 and EV5 are write-through, read-allocate,
14 direct-mapped, physical.
15*/
16# define L1_CACHE_BYTES 32
17# define L1_CACHE_SHIFT 5
18#endif
19
20#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
21#define SMP_CACHE_BYTES L1_CACHE_BYTES
Linus Torvalds1da177e2005-04-16 15:20:36 -070022
23#endif