blob: 8eedeef375d606961db5235b8d3c60d2eb184d51 [file] [log] [blame]
Will Deacon478fcb22012-03-05 11:49:33 +00001/*
2 * Based on arch/arm/kernel/ptrace.c
3 *
4 * By Ross Biro 1/23/92
5 * edited by Linus Torvalds
6 * ARM modifications Copyright (C) 2000 Russell King
7 * Copyright (C) 2012 ARM Ltd.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
AKASHI Takahiro5701ede2014-07-04 08:28:31 +010022#include <linux/audit.h>
AKASHI Takahirofd92d4a2014-04-30 10:51:32 +010023#include <linux/compat.h>
Will Deacon478fcb22012-03-05 11:49:33 +000024#include <linux/kernel.h>
25#include <linux/sched.h>
26#include <linux/mm.h>
27#include <linux/smp.h>
28#include <linux/ptrace.h>
29#include <linux/user.h>
AKASHI Takahiroa1ae65b2014-11-28 05:26:39 +000030#include <linux/seccomp.h>
Will Deacon478fcb22012-03-05 11:49:33 +000031#include <linux/security.h>
32#include <linux/init.h>
33#include <linux/signal.h>
34#include <linux/uaccess.h>
35#include <linux/perf_event.h>
36#include <linux/hw_breakpoint.h>
37#include <linux/regset.h>
38#include <linux/tracehook.h>
39#include <linux/elf.h>
40
41#include <asm/compat.h>
42#include <asm/debug-monitors.h>
43#include <asm/pgtable.h>
AKASHI Takahiro5701ede2014-07-04 08:28:31 +010044#include <asm/syscall.h>
Will Deacon478fcb22012-03-05 11:49:33 +000045#include <asm/traps.h>
46#include <asm/system_misc.h>
47
AKASHI Takahiro055b1212014-04-30 10:54:36 +010048#define CREATE_TRACE_POINTS
49#include <trace/events/syscalls.h>
50
David A. Long0a8ea522016-07-08 12:35:45 -040051struct pt_regs_offset {
52 const char *name;
53 int offset;
54};
55
56#define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
57#define REG_OFFSET_END {.name = NULL, .offset = 0}
58#define GPR_OFFSET_NAME(r) \
59 {.name = "x" #r, .offset = offsetof(struct pt_regs, regs[r])}
60
61static const struct pt_regs_offset regoffset_table[] = {
62 GPR_OFFSET_NAME(0),
63 GPR_OFFSET_NAME(1),
64 GPR_OFFSET_NAME(2),
65 GPR_OFFSET_NAME(3),
66 GPR_OFFSET_NAME(4),
67 GPR_OFFSET_NAME(5),
68 GPR_OFFSET_NAME(6),
69 GPR_OFFSET_NAME(7),
70 GPR_OFFSET_NAME(8),
71 GPR_OFFSET_NAME(9),
72 GPR_OFFSET_NAME(10),
73 GPR_OFFSET_NAME(11),
74 GPR_OFFSET_NAME(12),
75 GPR_OFFSET_NAME(13),
76 GPR_OFFSET_NAME(14),
77 GPR_OFFSET_NAME(15),
78 GPR_OFFSET_NAME(16),
79 GPR_OFFSET_NAME(17),
80 GPR_OFFSET_NAME(18),
81 GPR_OFFSET_NAME(19),
82 GPR_OFFSET_NAME(20),
83 GPR_OFFSET_NAME(21),
84 GPR_OFFSET_NAME(22),
85 GPR_OFFSET_NAME(23),
86 GPR_OFFSET_NAME(24),
87 GPR_OFFSET_NAME(25),
88 GPR_OFFSET_NAME(26),
89 GPR_OFFSET_NAME(27),
90 GPR_OFFSET_NAME(28),
91 GPR_OFFSET_NAME(29),
92 GPR_OFFSET_NAME(30),
93 {.name = "lr", .offset = offsetof(struct pt_regs, regs[30])},
94 REG_OFFSET_NAME(sp),
95 REG_OFFSET_NAME(pc),
96 REG_OFFSET_NAME(pstate),
97 REG_OFFSET_END,
98};
99
100/**
101 * regs_query_register_offset() - query register offset from its name
102 * @name: the name of a register
103 *
104 * regs_query_register_offset() returns the offset of a register in struct
105 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
106 */
107int regs_query_register_offset(const char *name)
108{
109 const struct pt_regs_offset *roff;
110
111 for (roff = regoffset_table; roff->name != NULL; roff++)
112 if (!strcmp(roff->name, name))
113 return roff->offset;
114 return -EINVAL;
115}
116
117/**
118 * regs_within_kernel_stack() - check the address in the stack
119 * @regs: pt_regs which contains kernel stack pointer.
120 * @addr: address which is checked.
121 *
122 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
123 * If @addr is within the kernel stack, it returns true. If not, returns false.
124 */
125static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
126{
127 return ((addr & ~(THREAD_SIZE - 1)) ==
128 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) ||
129 on_irq_stack(addr, raw_smp_processor_id());
130}
131
132/**
133 * regs_get_kernel_stack_nth() - get Nth entry of the stack
134 * @regs: pt_regs which contains kernel stack pointer.
135 * @n: stack entry number.
136 *
137 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
138 * is specified by @regs. If the @n th entry is NOT in the kernel stack,
139 * this returns 0.
140 */
141unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
142{
143 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
144
145 addr += n;
146 if (regs_within_kernel_stack(regs, (unsigned long)addr))
147 return *addr;
148 else
149 return 0;
150}
151
Will Deacon478fcb22012-03-05 11:49:33 +0000152/*
153 * TODO: does not yet catch signals sent when the child dies.
154 * in exit.c or in signal.c.
155 */
156
157/*
158 * Called by kernel/ptrace.c when detaching..
159 */
160void ptrace_disable(struct task_struct *child)
161{
John Blackwood5db4fd82015-12-07 11:50:34 +0000162 /*
163 * This would be better off in core code, but PTRACE_DETACH has
164 * grown its fair share of arch-specific worts and changing it
165 * is likely to cause regressions on obscure architectures.
166 */
167 user_disable_single_step(child);
Will Deacon478fcb22012-03-05 11:49:33 +0000168}
169
Will Deacon478fcb22012-03-05 11:49:33 +0000170#ifdef CONFIG_HAVE_HW_BREAKPOINT
171/*
172 * Handle hitting a HW-breakpoint.
173 */
174static void ptrace_hbptriggered(struct perf_event *bp,
175 struct perf_sample_data *data,
176 struct pt_regs *regs)
177{
178 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
179 siginfo_t info = {
180 .si_signo = SIGTRAP,
181 .si_errno = 0,
182 .si_code = TRAP_HWBKPT,
183 .si_addr = (void __user *)(bkpt->trigger),
184 };
185
186#ifdef CONFIG_COMPAT
187 int i;
188
189 if (!is_compat_task())
190 goto send_sig;
191
192 for (i = 0; i < ARM_MAX_BRP; ++i) {
193 if (current->thread.debug.hbp_break[i] == bp) {
194 info.si_errno = (i << 1) + 1;
195 break;
196 }
197 }
Will Deacon27d7ff22014-08-22 14:13:24 +0100198
199 for (i = 0; i < ARM_MAX_WRP; ++i) {
Will Deacon478fcb22012-03-05 11:49:33 +0000200 if (current->thread.debug.hbp_watch[i] == bp) {
201 info.si_errno = -((i << 1) + 1);
202 break;
203 }
204 }
205
206send_sig:
207#endif
208 force_sig_info(SIGTRAP, &info, current);
209}
210
211/*
212 * Unregister breakpoints from this task and reset the pointers in
213 * the thread_struct.
214 */
215void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
216{
217 int i;
218 struct thread_struct *t = &tsk->thread;
219
220 for (i = 0; i < ARM_MAX_BRP; i++) {
221 if (t->debug.hbp_break[i]) {
222 unregister_hw_breakpoint(t->debug.hbp_break[i]);
223 t->debug.hbp_break[i] = NULL;
224 }
225 }
226
227 for (i = 0; i < ARM_MAX_WRP; i++) {
228 if (t->debug.hbp_watch[i]) {
229 unregister_hw_breakpoint(t->debug.hbp_watch[i]);
230 t->debug.hbp_watch[i] = NULL;
231 }
232 }
233}
234
235void ptrace_hw_copy_thread(struct task_struct *tsk)
236{
237 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
238}
239
240static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
241 struct task_struct *tsk,
242 unsigned long idx)
243{
244 struct perf_event *bp = ERR_PTR(-EINVAL);
245
246 switch (note_type) {
247 case NT_ARM_HW_BREAK:
248 if (idx < ARM_MAX_BRP)
249 bp = tsk->thread.debug.hbp_break[idx];
250 break;
251 case NT_ARM_HW_WATCH:
252 if (idx < ARM_MAX_WRP)
253 bp = tsk->thread.debug.hbp_watch[idx];
254 break;
255 }
256
257 return bp;
258}
259
260static int ptrace_hbp_set_event(unsigned int note_type,
261 struct task_struct *tsk,
262 unsigned long idx,
263 struct perf_event *bp)
264{
265 int err = -EINVAL;
266
267 switch (note_type) {
268 case NT_ARM_HW_BREAK:
269 if (idx < ARM_MAX_BRP) {
270 tsk->thread.debug.hbp_break[idx] = bp;
271 err = 0;
272 }
273 break;
274 case NT_ARM_HW_WATCH:
275 if (idx < ARM_MAX_WRP) {
276 tsk->thread.debug.hbp_watch[idx] = bp;
277 err = 0;
278 }
279 break;
280 }
281
282 return err;
283}
284
285static struct perf_event *ptrace_hbp_create(unsigned int note_type,
286 struct task_struct *tsk,
287 unsigned long idx)
288{
289 struct perf_event *bp;
290 struct perf_event_attr attr;
291 int err, type;
292
293 switch (note_type) {
294 case NT_ARM_HW_BREAK:
295 type = HW_BREAKPOINT_X;
296 break;
297 case NT_ARM_HW_WATCH:
298 type = HW_BREAKPOINT_RW;
299 break;
300 default:
301 return ERR_PTR(-EINVAL);
302 }
303
304 ptrace_breakpoint_init(&attr);
305
306 /*
307 * Initialise fields to sane defaults
308 * (i.e. values that will pass validation).
309 */
310 attr.bp_addr = 0;
311 attr.bp_len = HW_BREAKPOINT_LEN_4;
312 attr.bp_type = type;
313 attr.disabled = 1;
314
315 bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
316 if (IS_ERR(bp))
317 return bp;
318
319 err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
320 if (err)
321 return ERR_PTR(err);
322
323 return bp;
324}
325
326static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
327 struct arch_hw_breakpoint_ctrl ctrl,
328 struct perf_event_attr *attr)
329{
Will Deacon8f34a1d2012-10-18 15:17:00 +0100330 int err, len, type, disabled = !ctrl.enabled;
Will Deacon478fcb22012-03-05 11:49:33 +0000331
Will Deaconcdc27c22013-12-17 17:09:08 +0000332 attr->disabled = disabled;
333 if (disabled)
334 return 0;
Will Deacon478fcb22012-03-05 11:49:33 +0000335
Will Deaconcdc27c22013-12-17 17:09:08 +0000336 err = arch_bp_generic_fields(ctrl, &len, &type);
337 if (err)
338 return err;
339
340 switch (note_type) {
341 case NT_ARM_HW_BREAK:
342 if ((type & HW_BREAKPOINT_X) != type)
Will Deacon478fcb22012-03-05 11:49:33 +0000343 return -EINVAL;
Will Deaconcdc27c22013-12-17 17:09:08 +0000344 break;
345 case NT_ARM_HW_WATCH:
346 if ((type & HW_BREAKPOINT_RW) != type)
347 return -EINVAL;
348 break;
349 default:
350 return -EINVAL;
Will Deacon478fcb22012-03-05 11:49:33 +0000351 }
352
353 attr->bp_len = len;
354 attr->bp_type = type;
Will Deacon478fcb22012-03-05 11:49:33 +0000355
356 return 0;
357}
358
359static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
360{
361 u8 num;
362 u32 reg = 0;
363
364 switch (note_type) {
365 case NT_ARM_HW_BREAK:
366 num = hw_breakpoint_slots(TYPE_INST);
367 break;
368 case NT_ARM_HW_WATCH:
369 num = hw_breakpoint_slots(TYPE_DATA);
370 break;
371 default:
372 return -EINVAL;
373 }
374
375 reg |= debug_monitors_arch();
376 reg <<= 8;
377 reg |= num;
378
379 *info = reg;
380 return 0;
381}
382
383static int ptrace_hbp_get_ctrl(unsigned int note_type,
384 struct task_struct *tsk,
385 unsigned long idx,
386 u32 *ctrl)
387{
388 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
389
390 if (IS_ERR(bp))
391 return PTR_ERR(bp);
392
393 *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
394 return 0;
395}
396
397static int ptrace_hbp_get_addr(unsigned int note_type,
398 struct task_struct *tsk,
399 unsigned long idx,
400 u64 *addr)
401{
402 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
403
404 if (IS_ERR(bp))
405 return PTR_ERR(bp);
406
407 *addr = bp ? bp->attr.bp_addr : 0;
408 return 0;
409}
410
411static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
412 struct task_struct *tsk,
413 unsigned long idx)
414{
415 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
416
417 if (!bp)
418 bp = ptrace_hbp_create(note_type, tsk, idx);
419
420 return bp;
421}
422
423static int ptrace_hbp_set_ctrl(unsigned int note_type,
424 struct task_struct *tsk,
425 unsigned long idx,
426 u32 uctrl)
427{
428 int err;
429 struct perf_event *bp;
430 struct perf_event_attr attr;
431 struct arch_hw_breakpoint_ctrl ctrl;
432
433 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
434 if (IS_ERR(bp)) {
435 err = PTR_ERR(bp);
436 return err;
437 }
438
439 attr = bp->attr;
440 decode_ctrl_reg(uctrl, &ctrl);
441 err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
442 if (err)
443 return err;
444
445 return modify_user_hw_breakpoint(bp, &attr);
446}
447
448static int ptrace_hbp_set_addr(unsigned int note_type,
449 struct task_struct *tsk,
450 unsigned long idx,
451 u64 addr)
452{
453 int err;
454 struct perf_event *bp;
455 struct perf_event_attr attr;
456
457 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
458 if (IS_ERR(bp)) {
459 err = PTR_ERR(bp);
460 return err;
461 }
462
463 attr = bp->attr;
464 attr.bp_addr = addr;
465 err = modify_user_hw_breakpoint(bp, &attr);
466 return err;
467}
468
469#define PTRACE_HBP_ADDR_SZ sizeof(u64)
470#define PTRACE_HBP_CTRL_SZ sizeof(u32)
Will Deacon7797d172012-10-11 12:10:57 +0100471#define PTRACE_HBP_PAD_SZ sizeof(u32)
Will Deacon478fcb22012-03-05 11:49:33 +0000472
473static int hw_break_get(struct task_struct *target,
474 const struct user_regset *regset,
475 unsigned int pos, unsigned int count,
476 void *kbuf, void __user *ubuf)
477{
478 unsigned int note_type = regset->core_note_type;
Will Deacon7797d172012-10-11 12:10:57 +0100479 int ret, idx = 0, offset, limit;
Will Deacon478fcb22012-03-05 11:49:33 +0000480 u32 info, ctrl;
481 u64 addr;
482
483 /* Resource info */
484 ret = ptrace_hbp_get_resource_info(note_type, &info);
485 if (ret)
486 return ret;
487
Will Deacon7797d172012-10-11 12:10:57 +0100488 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0,
489 sizeof(info));
490 if (ret)
491 return ret;
492
493 /* Pad */
494 offset = offsetof(struct user_hwdebug_state, pad);
495 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offset,
496 offset + PTRACE_HBP_PAD_SZ);
Will Deacon478fcb22012-03-05 11:49:33 +0000497 if (ret)
498 return ret;
499
500 /* (address, ctrl) registers */
Will Deacon7797d172012-10-11 12:10:57 +0100501 offset = offsetof(struct user_hwdebug_state, dbg_regs);
Will Deacon478fcb22012-03-05 11:49:33 +0000502 limit = regset->n * regset->size;
503 while (count && offset < limit) {
504 ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
505 if (ret)
506 return ret;
507 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &addr,
508 offset, offset + PTRACE_HBP_ADDR_SZ);
509 if (ret)
510 return ret;
511 offset += PTRACE_HBP_ADDR_SZ;
512
513 ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
514 if (ret)
515 return ret;
516 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &ctrl,
517 offset, offset + PTRACE_HBP_CTRL_SZ);
518 if (ret)
519 return ret;
520 offset += PTRACE_HBP_CTRL_SZ;
Will Deacon7797d172012-10-11 12:10:57 +0100521
522 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
523 offset,
524 offset + PTRACE_HBP_PAD_SZ);
525 if (ret)
526 return ret;
527 offset += PTRACE_HBP_PAD_SZ;
Will Deacon478fcb22012-03-05 11:49:33 +0000528 idx++;
529 }
530
531 return 0;
532}
533
534static int hw_break_set(struct task_struct *target,
535 const struct user_regset *regset,
536 unsigned int pos, unsigned int count,
537 const void *kbuf, const void __user *ubuf)
538{
539 unsigned int note_type = regset->core_note_type;
Will Deacon7797d172012-10-11 12:10:57 +0100540 int ret, idx = 0, offset, limit;
Will Deacon478fcb22012-03-05 11:49:33 +0000541 u32 ctrl;
542 u64 addr;
543
Will Deacon7797d172012-10-11 12:10:57 +0100544 /* Resource info and pad */
545 offset = offsetof(struct user_hwdebug_state, dbg_regs);
546 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
Will Deacon478fcb22012-03-05 11:49:33 +0000547 if (ret)
548 return ret;
549
550 /* (address, ctrl) registers */
551 limit = regset->n * regset->size;
552 while (count && offset < limit) {
Dave Martin6e53a622017-01-18 16:25:24 +0000553 if (count < PTRACE_HBP_ADDR_SZ)
554 return -EINVAL;
Will Deacon478fcb22012-03-05 11:49:33 +0000555 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
556 offset, offset + PTRACE_HBP_ADDR_SZ);
557 if (ret)
558 return ret;
559 ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
560 if (ret)
561 return ret;
562 offset += PTRACE_HBP_ADDR_SZ;
563
Dave Martin6e53a622017-01-18 16:25:24 +0000564 if (!count)
565 break;
Will Deacon478fcb22012-03-05 11:49:33 +0000566 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
567 offset, offset + PTRACE_HBP_CTRL_SZ);
568 if (ret)
569 return ret;
570 ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
571 if (ret)
572 return ret;
573 offset += PTRACE_HBP_CTRL_SZ;
Will Deacon7797d172012-10-11 12:10:57 +0100574
575 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
576 offset,
577 offset + PTRACE_HBP_PAD_SZ);
578 if (ret)
579 return ret;
580 offset += PTRACE_HBP_PAD_SZ;
Will Deacon478fcb22012-03-05 11:49:33 +0000581 idx++;
582 }
583
584 return 0;
585}
586#endif /* CONFIG_HAVE_HW_BREAKPOINT */
587
588static int gpr_get(struct task_struct *target,
589 const struct user_regset *regset,
590 unsigned int pos, unsigned int count,
591 void *kbuf, void __user *ubuf)
592{
593 struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
594 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
595}
596
597static int gpr_set(struct task_struct *target, const struct user_regset *regset,
598 unsigned int pos, unsigned int count,
599 const void *kbuf, const void __user *ubuf)
600{
601 int ret;
Dave Martin357cfd62017-01-18 16:25:20 +0000602 struct user_pt_regs newregs = task_pt_regs(target)->user_regs;
Will Deacon478fcb22012-03-05 11:49:33 +0000603
604 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
605 if (ret)
606 return ret;
607
Mark Rutlanddbd4d7c2016-03-01 14:18:50 +0000608 if (!valid_user_regs(&newregs, target))
Will Deacon478fcb22012-03-05 11:49:33 +0000609 return -EINVAL;
610
611 task_pt_regs(target)->user_regs = newregs;
612 return 0;
613}
614
615/*
616 * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
617 */
618static int fpr_get(struct task_struct *target, const struct user_regset *regset,
619 unsigned int pos, unsigned int count,
620 void *kbuf, void __user *ubuf)
621{
622 struct user_fpsimd_state *uregs;
623 uregs = &target->thread.fpsimd_state.user_fpsimd;
624 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
625}
626
627static int fpr_set(struct task_struct *target, const struct user_regset *regset,
628 unsigned int pos, unsigned int count,
629 const void *kbuf, const void __user *ubuf)
630{
631 int ret;
Dave Martin357cfd62017-01-18 16:25:20 +0000632 struct user_fpsimd_state newstate =
633 target->thread.fpsimd_state.user_fpsimd;
Will Deacon478fcb22012-03-05 11:49:33 +0000634
635 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
636 if (ret)
637 return ret;
638
639 target->thread.fpsimd_state.user_fpsimd = newstate;
Ard Biesheuvel005f78c2014-05-08 11:20:23 +0200640 fpsimd_flush_task_state(target);
Will Deacon478fcb22012-03-05 11:49:33 +0000641 return ret;
642}
643
644static int tls_get(struct task_struct *target, const struct user_regset *regset,
645 unsigned int pos, unsigned int count,
646 void *kbuf, void __user *ubuf)
647{
648 unsigned long *tls = &target->thread.tp_value;
649 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, tls, 0, -1);
650}
651
652static int tls_set(struct task_struct *target, const struct user_regset *regset,
653 unsigned int pos, unsigned int count,
654 const void *kbuf, const void __user *ubuf)
655{
656 int ret;
Dave Martin357cfd62017-01-18 16:25:20 +0000657 unsigned long tls = target->thread.tp_value;
Will Deacon478fcb22012-03-05 11:49:33 +0000658
659 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
660 if (ret)
661 return ret;
662
663 target->thread.tp_value = tls;
664 return ret;
665}
666
AKASHI Takahiro766a85d2014-11-28 05:26:34 +0000667static int system_call_get(struct task_struct *target,
668 const struct user_regset *regset,
669 unsigned int pos, unsigned int count,
670 void *kbuf, void __user *ubuf)
671{
672 int syscallno = task_pt_regs(target)->syscallno;
673
674 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
675 &syscallno, 0, -1);
676}
677
678static int system_call_set(struct task_struct *target,
679 const struct user_regset *regset,
680 unsigned int pos, unsigned int count,
681 const void *kbuf, const void __user *ubuf)
682{
Dave Martina4aafb82017-01-18 16:25:21 +0000683 int syscallno = task_pt_regs(target)->syscallno;
684 int ret;
AKASHI Takahiro766a85d2014-11-28 05:26:34 +0000685
686 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
687 if (ret)
688 return ret;
689
690 task_pt_regs(target)->syscallno = syscallno;
691 return ret;
692}
693
Will Deacon478fcb22012-03-05 11:49:33 +0000694enum aarch64_regset {
695 REGSET_GPR,
696 REGSET_FPR,
697 REGSET_TLS,
698#ifdef CONFIG_HAVE_HW_BREAKPOINT
699 REGSET_HW_BREAK,
700 REGSET_HW_WATCH,
701#endif
AKASHI Takahiro766a85d2014-11-28 05:26:34 +0000702 REGSET_SYSTEM_CALL,
Will Deacon478fcb22012-03-05 11:49:33 +0000703};
704
705static const struct user_regset aarch64_regsets[] = {
706 [REGSET_GPR] = {
707 .core_note_type = NT_PRSTATUS,
708 .n = sizeof(struct user_pt_regs) / sizeof(u64),
709 .size = sizeof(u64),
710 .align = sizeof(u64),
711 .get = gpr_get,
712 .set = gpr_set
713 },
714 [REGSET_FPR] = {
715 .core_note_type = NT_PRFPREG,
716 .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
717 /*
718 * We pretend we have 32-bit registers because the fpsr and
719 * fpcr are 32-bits wide.
720 */
721 .size = sizeof(u32),
722 .align = sizeof(u32),
723 .get = fpr_get,
724 .set = fpr_set
725 },
726 [REGSET_TLS] = {
727 .core_note_type = NT_ARM_TLS,
728 .n = 1,
729 .size = sizeof(void *),
730 .align = sizeof(void *),
731 .get = tls_get,
732 .set = tls_set,
733 },
734#ifdef CONFIG_HAVE_HW_BREAKPOINT
735 [REGSET_HW_BREAK] = {
736 .core_note_type = NT_ARM_HW_BREAK,
737 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
738 .size = sizeof(u32),
739 .align = sizeof(u32),
740 .get = hw_break_get,
741 .set = hw_break_set,
742 },
743 [REGSET_HW_WATCH] = {
744 .core_note_type = NT_ARM_HW_WATCH,
745 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
746 .size = sizeof(u32),
747 .align = sizeof(u32),
748 .get = hw_break_get,
749 .set = hw_break_set,
750 },
751#endif
AKASHI Takahiro766a85d2014-11-28 05:26:34 +0000752 [REGSET_SYSTEM_CALL] = {
753 .core_note_type = NT_ARM_SYSTEM_CALL,
754 .n = 1,
755 .size = sizeof(int),
756 .align = sizeof(int),
757 .get = system_call_get,
758 .set = system_call_set,
759 },
Will Deacon478fcb22012-03-05 11:49:33 +0000760};
761
762static const struct user_regset_view user_aarch64_view = {
763 .name = "aarch64", .e_machine = EM_AARCH64,
764 .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
765};
766
767#ifdef CONFIG_COMPAT
768#include <linux/compat.h>
769
770enum compat_regset {
771 REGSET_COMPAT_GPR,
772 REGSET_COMPAT_VFP,
773};
774
775static int compat_gpr_get(struct task_struct *target,
776 const struct user_regset *regset,
777 unsigned int pos, unsigned int count,
778 void *kbuf, void __user *ubuf)
779{
780 int ret = 0;
781 unsigned int i, start, num_regs;
782
783 /* Calculate the number of AArch32 registers contained in count */
784 num_regs = count / regset->size;
785
786 /* Convert pos into an register number */
787 start = pos / regset->size;
788
789 if (start + num_regs > regset->n)
790 return -EIO;
791
792 for (i = 0; i < num_regs; ++i) {
793 unsigned int idx = start + i;
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000794 compat_ulong_t reg;
Will Deacon478fcb22012-03-05 11:49:33 +0000795
796 switch (idx) {
797 case 15:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000798 reg = task_pt_regs(target)->pc;
Will Deacon478fcb22012-03-05 11:49:33 +0000799 break;
800 case 16:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000801 reg = task_pt_regs(target)->pstate;
Will Deacon478fcb22012-03-05 11:49:33 +0000802 break;
803 case 17:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000804 reg = task_pt_regs(target)->orig_x0;
Will Deacon478fcb22012-03-05 11:49:33 +0000805 break;
806 default:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000807 reg = task_pt_regs(target)->regs[idx];
Will Deacon478fcb22012-03-05 11:49:33 +0000808 }
809
Victor Kamensky22279012014-06-03 19:21:30 +0100810 if (kbuf) {
811 memcpy(kbuf, &reg, sizeof(reg));
812 kbuf += sizeof(reg);
813 } else {
814 ret = copy_to_user(ubuf, &reg, sizeof(reg));
Will Deacon85487ed2014-08-22 14:20:24 +0100815 if (ret) {
816 ret = -EFAULT;
Victor Kamensky22279012014-06-03 19:21:30 +0100817 break;
Will Deacon85487ed2014-08-22 14:20:24 +0100818 }
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000819
Victor Kamensky22279012014-06-03 19:21:30 +0100820 ubuf += sizeof(reg);
821 }
Will Deacon478fcb22012-03-05 11:49:33 +0000822 }
823
824 return ret;
825}
826
827static int compat_gpr_set(struct task_struct *target,
828 const struct user_regset *regset,
829 unsigned int pos, unsigned int count,
830 const void *kbuf, const void __user *ubuf)
831{
832 struct pt_regs newregs;
833 int ret = 0;
834 unsigned int i, start, num_regs;
835
836 /* Calculate the number of AArch32 registers contained in count */
837 num_regs = count / regset->size;
838
839 /* Convert pos into an register number */
840 start = pos / regset->size;
841
842 if (start + num_regs > regset->n)
843 return -EIO;
844
845 newregs = *task_pt_regs(target);
846
847 for (i = 0; i < num_regs; ++i) {
848 unsigned int idx = start + i;
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000849 compat_ulong_t reg;
850
Victor Kamensky22279012014-06-03 19:21:30 +0100851 if (kbuf) {
852 memcpy(&reg, kbuf, sizeof(reg));
853 kbuf += sizeof(reg);
854 } else {
855 ret = copy_from_user(&reg, ubuf, sizeof(reg));
Will Deacon85487ed2014-08-22 14:20:24 +0100856 if (ret) {
857 ret = -EFAULT;
858 break;
859 }
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000860
Victor Kamensky22279012014-06-03 19:21:30 +0100861 ubuf += sizeof(reg);
862 }
Will Deacon478fcb22012-03-05 11:49:33 +0000863
864 switch (idx) {
865 case 15:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000866 newregs.pc = reg;
Will Deacon478fcb22012-03-05 11:49:33 +0000867 break;
868 case 16:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000869 newregs.pstate = reg;
Will Deacon478fcb22012-03-05 11:49:33 +0000870 break;
871 case 17:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000872 newregs.orig_x0 = reg;
Will Deacon478fcb22012-03-05 11:49:33 +0000873 break;
874 default:
Matthew Leach6a2e5e52013-11-28 12:07:22 +0000875 newregs.regs[idx] = reg;
Will Deacon478fcb22012-03-05 11:49:33 +0000876 }
877
Will Deacon478fcb22012-03-05 11:49:33 +0000878 }
879
Mark Rutlanddbd4d7c2016-03-01 14:18:50 +0000880 if (valid_user_regs(&newregs.user_regs, target))
Will Deacon478fcb22012-03-05 11:49:33 +0000881 *task_pt_regs(target) = newregs;
882 else
883 ret = -EINVAL;
884
Will Deacon478fcb22012-03-05 11:49:33 +0000885 return ret;
886}
887
888static int compat_vfp_get(struct task_struct *target,
889 const struct user_regset *regset,
890 unsigned int pos, unsigned int count,
891 void *kbuf, void __user *ubuf)
892{
893 struct user_fpsimd_state *uregs;
894 compat_ulong_t fpscr;
895 int ret;
896
897 uregs = &target->thread.fpsimd_state.user_fpsimd;
898
899 /*
900 * The VFP registers are packed into the fpsimd_state, so they all sit
901 * nicely together for us. We just need to create the fpscr separately.
902 */
903 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
904 VFP_STATE_SIZE - sizeof(compat_ulong_t));
905
906 if (count && !ret) {
907 fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
908 (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
909 ret = put_user(fpscr, (compat_ulong_t *)ubuf);
910 }
911
912 return ret;
913}
914
915static int compat_vfp_set(struct task_struct *target,
916 const struct user_regset *regset,
917 unsigned int pos, unsigned int count,
918 const void *kbuf, const void __user *ubuf)
919{
920 struct user_fpsimd_state *uregs;
921 compat_ulong_t fpscr;
922 int ret;
923
924 if (pos + count > VFP_STATE_SIZE)
925 return -EIO;
926
927 uregs = &target->thread.fpsimd_state.user_fpsimd;
928
929 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
930 VFP_STATE_SIZE - sizeof(compat_ulong_t));
931
932 if (count && !ret) {
933 ret = get_user(fpscr, (compat_ulong_t *)ubuf);
934 uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
935 uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
936 }
937
Ard Biesheuvel005f78c2014-05-08 11:20:23 +0200938 fpsimd_flush_task_state(target);
Will Deacon478fcb22012-03-05 11:49:33 +0000939 return ret;
940}
941
Catalin Marinas5d220ff2015-07-14 16:20:17 +0100942static int compat_tls_get(struct task_struct *target,
943 const struct user_regset *regset, unsigned int pos,
944 unsigned int count, void *kbuf, void __user *ubuf)
945{
946 compat_ulong_t tls = (compat_ulong_t)target->thread.tp_value;
947 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
948}
949
950static int compat_tls_set(struct task_struct *target,
951 const struct user_regset *regset, unsigned int pos,
952 unsigned int count, const void *kbuf,
953 const void __user *ubuf)
954{
955 int ret;
Dave Martin5c5839b2017-01-18 16:25:22 +0000956 compat_ulong_t tls = target->thread.tp_value;
Catalin Marinas5d220ff2015-07-14 16:20:17 +0100957
958 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
959 if (ret)
960 return ret;
961
962 target->thread.tp_value = tls;
963 return ret;
964}
965
Will Deacon478fcb22012-03-05 11:49:33 +0000966static const struct user_regset aarch32_regsets[] = {
967 [REGSET_COMPAT_GPR] = {
968 .core_note_type = NT_PRSTATUS,
969 .n = COMPAT_ELF_NGREG,
970 .size = sizeof(compat_elf_greg_t),
971 .align = sizeof(compat_elf_greg_t),
972 .get = compat_gpr_get,
973 .set = compat_gpr_set
974 },
975 [REGSET_COMPAT_VFP] = {
976 .core_note_type = NT_ARM_VFP,
977 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
978 .size = sizeof(compat_ulong_t),
979 .align = sizeof(compat_ulong_t),
980 .get = compat_vfp_get,
981 .set = compat_vfp_set
982 },
983};
984
985static const struct user_regset_view user_aarch32_view = {
986 .name = "aarch32", .e_machine = EM_ARM,
987 .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
988};
989
Catalin Marinas5d220ff2015-07-14 16:20:17 +0100990static const struct user_regset aarch32_ptrace_regsets[] = {
991 [REGSET_GPR] = {
992 .core_note_type = NT_PRSTATUS,
993 .n = COMPAT_ELF_NGREG,
994 .size = sizeof(compat_elf_greg_t),
995 .align = sizeof(compat_elf_greg_t),
996 .get = compat_gpr_get,
997 .set = compat_gpr_set
998 },
999 [REGSET_FPR] = {
1000 .core_note_type = NT_ARM_VFP,
1001 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
1002 .size = sizeof(compat_ulong_t),
1003 .align = sizeof(compat_ulong_t),
1004 .get = compat_vfp_get,
1005 .set = compat_vfp_set
1006 },
1007 [REGSET_TLS] = {
1008 .core_note_type = NT_ARM_TLS,
1009 .n = 1,
1010 .size = sizeof(compat_ulong_t),
1011 .align = sizeof(compat_ulong_t),
1012 .get = compat_tls_get,
1013 .set = compat_tls_set,
1014 },
1015#ifdef CONFIG_HAVE_HW_BREAKPOINT
1016 [REGSET_HW_BREAK] = {
1017 .core_note_type = NT_ARM_HW_BREAK,
1018 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1019 .size = sizeof(u32),
1020 .align = sizeof(u32),
1021 .get = hw_break_get,
1022 .set = hw_break_set,
1023 },
1024 [REGSET_HW_WATCH] = {
1025 .core_note_type = NT_ARM_HW_WATCH,
1026 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1027 .size = sizeof(u32),
1028 .align = sizeof(u32),
1029 .get = hw_break_get,
1030 .set = hw_break_set,
1031 },
1032#endif
1033 [REGSET_SYSTEM_CALL] = {
1034 .core_note_type = NT_ARM_SYSTEM_CALL,
1035 .n = 1,
1036 .size = sizeof(int),
1037 .align = sizeof(int),
1038 .get = system_call_get,
1039 .set = system_call_set,
1040 },
1041};
1042
1043static const struct user_regset_view user_aarch32_ptrace_view = {
1044 .name = "aarch32", .e_machine = EM_ARM,
1045 .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
1046};
1047
Will Deacon478fcb22012-03-05 11:49:33 +00001048static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
1049 compat_ulong_t __user *ret)
1050{
1051 compat_ulong_t tmp;
1052
1053 if (off & 3)
1054 return -EIO;
1055
Catalin Marinas7606c372012-10-10 15:50:03 +01001056 if (off == COMPAT_PT_TEXT_ADDR)
Will Deacon478fcb22012-03-05 11:49:33 +00001057 tmp = tsk->mm->start_code;
Catalin Marinas7606c372012-10-10 15:50:03 +01001058 else if (off == COMPAT_PT_DATA_ADDR)
Will Deacon478fcb22012-03-05 11:49:33 +00001059 tmp = tsk->mm->start_data;
Catalin Marinas7606c372012-10-10 15:50:03 +01001060 else if (off == COMPAT_PT_TEXT_END_ADDR)
Will Deacon478fcb22012-03-05 11:49:33 +00001061 tmp = tsk->mm->end_code;
1062 else if (off < sizeof(compat_elf_gregset_t))
1063 return copy_regset_to_user(tsk, &user_aarch32_view,
1064 REGSET_COMPAT_GPR, off,
1065 sizeof(compat_ulong_t), ret);
1066 else if (off >= COMPAT_USER_SZ)
1067 return -EIO;
1068 else
1069 tmp = 0;
1070
1071 return put_user(tmp, ret);
1072}
1073
1074static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
1075 compat_ulong_t val)
1076{
1077 int ret;
Will Deaconc1688702014-06-02 11:47:23 +01001078 mm_segment_t old_fs = get_fs();
Will Deacon478fcb22012-03-05 11:49:33 +00001079
1080 if (off & 3 || off >= COMPAT_USER_SZ)
1081 return -EIO;
1082
1083 if (off >= sizeof(compat_elf_gregset_t))
1084 return 0;
1085
Will Deaconc1688702014-06-02 11:47:23 +01001086 set_fs(KERNEL_DS);
Will Deacon478fcb22012-03-05 11:49:33 +00001087 ret = copy_regset_from_user(tsk, &user_aarch32_view,
1088 REGSET_COMPAT_GPR, off,
1089 sizeof(compat_ulong_t),
1090 &val);
Will Deaconc1688702014-06-02 11:47:23 +01001091 set_fs(old_fs);
1092
Will Deacon478fcb22012-03-05 11:49:33 +00001093 return ret;
1094}
1095
1096#ifdef CONFIG_HAVE_HW_BREAKPOINT
1097
1098/*
1099 * Convert a virtual register number into an index for a thread_info
1100 * breakpoint array. Breakpoints are identified using positive numbers
1101 * whilst watchpoints are negative. The registers are laid out as pairs
1102 * of (address, control), each pair mapping to a unique hw_breakpoint struct.
1103 * Register 0 is reserved for describing resource information.
1104 */
1105static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
1106{
1107 return (abs(num) - 1) >> 1;
1108}
1109
1110static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
1111{
1112 u8 num_brps, num_wrps, debug_arch, wp_len;
1113 u32 reg = 0;
1114
1115 num_brps = hw_breakpoint_slots(TYPE_INST);
1116 num_wrps = hw_breakpoint_slots(TYPE_DATA);
1117
1118 debug_arch = debug_monitors_arch();
1119 wp_len = 8;
1120 reg |= debug_arch;
1121 reg <<= 8;
1122 reg |= wp_len;
1123 reg <<= 8;
1124 reg |= num_wrps;
1125 reg <<= 8;
1126 reg |= num_brps;
1127
1128 *kdata = reg;
1129 return 0;
1130}
1131
1132static int compat_ptrace_hbp_get(unsigned int note_type,
1133 struct task_struct *tsk,
1134 compat_long_t num,
1135 u32 *kdata)
1136{
1137 u64 addr = 0;
1138 u32 ctrl = 0;
1139
1140 int err, idx = compat_ptrace_hbp_num_to_idx(num);;
1141
1142 if (num & 1) {
1143 err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
1144 *kdata = (u32)addr;
1145 } else {
1146 err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
1147 *kdata = ctrl;
1148 }
1149
1150 return err;
1151}
1152
1153static int compat_ptrace_hbp_set(unsigned int note_type,
1154 struct task_struct *tsk,
1155 compat_long_t num,
1156 u32 *kdata)
1157{
1158 u64 addr;
1159 u32 ctrl;
1160
1161 int err, idx = compat_ptrace_hbp_num_to_idx(num);
1162
1163 if (num & 1) {
1164 addr = *kdata;
1165 err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
1166 } else {
1167 ctrl = *kdata;
1168 err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
1169 }
1170
1171 return err;
1172}
1173
1174static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
1175 compat_ulong_t __user *data)
1176{
1177 int ret;
1178 u32 kdata;
1179 mm_segment_t old_fs = get_fs();
1180
1181 set_fs(KERNEL_DS);
1182 /* Watchpoint */
1183 if (num < 0) {
1184 ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
1185 /* Resource info */
1186 } else if (num == 0) {
1187 ret = compat_ptrace_hbp_get_resource_info(&kdata);
1188 /* Breakpoint */
1189 } else {
1190 ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
1191 }
1192 set_fs(old_fs);
1193
1194 if (!ret)
1195 ret = put_user(kdata, data);
1196
1197 return ret;
1198}
1199
1200static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
1201 compat_ulong_t __user *data)
1202{
1203 int ret;
1204 u32 kdata = 0;
1205 mm_segment_t old_fs = get_fs();
1206
1207 if (num == 0)
1208 return 0;
1209
1210 ret = get_user(kdata, data);
1211 if (ret)
1212 return ret;
1213
1214 set_fs(KERNEL_DS);
1215 if (num < 0)
1216 ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
1217 else
1218 ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
1219 set_fs(old_fs);
1220
1221 return ret;
1222}
1223#endif /* CONFIG_HAVE_HW_BREAKPOINT */
1224
1225long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
1226 compat_ulong_t caddr, compat_ulong_t cdata)
1227{
1228 unsigned long addr = caddr;
1229 unsigned long data = cdata;
1230 void __user *datap = compat_ptr(data);
1231 int ret;
1232
1233 switch (request) {
1234 case PTRACE_PEEKUSR:
1235 ret = compat_ptrace_read_user(child, addr, datap);
1236 break;
1237
1238 case PTRACE_POKEUSR:
1239 ret = compat_ptrace_write_user(child, addr, data);
1240 break;
1241
Will Deacon27aa55c2012-09-27 11:38:12 +01001242 case COMPAT_PTRACE_GETREGS:
Will Deacon478fcb22012-03-05 11:49:33 +00001243 ret = copy_regset_to_user(child,
1244 &user_aarch32_view,
1245 REGSET_COMPAT_GPR,
1246 0, sizeof(compat_elf_gregset_t),
1247 datap);
1248 break;
1249
Will Deacon27aa55c2012-09-27 11:38:12 +01001250 case COMPAT_PTRACE_SETREGS:
Will Deacon478fcb22012-03-05 11:49:33 +00001251 ret = copy_regset_from_user(child,
1252 &user_aarch32_view,
1253 REGSET_COMPAT_GPR,
1254 0, sizeof(compat_elf_gregset_t),
1255 datap);
1256 break;
1257
Will Deacon27aa55c2012-09-27 11:38:12 +01001258 case COMPAT_PTRACE_GET_THREAD_AREA:
Will Deacon478fcb22012-03-05 11:49:33 +00001259 ret = put_user((compat_ulong_t)child->thread.tp_value,
1260 (compat_ulong_t __user *)datap);
1261 break;
1262
Will Deacon27aa55c2012-09-27 11:38:12 +01001263 case COMPAT_PTRACE_SET_SYSCALL:
Will Deacon478fcb22012-03-05 11:49:33 +00001264 task_pt_regs(child)->syscallno = data;
1265 ret = 0;
1266 break;
1267
1268 case COMPAT_PTRACE_GETVFPREGS:
1269 ret = copy_regset_to_user(child,
1270 &user_aarch32_view,
1271 REGSET_COMPAT_VFP,
1272 0, VFP_STATE_SIZE,
1273 datap);
1274 break;
1275
1276 case COMPAT_PTRACE_SETVFPREGS:
1277 ret = copy_regset_from_user(child,
1278 &user_aarch32_view,
1279 REGSET_COMPAT_VFP,
1280 0, VFP_STATE_SIZE,
1281 datap);
1282 break;
1283
1284#ifdef CONFIG_HAVE_HW_BREAKPOINT
Will Deacon27aa55c2012-09-27 11:38:12 +01001285 case COMPAT_PTRACE_GETHBPREGS:
Will Deacon478fcb22012-03-05 11:49:33 +00001286 ret = compat_ptrace_gethbpregs(child, addr, datap);
1287 break;
1288
Will Deacon27aa55c2012-09-27 11:38:12 +01001289 case COMPAT_PTRACE_SETHBPREGS:
Will Deacon478fcb22012-03-05 11:49:33 +00001290 ret = compat_ptrace_sethbpregs(child, addr, datap);
1291 break;
1292#endif
1293
1294 default:
1295 ret = compat_ptrace_request(child, request, addr,
1296 data);
1297 break;
1298 }
1299
1300 return ret;
1301}
1302#endif /* CONFIG_COMPAT */
1303
1304const struct user_regset_view *task_user_regset_view(struct task_struct *task)
1305{
1306#ifdef CONFIG_COMPAT
Catalin Marinas5d220ff2015-07-14 16:20:17 +01001307 /*
1308 * Core dumping of 32-bit tasks or compat ptrace requests must use the
1309 * user_aarch32_view compatible with arm32. Native ptrace requests on
1310 * 32-bit children use an extended user_aarch32_ptrace_view to allow
1311 * access to the TLS register.
1312 */
1313 if (is_compat_task())
Will Deacon478fcb22012-03-05 11:49:33 +00001314 return &user_aarch32_view;
Catalin Marinas5d220ff2015-07-14 16:20:17 +01001315 else if (is_compat_thread(task_thread_info(task)))
1316 return &user_aarch32_ptrace_view;
Will Deacon478fcb22012-03-05 11:49:33 +00001317#endif
1318 return &user_aarch64_view;
1319}
1320
1321long arch_ptrace(struct task_struct *child, long request,
1322 unsigned long addr, unsigned long data)
1323{
1324 return ptrace_request(child, request, addr, data);
1325}
1326
AKASHI Takahiro31578582014-04-30 10:51:30 +01001327enum ptrace_syscall_dir {
1328 PTRACE_SYSCALL_ENTER = 0,
1329 PTRACE_SYSCALL_EXIT,
1330};
1331
1332static void tracehook_report_syscall(struct pt_regs *regs,
1333 enum ptrace_syscall_dir dir)
Will Deacon478fcb22012-03-05 11:49:33 +00001334{
AKASHI Takahiro31578582014-04-30 10:51:30 +01001335 int regno;
Will Deacon478fcb22012-03-05 11:49:33 +00001336 unsigned long saved_reg;
1337
AKASHI Takahiro31578582014-04-30 10:51:30 +01001338 /*
1339 * A scratch register (ip(r12) on AArch32, x7 on AArch64) is
1340 * used to denote syscall entry/exit:
1341 */
1342 regno = (is_compat_task() ? 12 : 7);
1343 saved_reg = regs->regs[regno];
1344 regs->regs[regno] = dir;
Will Deacon478fcb22012-03-05 11:49:33 +00001345
AKASHI Takahiro31578582014-04-30 10:51:30 +01001346 if (dir == PTRACE_SYSCALL_EXIT)
Will Deacon478fcb22012-03-05 11:49:33 +00001347 tracehook_report_syscall_exit(regs, 0);
1348 else if (tracehook_report_syscall_entry(regs))
1349 regs->syscallno = ~0UL;
1350
AKASHI Takahiro31578582014-04-30 10:51:30 +01001351 regs->regs[regno] = saved_reg;
1352}
1353
1354asmlinkage int syscall_trace_enter(struct pt_regs *regs)
1355{
1356 if (test_thread_flag(TIF_SYSCALL_TRACE))
1357 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
Will Deacon478fcb22012-03-05 11:49:33 +00001358
Kees Cooka5cd1102016-06-02 12:28:52 -07001359 /* Do the secure computing after ptrace; failures should be fast. */
1360 if (secure_computing(NULL) == -1)
1361 return -1;
1362
AKASHI Takahiro055b1212014-04-30 10:54:36 +01001363 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1364 trace_sys_enter(regs, regs->syscallno);
1365
Eric Paris4913c592014-09-23 16:25:34 -04001366 audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
1367 regs->regs[2], regs->regs[3]);
AKASHI Takahiro5701ede2014-07-04 08:28:31 +01001368
Will Deacon478fcb22012-03-05 11:49:33 +00001369 return regs->syscallno;
1370}
AKASHI Takahiro31578582014-04-30 10:51:30 +01001371
1372asmlinkage void syscall_trace_exit(struct pt_regs *regs)
1373{
AKASHI Takahiro5701ede2014-07-04 08:28:31 +01001374 audit_syscall_exit(regs);
1375
AKASHI Takahiro055b1212014-04-30 10:54:36 +01001376 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1377 trace_sys_exit(regs, regs_return_value(regs));
1378
AKASHI Takahiro31578582014-04-30 10:51:30 +01001379 if (test_thread_flag(TIF_SYSCALL_TRACE))
1380 tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
1381}
Mark Rutlanddbd4d7c2016-03-01 14:18:50 +00001382
1383/*
1384 * Bits which are always architecturally RES0 per ARM DDI 0487A.h
1385 * Userspace cannot use these until they have an architectural meaning.
1386 * We also reserve IL for the kernel; SS is handled dynamically.
1387 */
1388#define SPSR_EL1_AARCH64_RES0_BITS \
1389 (GENMASK_ULL(63,32) | GENMASK_ULL(27, 22) | GENMASK_ULL(20, 10) | \
1390 GENMASK_ULL(5, 5))
1391#define SPSR_EL1_AARCH32_RES0_BITS \
1392 (GENMASK_ULL(63,32) | GENMASK_ULL(24, 22) | GENMASK_ULL(20,20))
1393
1394static int valid_compat_regs(struct user_pt_regs *regs)
1395{
1396 regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
1397
1398 if (!system_supports_mixed_endian_el0()) {
1399 if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1400 regs->pstate |= COMPAT_PSR_E_BIT;
1401 else
1402 regs->pstate &= ~COMPAT_PSR_E_BIT;
1403 }
1404
1405 if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
1406 (regs->pstate & COMPAT_PSR_A_BIT) == 0 &&
1407 (regs->pstate & COMPAT_PSR_I_BIT) == 0 &&
1408 (regs->pstate & COMPAT_PSR_F_BIT) == 0) {
1409 return 1;
1410 }
1411
1412 /*
1413 * Force PSR to a valid 32-bit EL0t, preserving the same bits as
1414 * arch/arm.
1415 */
1416 regs->pstate &= COMPAT_PSR_N_BIT | COMPAT_PSR_Z_BIT |
1417 COMPAT_PSR_C_BIT | COMPAT_PSR_V_BIT |
1418 COMPAT_PSR_Q_BIT | COMPAT_PSR_IT_MASK |
1419 COMPAT_PSR_GE_MASK | COMPAT_PSR_E_BIT |
1420 COMPAT_PSR_T_BIT;
1421 regs->pstate |= PSR_MODE32_BIT;
1422
1423 return 0;
1424}
1425
1426static int valid_native_regs(struct user_pt_regs *regs)
1427{
1428 regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS;
1429
1430 if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) &&
1431 (regs->pstate & PSR_D_BIT) == 0 &&
1432 (regs->pstate & PSR_A_BIT) == 0 &&
1433 (regs->pstate & PSR_I_BIT) == 0 &&
1434 (regs->pstate & PSR_F_BIT) == 0) {
1435 return 1;
1436 }
1437
1438 /* Force PSR to a valid 64-bit EL0t */
1439 regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT;
1440
1441 return 0;
1442}
1443
1444/*
1445 * Are the current registers suitable for user mode? (used to maintain
1446 * security in signal handlers)
1447 */
1448int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
1449{
1450 if (!test_tsk_thread_flag(task, TIF_SINGLESTEP))
1451 regs->pstate &= ~DBG_SPSR_SS;
1452
1453 if (is_compat_thread(task_thread_info(task)))
1454 return valid_compat_regs(regs);
1455 else
1456 return valid_native_regs(regs);
1457}