blob: 994edc0158d49370548220a36ee2030d143386b4 [file] [log] [blame]
eric miao2c8086a2007-09-11 19:13:17 -07001/*
2 * linux/arch/arm/mach-pxa/mfp.c
3 *
4 * PXA3xx Multi-Function Pin Support
5 *
6 * Copyright (C) 2007 Marvell Internation Ltd.
7 *
eric miaoe9bba8e2007-10-30 08:01:38 +01008 * 2007-08-21: eric miao <eric.miao@marvell.com>
eric miao2c8086a2007-09-11 19:13:17 -07009 * initial version
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/io.h>
Rafael J. Wysocki2eaa03b2011-04-22 22:03:11 +020020#include <linux/syscore_ops.h>
eric miao2c8086a2007-09-11 19:13:17 -070021
Russell Kinga09e64f2008-08-05 16:14:15 +010022#include <mach/hardware.h>
Arnd Bergmann4c25c5d2015-01-30 10:45:33 +010023#include "mfp-pxa3xx.h"
Russell Kinga09e64f2008-08-05 16:14:15 +010024#include <mach/pxa3xx-regs.h>
eric miao2c8086a2007-09-11 19:13:17 -070025
Russell Kingd4fc8582008-01-08 15:12:22 +000026#ifdef CONFIG_PM
27/*
28 * Configure the MFPs appropriately for suspend/resume.
29 * FIXME: this should probably depend on which system state we're
30 * entering - for instance, we might not want to place MFP pins in
31 * a pull-down mode if they're an active low chip select, and we're
32 * just entering standby.
33 */
Rafael J. Wysocki2eaa03b2011-04-22 22:03:11 +020034static int pxa3xx_mfp_suspend(void)
Russell Kingd4fc8582008-01-08 15:12:22 +000035{
Eric Miaof8dec042009-01-15 16:42:56 +080036 mfp_config_lpm();
Russell Kingd4fc8582008-01-08 15:12:22 +000037 return 0;
38}
39
Rafael J. Wysocki2eaa03b2011-04-22 22:03:11 +020040static void pxa3xx_mfp_resume(void)
Russell Kingd4fc8582008-01-08 15:12:22 +000041{
Eric Miaof8dec042009-01-15 16:42:56 +080042 mfp_config_run();
eric miaoc4d1fb62008-01-28 23:00:02 +000043
44 /* clear RDH bit when MFP settings are restored
45 *
46 * NOTE: the last 3 bits DxS are write-1-to-clear so carefully
47 * preserve them here in case they will be referenced later
48 */
49 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
Russell Kingd4fc8582008-01-08 15:12:22 +000050}
eric miao4be35e22008-02-04 10:07:09 +080051#else
52#define pxa3xx_mfp_suspend NULL
53#define pxa3xx_mfp_resume NULL
54#endif
Russell Kingd4fc8582008-01-08 15:12:22 +000055
Rafael J. Wysocki2eaa03b2011-04-22 22:03:11 +020056struct syscore_ops pxa3xx_mfp_syscore_ops = {
Russell Kingd4fc8582008-01-08 15:12:22 +000057 .suspend = pxa3xx_mfp_suspend,
Rafael J. Wysocki2eaa03b2011-04-22 22:03:11 +020058 .resume = pxa3xx_mfp_resume,
Russell Kingd4fc8582008-01-08 15:12:22 +000059};