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Brian Swetlandbcc0f6a2008-09-10 14:00:53 -07001/* linux/arch/arm/mach-msm/devices.c
2 *
3 * Copyright (C) 2008 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18
Russell King80b02c12009-01-08 10:01:47 +000019#include <mach/irqs.h>
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070020#include <mach/msm_iomap.h>
21#include "devices.h"
22
23#include <asm/mach/flash.h>
24#include <linux/mtd/nand.h>
25#include <linux/mtd/partitions.h>
26
Daniel Walker5e96da52010-05-12 13:43:28 -070027
28#include "clock.h"
Stephen Boydce1c80f2011-01-26 16:20:53 -080029#include "clock-pcom.h"
San Mehat5d4f77f2008-11-10 16:30:27 -080030#include <mach/mmc.h>
31
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070032static struct resource resources_uart1[] = {
33 {
34 .start = INT_UART1,
35 .end = INT_UART1,
36 .flags = IORESOURCE_IRQ,
37 },
38 {
39 .start = MSM_UART1_PHYS,
40 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
41 .flags = IORESOURCE_MEM,
42 },
43};
44
45static struct resource resources_uart2[] = {
46 {
47 .start = INT_UART2,
48 .end = INT_UART2,
49 .flags = IORESOURCE_IRQ,
50 },
51 {
52 .start = MSM_UART2_PHYS,
53 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
54 .flags = IORESOURCE_MEM,
55 },
56};
57
58static struct resource resources_uart3[] = {
59 {
60 .start = INT_UART3,
61 .end = INT_UART3,
62 .flags = IORESOURCE_IRQ,
63 },
64 {
65 .start = MSM_UART3_PHYS,
66 .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
67 .flags = IORESOURCE_MEM,
68 },
69};
70
71struct platform_device msm_device_uart1 = {
72 .name = "msm_serial",
73 .id = 0,
74 .num_resources = ARRAY_SIZE(resources_uart1),
75 .resource = resources_uart1,
76};
77
78struct platform_device msm_device_uart2 = {
79 .name = "msm_serial",
80 .id = 1,
81 .num_resources = ARRAY_SIZE(resources_uart2),
82 .resource = resources_uart2,
83};
84
85struct platform_device msm_device_uart3 = {
86 .name = "msm_serial",
87 .id = 2,
88 .num_resources = ARRAY_SIZE(resources_uart3),
89 .resource = resources_uart3,
90};
91
92static struct resource resources_i2c[] = {
93 {
94 .start = MSM_I2C_PHYS,
95 .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
96 .flags = IORESOURCE_MEM,
97 },
98 {
99 .start = INT_PWB_I2C,
100 .end = INT_PWB_I2C,
101 .flags = IORESOURCE_IRQ,
102 },
103};
104
105struct platform_device msm_device_i2c = {
106 .name = "msm_i2c",
107 .id = 0,
108 .num_resources = ARRAY_SIZE(resources_i2c),
109 .resource = resources_i2c,
110};
111
112static struct resource resources_hsusb[] = {
113 {
114 .start = MSM_HSUSB_PHYS,
115 .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
116 .flags = IORESOURCE_MEM,
117 },
118 {
119 .start = INT_USB_HS,
120 .end = INT_USB_HS,
121 .flags = IORESOURCE_IRQ,
122 },
123};
124
125struct platform_device msm_device_hsusb = {
126 .name = "msm_hsusb",
127 .id = -1,
128 .num_resources = ARRAY_SIZE(resources_hsusb),
129 .resource = resources_hsusb,
130 .dev = {
131 .coherent_dma_mask = 0xffffffff,
132 },
133};
134
135struct flash_platform_data msm_nand_data = {
136 .parts = NULL,
137 .nr_parts = 0,
138};
139
140static struct resource resources_nand[] = {
141 [0] = {
142 .start = 7,
143 .end = 7,
144 .flags = IORESOURCE_DMA,
145 },
146};
147
148struct platform_device msm_device_nand = {
149 .name = "msm_nand",
150 .id = -1,
151 .num_resources = ARRAY_SIZE(resources_nand),
152 .resource = resources_nand,
153 .dev = {
154 .platform_data = &msm_nand_data,
155 },
156};
157
158struct platform_device msm_device_smd = {
159 .name = "msm_smd",
160 .id = -1,
161};
162
163static struct resource resources_sdc1[] = {
164 {
165 .start = MSM_SDC1_PHYS,
166 .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1,
167 .flags = IORESOURCE_MEM,
168 },
169 {
170 .start = INT_SDC1_0,
Dima Zavin830d8432009-05-22 20:21:50 -0700171 .end = INT_SDC1_0,
172 .flags = IORESOURCE_IRQ,
173 .name = "cmd_irq",
174 },
175 {
176 .start = INT_SDC1_1,
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700177 .end = INT_SDC1_1,
178 .flags = IORESOURCE_IRQ,
Dima Zavin830d8432009-05-22 20:21:50 -0700179 .name = "pio_irq",
180 },
181 {
182 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
183 .name = "status_irq"
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700184 },
185 {
186 .start = 8,
187 .end = 8,
188 .flags = IORESOURCE_DMA,
189 },
190};
191
192static struct resource resources_sdc2[] = {
193 {
194 .start = MSM_SDC2_PHYS,
195 .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1,
196 .flags = IORESOURCE_MEM,
197 },
198 {
199 .start = INT_SDC2_0,
Dima Zavin830d8432009-05-22 20:21:50 -0700200 .end = INT_SDC2_0,
201 .flags = IORESOURCE_IRQ,
202 .name = "cmd_irq",
203 },
204 {
205 .start = INT_SDC2_1,
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700206 .end = INT_SDC2_1,
207 .flags = IORESOURCE_IRQ,
Dima Zavin830d8432009-05-22 20:21:50 -0700208 .name = "pio_irq",
209 },
210 {
211 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
212 .name = "status_irq"
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700213 },
214 {
215 .start = 8,
216 .end = 8,
217 .flags = IORESOURCE_DMA,
218 },
219};
220
221static struct resource resources_sdc3[] = {
222 {
223 .start = MSM_SDC3_PHYS,
224 .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1,
225 .flags = IORESOURCE_MEM,
226 },
227 {
228 .start = INT_SDC3_0,
Dima Zavin830d8432009-05-22 20:21:50 -0700229 .end = INT_SDC3_0,
230 .flags = IORESOURCE_IRQ,
231 .name = "cmd_irq",
232 },
233 {
234 .start = INT_SDC3_1,
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700235 .end = INT_SDC3_1,
236 .flags = IORESOURCE_IRQ,
Dima Zavin830d8432009-05-22 20:21:50 -0700237 .name = "pio_irq",
238 },
239 {
240 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
241 .name = "status_irq"
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700242 },
243 {
244 .start = 8,
245 .end = 8,
246 .flags = IORESOURCE_DMA,
247 },
248};
249
250static struct resource resources_sdc4[] = {
251 {
252 .start = MSM_SDC4_PHYS,
253 .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1,
254 .flags = IORESOURCE_MEM,
255 },
256 {
257 .start = INT_SDC4_0,
Dima Zavin830d8432009-05-22 20:21:50 -0700258 .end = INT_SDC4_0,
259 .flags = IORESOURCE_IRQ,
260 .name = "cmd_irq",
261 },
262 {
263 .start = INT_SDC4_1,
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700264 .end = INT_SDC4_1,
265 .flags = IORESOURCE_IRQ,
Dima Zavin830d8432009-05-22 20:21:50 -0700266 .name = "pio_irq",
267 },
268 {
269 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
270 .name = "status_irq"
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700271 },
272 {
273 .start = 8,
274 .end = 8,
275 .flags = IORESOURCE_DMA,
276 },
277};
278
279struct platform_device msm_device_sdc1 = {
280 .name = "msm_sdcc",
281 .id = 1,
282 .num_resources = ARRAY_SIZE(resources_sdc1),
283 .resource = resources_sdc1,
284 .dev = {
285 .coherent_dma_mask = 0xffffffff,
286 },
287};
288
289struct platform_device msm_device_sdc2 = {
290 .name = "msm_sdcc",
291 .id = 2,
292 .num_resources = ARRAY_SIZE(resources_sdc2),
293 .resource = resources_sdc2,
294 .dev = {
295 .coherent_dma_mask = 0xffffffff,
296 },
297};
298
299struct platform_device msm_device_sdc3 = {
300 .name = "msm_sdcc",
301 .id = 3,
302 .num_resources = ARRAY_SIZE(resources_sdc3),
303 .resource = resources_sdc3,
304 .dev = {
305 .coherent_dma_mask = 0xffffffff,
306 },
307};
308
309struct platform_device msm_device_sdc4 = {
310 .name = "msm_sdcc",
311 .id = 4,
312 .num_resources = ARRAY_SIZE(resources_sdc4),
313 .resource = resources_sdc4,
314 .dev = {
315 .coherent_dma_mask = 0xffffffff,
316 },
317};
San Mehat5d4f77f2008-11-10 16:30:27 -0800318
319static struct platform_device *msm_sdcc_devices[] __initdata = {
320 &msm_device_sdc1,
321 &msm_device_sdc2,
322 &msm_device_sdc3,
323 &msm_device_sdc4,
324};
325
Sahitya Tummalab5d643d2010-07-29 16:55:34 +0530326int __init msm_add_sdcc(unsigned int controller,
327 struct msm_mmc_platform_data *plat,
Dima Zavin830d8432009-05-22 20:21:50 -0700328 unsigned int stat_irq, unsigned long stat_irq_flags)
San Mehat5d4f77f2008-11-10 16:30:27 -0800329{
330 struct platform_device *pdev;
Dima Zavin830d8432009-05-22 20:21:50 -0700331 struct resource *res;
San Mehat5d4f77f2008-11-10 16:30:27 -0800332
333 if (controller < 1 || controller > 4)
334 return -EINVAL;
335
336 pdev = msm_sdcc_devices[controller-1];
337 pdev->dev.platform_data = plat;
Dima Zavin830d8432009-05-22 20:21:50 -0700338
339 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq");
340 if (!res)
341 return -EINVAL;
342 else if (stat_irq) {
343 res->start = res->end = stat_irq;
344 res->flags &= ~IORESOURCE_DISABLED;
345 res->flags |= stat_irq_flags;
346 }
347
San Mehat5d4f77f2008-11-10 16:30:27 -0800348 return platform_device_register(pdev);
349}
350
Daniel Walker50bc0ef2010-12-13 14:35:11 -0800351static struct resource resources_mddi0[] = {
352 {
353 .start = MSM_PMDH_PHYS,
354 .end = MSM_PMDH_PHYS + MSM_PMDH_SIZE - 1,
355 .flags = IORESOURCE_MEM,
356 },
357 {
358 .start = INT_MDDI_PRI,
359 .end = INT_MDDI_PRI,
360 .flags = IORESOURCE_IRQ,
361 },
362};
363
364static struct resource resources_mddi1[] = {
365 {
366 .start = MSM_EMDH_PHYS,
367 .end = MSM_EMDH_PHYS + MSM_EMDH_SIZE - 1,
368 .flags = IORESOURCE_MEM,
369 },
370 {
371 .start = INT_MDDI_EXT,
372 .end = INT_MDDI_EXT,
373 .flags = IORESOURCE_IRQ,
374 },
375};
376
377struct platform_device msm_device_mddi0 = {
378 .name = "msm_mddi",
379 .id = 0,
380 .num_resources = ARRAY_SIZE(resources_mddi0),
381 .resource = resources_mddi0,
382 .dev = {
383 .coherent_dma_mask = 0xffffffff,
384 },
385};
386
387struct platform_device msm_device_mddi1 = {
388 .name = "msm_mddi",
389 .id = 1,
390 .num_resources = ARRAY_SIZE(resources_mddi1),
391 .resource = resources_mddi1,
392 .dev = {
393 .coherent_dma_mask = 0xffffffff,
394 },
395};
396
397static struct resource resources_mdp[] = {
398 {
399 .start = MSM_MDP_PHYS,
400 .end = MSM_MDP_PHYS + MSM_MDP_SIZE - 1,
401 .name = "mdp",
402 .flags = IORESOURCE_MEM
403 },
404 {
405 .start = INT_MDP,
406 .end = INT_MDP,
407 .flags = IORESOURCE_IRQ,
408 },
409};
410
411struct platform_device msm_device_mdp = {
412 .name = "msm_mdp",
413 .id = 0,
414 .num_resources = ARRAY_SIZE(resources_mdp),
415 .resource = resources_mdp,
416};
417
Daniel Walker5e96da52010-05-12 13:43:28 -0700418struct clk msm_clocks_7x01a[] = {
419 CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
420 CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0),
421 CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, 0),
422 CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0),
423 CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
424 CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF),
425 CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
426 CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, OFF),
427 CLK_PCOM("i2c_clk", I2C_CLK, &msm_device_i2c.dev, 0),
428 CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
429 CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
430 CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
431 CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0),
432 CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF),
433 CLK_PCOM("pbus_clk", PBUS_CLK, NULL, 0),
434 CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0),
Daniel Walker304a09c2010-12-13 14:35:09 -0800435 CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX),
Daniel Walker5e96da52010-05-12 13:43:28 -0700436 CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF),
437 CLK_PCOM("sdc_clk", SDC1_CLK, &msm_device_sdc1.dev, OFF),
438 CLK_PCOM("sdc_pclk", SDC1_P_CLK, &msm_device_sdc1.dev, OFF),
439 CLK_PCOM("sdc_clk", SDC2_CLK, &msm_device_sdc2.dev, OFF),
440 CLK_PCOM("sdc_pclk", SDC2_P_CLK, &msm_device_sdc2.dev, OFF),
441 CLK_PCOM("sdc_clk", SDC3_CLK, &msm_device_sdc3.dev, OFF),
442 CLK_PCOM("sdc_pclk", SDC3_P_CLK, &msm_device_sdc3.dev, OFF),
443 CLK_PCOM("sdc_clk", SDC4_CLK, &msm_device_sdc4.dev, OFF),
444 CLK_PCOM("sdc_pclk", SDC4_P_CLK, &msm_device_sdc4.dev, OFF),
445 CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0),
446 CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
447 CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
448 CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
449 CLK_PCOM("uart_clk", UART1_CLK, &msm_device_uart1.dev, OFF),
450 CLK_PCOM("uart_clk", UART2_CLK, &msm_device_uart2.dev, 0),
451 CLK_PCOM("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
452 CLK_PCOM("uart1dm_clk", UART1DM_CLK, NULL, OFF),
453 CLK_PCOM("uart2dm_clk", UART2DM_CLK, NULL, 0),
454 CLK_PCOM("usb_hs_clk", USB_HS_CLK, &msm_device_hsusb.dev, OFF),
455 CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, &msm_device_hsusb.dev, OFF),
456 CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0),
457 CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF ),
458 CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF),
459 CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF),
460};
461
462unsigned msm_num_clocks_7x01a = ARRAY_SIZE(msm_clocks_7x01a);