blob: 1abd9b37691ca787362e52f9cb9459be62a6d95a [file] [log] [blame]
Dong Aishengbc3a59c2012-03-31 21:26:57 +08001/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 interrupt-parent = <&icoll>;
16
Shawn Guoce4c6f92012-05-04 14:32:35 +080017 aliases {
18 gpio0 = &gpio0;
19 gpio1 = &gpio1;
20 gpio2 = &gpio2;
21 gpio3 = &gpio3;
22 gpio4 = &gpio4;
23 };
24
Dong Aishengbc3a59c2012-03-31 21:26:57 +080025 cpus {
26 cpu@0 {
27 compatible = "arm,arm926ejs";
28 };
29 };
30
31 apb@80000000 {
32 compatible = "simple-bus";
33 #address-cells = <1>;
34 #size-cells = <1>;
35 reg = <0x80000000 0x80000>;
36 ranges;
37
38 apbh@80000000 {
39 compatible = "simple-bus";
40 #address-cells = <1>;
41 #size-cells = <1>;
42 reg = <0x80000000 0x3c900>;
43 ranges;
44
45 icoll: interrupt-controller@80000000 {
46 compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";
47 interrupt-controller;
48 #interrupt-cells = <1>;
49 reg = <0x80000000 0x2000>;
50 };
51
52 hsadc@80002000 {
53 reg = <0x80002000 2000>;
54 interrupts = <13 87>;
55 status = "disabled";
56 };
57
58 dma-apbh@80004000 {
Dong Aisheng84f35702012-05-04 20:12:19 +080059 compatible = "fsl,imx28-dma-apbh";
Dong Aishengbc3a59c2012-03-31 21:26:57 +080060 reg = <0x80004000 2000>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +080061 };
62
63 perfmon@80006000 {
64 reg = <0x80006000 800>;
65 interrupts = <27>;
66 status = "disabled";
67 };
68
69 bch@8000a000 {
70 reg = <0x8000a000 2000>;
71 interrupts = <41>;
72 status = "disabled";
73 };
74
75 gpmi@8000c000 {
76 reg = <0x8000c000 2000>;
77 interrupts = <42 88>;
78 status = "disabled";
79 };
80
81 ssp0: ssp@80010000 {
82 reg = <0x80010000 2000>;
83 interrupts = <96 82>;
84 status = "disabled";
85 };
86
87 ssp1: ssp@80012000 {
88 reg = <0x80012000 2000>;
89 interrupts = <97 83>;
90 status = "disabled";
91 };
92
93 ssp2: ssp@80014000 {
94 reg = <0x80014000 2000>;
95 interrupts = <98 84>;
96 status = "disabled";
97 };
98
99 ssp3: ssp@80016000 {
100 reg = <0x80016000 2000>;
101 interrupts = <99 85>;
102 status = "disabled";
103 };
104
105 pinctrl@80018000 {
106 #address-cells = <1>;
107 #size-cells = <0>;
Shawn Guoce4c6f92012-05-04 14:32:35 +0800108 compatible = "fsl,imx28-pinctrl", "simple-bus";
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800109 reg = <0x80018000 2000>;
110
Shawn Guoce4c6f92012-05-04 14:32:35 +0800111 gpio0: gpio@0 {
112 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
113 interrupts = <127>;
114 gpio-controller;
115 #gpio-cells = <2>;
116 interrupt-controller;
117 #interrupt-cells = <2>;
118 };
119
120 gpio1: gpio@1 {
121 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
122 interrupts = <126>;
123 gpio-controller;
124 #gpio-cells = <2>;
125 interrupt-controller;
126 #interrupt-cells = <2>;
127 };
128
129 gpio2: gpio@2 {
130 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
131 interrupts = <125>;
132 gpio-controller;
133 #gpio-cells = <2>;
134 interrupt-controller;
135 #interrupt-cells = <2>;
136 };
137
138 gpio3: gpio@3 {
139 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
140 interrupts = <124>;
141 gpio-controller;
142 #gpio-cells = <2>;
143 interrupt-controller;
144 #interrupt-cells = <2>;
145 };
146
147 gpio4: gpio@4 {
148 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
149 interrupts = <123>;
150 gpio-controller;
151 #gpio-cells = <2>;
152 interrupt-controller;
153 #interrupt-cells = <2>;
154 };
155
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800156 duart_pins_a: duart@0 {
157 reg = <0>;
158 fsl,pinmux-ids = <0x3102 0x3112>;
159 fsl,drive-strength = <0>;
160 fsl,voltage = <1>;
161 fsl,pull-up = <0>;
162 };
163
164 mac0_pins_a: mac0@0 {
165 reg = <0>;
166 fsl,pinmux-ids = <0x4000 0x4010 0x4020
167 0x4030 0x4040 0x4060 0x4070
168 0x4080 0x4100>;
169 fsl,drive-strength = <1>;
170 fsl,voltage = <1>;
171 fsl,pull-up = <1>;
172 };
173
174 mac1_pins_a: mac1@0 {
175 reg = <0>;
176 fsl,pinmux-ids = <0x40f1 0x4091 0x40a1
177 0x40e1 0x40b1 0x40c1>;
178 fsl,drive-strength = <1>;
179 fsl,voltage = <1>;
180 fsl,pull-up = <1>;
181 };
182 };
183
184 digctl@8001c000 {
185 reg = <0x8001c000 2000>;
186 interrupts = <89>;
187 status = "disabled";
188 };
189
190 etm@80022000 {
191 reg = <0x80022000 2000>;
192 status = "disabled";
193 };
194
195 dma-apbx@80024000 {
Dong Aisheng84f35702012-05-04 20:12:19 +0800196 compatible = "fsl,imx28-dma-apbx";
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800197 reg = <0x80024000 2000>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800198 };
199
200 dcp@80028000 {
201 reg = <0x80028000 2000>;
202 interrupts = <52 53 54>;
203 status = "disabled";
204 };
205
206 pxp@8002a000 {
207 reg = <0x8002a000 2000>;
208 interrupts = <39>;
209 status = "disabled";
210 };
211
212 ocotp@8002c000 {
213 reg = <0x8002c000 2000>;
214 status = "disabled";
215 };
216
217 axi-ahb@8002e000 {
218 reg = <0x8002e000 2000>;
219 status = "disabled";
220 };
221
222 lcdif@80030000 {
223 reg = <0x80030000 2000>;
224 interrupts = <38 86>;
225 status = "disabled";
226 };
227
228 can0: can@80032000 {
229 reg = <0x80032000 2000>;
230 interrupts = <8>;
231 status = "disabled";
232 };
233
234 can1: can@80034000 {
235 reg = <0x80034000 2000>;
236 interrupts = <9>;
237 status = "disabled";
238 };
239
240 simdbg@8003c000 {
241 reg = <0x8003c000 200>;
242 status = "disabled";
243 };
244
245 simgpmisel@8003c200 {
246 reg = <0x8003c200 100>;
247 status = "disabled";
248 };
249
250 simsspsel@8003c300 {
251 reg = <0x8003c300 100>;
252 status = "disabled";
253 };
254
255 simmemsel@8003c400 {
256 reg = <0x8003c400 100>;
257 status = "disabled";
258 };
259
260 gpiomon@8003c500 {
261 reg = <0x8003c500 100>;
262 status = "disabled";
263 };
264
265 simenet@8003c700 {
266 reg = <0x8003c700 100>;
267 status = "disabled";
268 };
269
270 armjtag@8003c800 {
271 reg = <0x8003c800 100>;
272 status = "disabled";
273 };
274 };
275
276 apbx@80040000 {
277 compatible = "simple-bus";
278 #address-cells = <1>;
279 #size-cells = <1>;
280 reg = <0x80040000 0x40000>;
281 ranges;
282
283 clkctl@80040000 {
284 reg = <0x80040000 2000>;
285 status = "disabled";
286 };
287
288 saif0: saif@80042000 {
289 reg = <0x80042000 2000>;
290 interrupts = <59 80>;
291 status = "disabled";
292 };
293
294 power@80044000 {
295 reg = <0x80044000 2000>;
296 status = "disabled";
297 };
298
299 saif1: saif@80046000 {
300 reg = <0x80046000 2000>;
301 interrupts = <58 81>;
302 status = "disabled";
303 };
304
305 lradc@80050000 {
306 reg = <0x80050000 2000>;
307 status = "disabled";
308 };
309
310 spdif@80054000 {
311 reg = <0x80054000 2000>;
312 interrupts = <45 66>;
313 status = "disabled";
314 };
315
316 rtc@80056000 {
317 reg = <0x80056000 2000>;
318 interrupts = <28 29>;
319 status = "disabled";
320 };
321
322 i2c0: i2c@80058000 {
323 reg = <0x80058000 2000>;
324 interrupts = <111 68>;
325 status = "disabled";
326 };
327
328 i2c1: i2c@8005a000 {
329 reg = <0x8005a000 2000>;
330 interrupts = <110 69>;
331 status = "disabled";
332 };
333
334 pwm@80064000 {
335 reg = <0x80064000 2000>;
336 status = "disabled";
337 };
338
339 timrot@80068000 {
340 reg = <0x80068000 2000>;
341 status = "disabled";
342 };
343
344 auart0: serial@8006a000 {
345 reg = <0x8006a000 0x2000>;
346 interrupts = <112 70 71>;
347 status = "disabled";
348 };
349
350 auart1: serial@8006c000 {
351 reg = <0x8006c000 0x2000>;
352 interrupts = <113 72 73>;
353 status = "disabled";
354 };
355
356 auart2: serial@8006e000 {
357 reg = <0x8006e000 0x2000>;
358 interrupts = <114 74 75>;
359 status = "disabled";
360 };
361
362 auart3: serial@80070000 {
363 reg = <0x80070000 0x2000>;
364 interrupts = <115 76 77>;
365 status = "disabled";
366 };
367
368 auart4: serial@80072000 {
369 reg = <0x80072000 0x2000>;
370 interrupts = <116 78 79>;
371 status = "disabled";
372 };
373
374 duart: serial@80074000 {
375 compatible = "arm,pl011", "arm,primecell";
376 reg = <0x80074000 0x1000>;
377 interrupts = <47>;
378 status = "disabled";
379 };
380
381 usbphy0: usbphy@8007c000 {
382 reg = <0x8007c000 0x2000>;
383 status = "disabled";
384 };
385
386 usbphy1: usbphy@8007e000 {
387 reg = <0x8007e000 0x2000>;
388 status = "disabled";
389 };
390 };
391 };
392
393 ahb@80080000 {
394 compatible = "simple-bus";
395 #address-cells = <1>;
396 #size-cells = <1>;
397 reg = <0x80080000 0x80000>;
398 ranges;
399
400 usbctrl0: usbctrl@80080000 {
401 reg = <0x80080000 0x10000>;
402 status = "disabled";
403 };
404
405 usbctrl1: usbctrl@80090000 {
406 reg = <0x80090000 0x10000>;
407 status = "disabled";
408 };
409
410 dflpt@800c0000 {
411 reg = <0x800c0000 0x10000>;
412 status = "disabled";
413 };
414
415 mac0: ethernet@800f0000 {
416 compatible = "fsl,imx28-fec";
417 reg = <0x800f0000 0x4000>;
418 interrupts = <101>;
419 status = "disabled";
420 };
421
422 mac1: ethernet@800f4000 {
423 compatible = "fsl,imx28-fec";
424 reg = <0x800f4000 0x4000>;
425 interrupts = <102>;
426 status = "disabled";
427 };
428
429 switch@800f8000 {
430 reg = <0x800f8000 0x8000>;
431 status = "disabled";
432 };
433
434 };
435};