blob: fe8d36f7e30ed95209ae218811c4420af52b5bee [file] [log] [blame]
Juergen Beisertf31405c2008-07-05 10:02:59 +02001/*
2 * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
20/*
21 * i.MX27 specific CPU detection code
22 */
23
24#include <linux/io.h>
25#include <linux/module.h>
26
Shawn Guo50f2de62012-09-14 14:14:45 +080027#include "hardware.h"
Juergen Beisertf31405c2008-07-05 10:02:59 +020028
Jason Liu3f5492c2011-08-26 13:35:20 +080029static int mx27_cpu_rev = -1;
30static int mx27_cpu_partnumber;
Juergen Beisertf31405c2008-07-05 10:02:59 +020031
Sascha Haueredfcea82009-02-16 15:13:43 +010032#define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */
33
Jason Liu3f5492c2011-08-26 13:35:20 +080034static int mx27_read_cpu_rev(void)
Juergen Beisertf31405c2008-07-05 10:02:59 +020035{
36 u32 val;
37 /*
38 * now we have access to the IO registers. As we need
39 * the silicon revision very early we read it here to
40 * avoid any further hooks
41 */
Uwe Kleine-Königbc9ea6c2009-12-16 17:30:27 +010042 val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
43 + SYS_CHIP_ID));
Juergen Beisertf31405c2008-07-05 10:02:59 +020044
Jason Liu3f5492c2011-08-26 13:35:20 +080045 mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);
46
Dinh Nguyen9ab46502010-11-15 11:30:01 -060047 switch (val >> 28) {
48 case 0:
Jason Liu3f5492c2011-08-26 13:35:20 +080049 return IMX_CHIP_REVISION_1_0;
Dinh Nguyen9ab46502010-11-15 11:30:01 -060050 case 1:
Jason Liu3f5492c2011-08-26 13:35:20 +080051 return IMX_CHIP_REVISION_2_0;
Dinh Nguyen9ab46502010-11-15 11:30:01 -060052 case 2:
Jason Liu3f5492c2011-08-26 13:35:20 +080053 return IMX_CHIP_REVISION_2_1;
Dinh Nguyen9ab46502010-11-15 11:30:01 -060054 default:
Jason Liu3f5492c2011-08-26 13:35:20 +080055 return IMX_CHIP_REVISION_UNKNOWN;
Dinh Nguyen9ab46502010-11-15 11:30:01 -060056 }
Juergen Beisertf31405c2008-07-05 10:02:59 +020057}
58
59/*
60 * Returns:
61 * the silicon revision of the cpu
62 * -EINVAL - not a mx27
63 */
64int mx27_revision(void)
65{
Jason Liu3f5492c2011-08-26 13:35:20 +080066 if (mx27_cpu_rev == -1)
67 mx27_cpu_rev = mx27_read_cpu_rev();
Juergen Beisertf31405c2008-07-05 10:02:59 +020068
Jason Liu3f5492c2011-08-26 13:35:20 +080069 if (mx27_cpu_partnumber != 0x8821)
Juergen Beisertf31405c2008-07-05 10:02:59 +020070 return -EINVAL;
71
Jason Liu3f5492c2011-08-26 13:35:20 +080072 return mx27_cpu_rev;
Juergen Beisertf31405c2008-07-05 10:02:59 +020073}
74EXPORT_SYMBOL(mx27_revision);