blob: 6a07006ff0f48136591ff0909636cd73b774bf08 [file] [log] [blame]
Fabio Estevam3ac804e2012-02-02 20:02:32 -02001/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11#include <linux/io.h>
Shawn Guoe3372472012-09-13 21:01:00 +080012
13#include "common.h"
Fabio Estevam3ac804e2012-02-02 20:02:32 -020014#include "crmregs-imx3.h"
Shawn Guoe0557c02012-09-13 15:51:15 +080015#include "devices/devices-common.h"
Shawn Guo50f2de62012-09-14 14:14:45 +080016#include "hardware.h"
Fabio Estevam3ac804e2012-02-02 20:02:32 -020017
18/*
19 * Set cpu low power mode before WFI instruction. This function is called
20 * mx3 because it can be used for mx31 and mx35.
21 * Currently only WAIT_MODE is supported.
22 */
23void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode)
24{
Sascha Hauereb920442012-04-03 12:42:27 +020025 int reg = __raw_readl(mx3_ccm_base + MXC_CCM_CCMR);
Fabio Estevam3ac804e2012-02-02 20:02:32 -020026 reg &= ~MXC_CCM_CCMR_LPM_MASK;
27
28 switch (mode) {
29 case MX3_WAIT:
30 if (cpu_is_mx35())
31 reg |= MXC_CCM_CCMR_LPM_WAIT_MX35;
Sascha Hauereb920442012-04-03 12:42:27 +020032 __raw_writel(reg, mx3_ccm_base + MXC_CCM_CCMR);
Fabio Estevam3ac804e2012-02-02 20:02:32 -020033 break;
34 default:
35 pr_err("Unknown cpu power mode: %d\n", mode);
36 return;
37 }
38}