blob: f11d41dad9c13b9d581fe6fa122f1898bc140e55 [file] [log] [blame]
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001/*
2 * Driver for Regulator part of Palmas PMIC Chips
3 *
Graeme Gregory7be859f2013-03-07 13:17:48 +00004 * Copyright 2011-2013 Texas Instruments Inc.
Graeme Gregorye5ce4202012-05-18 16:53:57 +01005 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
Graeme Gregorya7dddf22013-02-23 16:35:40 +00007 * Author: Ian Lartey <ian@slimlogic.co.uk>
Graeme Gregorye5ce4202012-05-18 16:53:57 +01008 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/slab.h>
24#include <linux/regmap.h>
25#include <linux/mfd/palmas.h>
Graeme Gregorya361cd92012-08-28 13:47:40 +020026#include <linux/of.h>
27#include <linux/of_platform.h>
28#include <linux/regulator/of_regulator.h>
Graeme Gregorye5ce4202012-05-18 16:53:57 +010029
Keerthydbabd622014-05-22 14:48:29 +053030static const struct regulator_linear_range smps_low_ranges[] = {
Nishanth Menon6b7f2d82014-06-04 14:34:31 -050031 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
Keerthydbabd622014-05-22 14:48:29 +053032 REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
33 REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
34 REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0),
35};
36
37static const struct regulator_linear_range smps_high_ranges[] = {
Nishanth Menon6b7f2d82014-06-04 14:34:31 -050038 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
Keerthydbabd622014-05-22 14:48:29 +053039 REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0),
40 REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000),
41 REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
42};
43
Nishanth Menon6839cd62014-06-30 10:57:37 -050044static struct palmas_regs_info palmas_generic_regs_info[] = {
Graeme Gregorye5ce4202012-05-18 16:53:57 +010045 {
46 .name = "SMPS12",
Laxman Dewangan504382c2013-03-20 19:26:37 +053047 .sname = "smps1-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010048 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
49 .ctrl_addr = PALMAS_SMPS12_CTRL,
50 .tstep_addr = PALMAS_SMPS12_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053051 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010052 },
53 {
54 .name = "SMPS123",
Laxman Dewangan504382c2013-03-20 19:26:37 +053055 .sname = "smps1-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010056 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
57 .ctrl_addr = PALMAS_SMPS12_CTRL,
58 .tstep_addr = PALMAS_SMPS12_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053059 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010060 },
61 {
62 .name = "SMPS3",
Laxman Dewangan504382c2013-03-20 19:26:37 +053063 .sname = "smps3-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010064 .vsel_addr = PALMAS_SMPS3_VOLTAGE,
65 .ctrl_addr = PALMAS_SMPS3_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053066 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010067 },
68 {
69 .name = "SMPS45",
Laxman Dewangan504382c2013-03-20 19:26:37 +053070 .sname = "smps4-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010071 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
72 .ctrl_addr = PALMAS_SMPS45_CTRL,
73 .tstep_addr = PALMAS_SMPS45_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053074 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010075 },
76 {
77 .name = "SMPS457",
Laxman Dewangan504382c2013-03-20 19:26:37 +053078 .sname = "smps4-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010079 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
80 .ctrl_addr = PALMAS_SMPS45_CTRL,
81 .tstep_addr = PALMAS_SMPS45_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053082 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010083 },
84 {
85 .name = "SMPS6",
Laxman Dewangan504382c2013-03-20 19:26:37 +053086 .sname = "smps6-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010087 .vsel_addr = PALMAS_SMPS6_VOLTAGE,
88 .ctrl_addr = PALMAS_SMPS6_CTRL,
89 .tstep_addr = PALMAS_SMPS6_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053090 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010091 },
92 {
93 .name = "SMPS7",
Laxman Dewangan504382c2013-03-20 19:26:37 +053094 .sname = "smps7-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010095 .vsel_addr = PALMAS_SMPS7_VOLTAGE,
96 .ctrl_addr = PALMAS_SMPS7_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053097 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010098 },
99 {
100 .name = "SMPS8",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530101 .sname = "smps8-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100102 .vsel_addr = PALMAS_SMPS8_VOLTAGE,
103 .ctrl_addr = PALMAS_SMPS8_CTRL,
104 .tstep_addr = PALMAS_SMPS8_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530105 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100106 },
107 {
108 .name = "SMPS9",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530109 .sname = "smps9-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100110 .vsel_addr = PALMAS_SMPS9_VOLTAGE,
111 .ctrl_addr = PALMAS_SMPS9_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530112 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100113 },
114 {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530115 .name = "SMPS10_OUT2",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530116 .sname = "smps10-in",
Axel Line31089c2013-04-19 20:33:45 +0800117 .ctrl_addr = PALMAS_SMPS10_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530118 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100119 },
120 {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530121 .name = "SMPS10_OUT1",
122 .sname = "smps10-out2",
123 .ctrl_addr = PALMAS_SMPS10_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530124 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530125 },
126 {
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100127 .name = "LDO1",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530128 .sname = "ldo1-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100129 .vsel_addr = PALMAS_LDO1_VOLTAGE,
130 .ctrl_addr = PALMAS_LDO1_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530131 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100132 },
133 {
134 .name = "LDO2",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530135 .sname = "ldo2-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100136 .vsel_addr = PALMAS_LDO2_VOLTAGE,
137 .ctrl_addr = PALMAS_LDO2_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530138 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100139 },
140 {
141 .name = "LDO3",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530142 .sname = "ldo3-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100143 .vsel_addr = PALMAS_LDO3_VOLTAGE,
144 .ctrl_addr = PALMAS_LDO3_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530145 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100146 },
147 {
148 .name = "LDO4",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530149 .sname = "ldo4-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100150 .vsel_addr = PALMAS_LDO4_VOLTAGE,
151 .ctrl_addr = PALMAS_LDO4_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530152 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100153 },
154 {
155 .name = "LDO5",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530156 .sname = "ldo5-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100157 .vsel_addr = PALMAS_LDO5_VOLTAGE,
158 .ctrl_addr = PALMAS_LDO5_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530159 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100160 },
161 {
162 .name = "LDO6",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530163 .sname = "ldo6-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100164 .vsel_addr = PALMAS_LDO6_VOLTAGE,
165 .ctrl_addr = PALMAS_LDO6_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530166 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100167 },
168 {
169 .name = "LDO7",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530170 .sname = "ldo7-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100171 .vsel_addr = PALMAS_LDO7_VOLTAGE,
172 .ctrl_addr = PALMAS_LDO7_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530173 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100174 },
175 {
176 .name = "LDO8",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530177 .sname = "ldo8-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100178 .vsel_addr = PALMAS_LDO8_VOLTAGE,
179 .ctrl_addr = PALMAS_LDO8_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530180 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100181 },
182 {
183 .name = "LDO9",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530184 .sname = "ldo9-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100185 .vsel_addr = PALMAS_LDO9_VOLTAGE,
186 .ctrl_addr = PALMAS_LDO9_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530187 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100188 },
189 {
190 .name = "LDOLN",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530191 .sname = "ldoln-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100192 .vsel_addr = PALMAS_LDOLN_VOLTAGE,
193 .ctrl_addr = PALMAS_LDOLN_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530194 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100195 },
196 {
197 .name = "LDOUSB",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530198 .sname = "ldousb-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100199 .vsel_addr = PALMAS_LDOUSB_VOLTAGE,
200 .ctrl_addr = PALMAS_LDOUSB_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530201 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100202 },
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530203 {
204 .name = "REGEN1",
205 .ctrl_addr = PALMAS_REGEN1_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530206 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530207 },
208 {
209 .name = "REGEN2",
210 .ctrl_addr = PALMAS_REGEN2_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530211 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530212 },
213 {
214 .name = "REGEN3",
215 .ctrl_addr = PALMAS_REGEN3_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530216 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530217 },
218 {
219 .name = "SYSEN1",
220 .ctrl_addr = PALMAS_SYSEN1_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530221 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530222 },
223 {
224 .name = "SYSEN2",
225 .ctrl_addr = PALMAS_SYSEN2_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530226 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530227 },
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100228};
229
Nishanth Menone7cf34e2014-06-30 10:57:35 -0500230static struct palmas_regs_info tps65917_regs_info[] = {
Keerthyd6f83372014-06-18 15:29:00 +0530231 {
232 .name = "SMPS1",
233 .sname = "smps1-in",
234 .vsel_addr = TPS65917_SMPS1_VOLTAGE,
235 .ctrl_addr = TPS65917_SMPS1_CTRL,
236 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
237 },
238 {
239 .name = "SMPS2",
240 .sname = "smps2-in",
241 .vsel_addr = TPS65917_SMPS2_VOLTAGE,
242 .ctrl_addr = TPS65917_SMPS2_CTRL,
243 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
244 },
245 {
246 .name = "SMPS3",
247 .sname = "smps3-in",
248 .vsel_addr = TPS65917_SMPS3_VOLTAGE,
249 .ctrl_addr = TPS65917_SMPS3_CTRL,
250 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
251 },
252 {
253 .name = "SMPS4",
254 .sname = "smps4-in",
255 .vsel_addr = TPS65917_SMPS4_VOLTAGE,
256 .ctrl_addr = TPS65917_SMPS4_CTRL,
257 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
258 },
259 {
260 .name = "SMPS5",
261 .sname = "smps5-in",
262 .vsel_addr = TPS65917_SMPS5_VOLTAGE,
263 .ctrl_addr = TPS65917_SMPS5_CTRL,
264 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
265 },
266 {
267 .name = "LDO1",
268 .sname = "ldo1-in",
269 .vsel_addr = TPS65917_LDO1_VOLTAGE,
270 .ctrl_addr = TPS65917_LDO1_CTRL,
271 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1,
272 },
273 {
274 .name = "LDO2",
275 .sname = "ldo2-in",
276 .vsel_addr = TPS65917_LDO2_VOLTAGE,
277 .ctrl_addr = TPS65917_LDO2_CTRL,
278 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2,
279 },
280 {
281 .name = "LDO3",
282 .sname = "ldo3-in",
283 .vsel_addr = TPS65917_LDO3_VOLTAGE,
284 .ctrl_addr = TPS65917_LDO3_CTRL,
285 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3,
286 },
287 {
288 .name = "LDO4",
289 .sname = "ldo4-in",
290 .vsel_addr = TPS65917_LDO4_VOLTAGE,
291 .ctrl_addr = TPS65917_LDO4_CTRL,
292 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4,
293 },
294 {
295 .name = "LDO5",
296 .sname = "ldo5-in",
297 .vsel_addr = TPS65917_LDO5_VOLTAGE,
298 .ctrl_addr = TPS65917_LDO5_CTRL,
299 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5,
300 },
301 {
302 .name = "REGEN1",
303 .ctrl_addr = TPS65917_REGEN1_CTRL,
304 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
305 },
306 {
307 .name = "REGEN2",
308 .ctrl_addr = TPS65917_REGEN2_CTRL,
309 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
310 },
311 {
312 .name = "REGEN3",
313 .ctrl_addr = TPS65917_REGEN3_CTRL,
314 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
315 },
316};
317
Keerthycac9e912014-06-18 15:28:59 +0530318#define EXTERNAL_REQUESTOR(_id, _offset, _pos) \
319 [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \
320 .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \
321 .reg_offset = _offset, \
322 .bit_pos = _pos, \
323 }
324
Nishanth Menon4b09e172014-06-30 10:57:34 -0500325static struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
Keerthycac9e912014-06-18 15:28:59 +0530326 EXTERNAL_REQUESTOR(REGEN1, 0, 0),
327 EXTERNAL_REQUESTOR(REGEN2, 0, 1),
328 EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
329 EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
330 EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
331 EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
332 EXTERNAL_REQUESTOR(REGEN3, 0, 6),
333 EXTERNAL_REQUESTOR(SMPS12, 1, 0),
334 EXTERNAL_REQUESTOR(SMPS3, 1, 1),
335 EXTERNAL_REQUESTOR(SMPS45, 1, 2),
336 EXTERNAL_REQUESTOR(SMPS6, 1, 3),
337 EXTERNAL_REQUESTOR(SMPS7, 1, 4),
338 EXTERNAL_REQUESTOR(SMPS8, 1, 5),
339 EXTERNAL_REQUESTOR(SMPS9, 1, 6),
340 EXTERNAL_REQUESTOR(SMPS10, 1, 7),
341 EXTERNAL_REQUESTOR(LDO1, 2, 0),
342 EXTERNAL_REQUESTOR(LDO2, 2, 1),
343 EXTERNAL_REQUESTOR(LDO3, 2, 2),
344 EXTERNAL_REQUESTOR(LDO4, 2, 3),
345 EXTERNAL_REQUESTOR(LDO5, 2, 4),
346 EXTERNAL_REQUESTOR(LDO6, 2, 5),
347 EXTERNAL_REQUESTOR(LDO7, 2, 6),
348 EXTERNAL_REQUESTOR(LDO8, 2, 7),
349 EXTERNAL_REQUESTOR(LDO9, 3, 0),
350 EXTERNAL_REQUESTOR(LDOLN, 3, 1),
351 EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
352};
353
Keerthyd6f83372014-06-18 15:29:00 +0530354#define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \
355 [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \
356 .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \
357 .reg_offset = _offset, \
358 .bit_pos = _pos, \
359 }
360
361static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = {
362 EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0),
363 EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1),
364 EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6),
365 EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0),
366 EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1),
367 EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2),
368 EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3),
369 EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4),
370 EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0),
371 EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1),
372 EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2),
373 EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3),
374 EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4),
375};
376
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530377static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
378
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100379#define SMPS_CTRL_MODE_OFF 0x00
380#define SMPS_CTRL_MODE_ON 0x01
381#define SMPS_CTRL_MODE_ECO 0x02
382#define SMPS_CTRL_MODE_PWM 0x03
383
Laxman Dewangan0f45aa82013-09-04 15:20:06 +0530384#define PALMAS_SMPS_NUM_VOLTAGES 122
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100385#define PALMAS_SMPS10_NUM_VOLTAGES 2
386#define PALMAS_LDO_NUM_VOLTAGES 50
387
388#define SMPS10_VSEL (1<<3)
389#define SMPS10_BOOST_EN (1<<2)
390#define SMPS10_BYPASS_EN (1<<1)
391#define SMPS10_SWITCH_EN (1<<0)
392
393#define REGULATOR_SLAVE 0
394
395static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
396 unsigned int *dest)
397{
398 unsigned int addr;
399
400 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
401
402 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
403}
404
405static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
406 unsigned int value)
407{
408 unsigned int addr;
409
410 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
411
412 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
413}
414
415static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
416 unsigned int *dest)
417{
418 unsigned int addr;
419
420 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
421
422 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
423}
424
425static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
426 unsigned int value)
427{
428 unsigned int addr;
429
430 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
431
432 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
433}
434
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100435static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
436{
Nishanth Menoncf910b62014-06-30 10:57:36 -0500437 int id = rdev_get_id(dev);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100438 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
Keerthycac9e912014-06-18 15:28:59 +0530439 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500440 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100441 unsigned int reg;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530442 bool rail_enable = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100443
Nishanth Menoncf910b62014-06-30 10:57:36 -0500444 palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, &reg);
Keerthycac9e912014-06-18 15:28:59 +0530445
Axel Lin999f0c72012-06-07 17:08:21 +0800446 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100447
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530448 if (reg == SMPS_CTRL_MODE_OFF)
449 rail_enable = false;
450
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100451 switch (mode) {
452 case REGULATOR_MODE_NORMAL:
453 reg |= SMPS_CTRL_MODE_ON;
454 break;
455 case REGULATOR_MODE_IDLE:
456 reg |= SMPS_CTRL_MODE_ECO;
457 break;
458 case REGULATOR_MODE_FAST:
459 reg |= SMPS_CTRL_MODE_PWM;
460 break;
461 default:
462 return -EINVAL;
463 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100464
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530465 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
466 if (rail_enable)
Nishanth Menoncf910b62014-06-30 10:57:36 -0500467 palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg);
Nishanth Menon318dbb02014-06-20 12:26:23 -0500468
469 /* Switch the enable value to ensure this is used for enable */
470 pmic->desc[id].enable_val = pmic->current_reg_mode[id];
471
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100472 return 0;
473}
474
475static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
476{
477 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
478 int id = rdev_get_id(dev);
479 unsigned int reg;
480
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530481 reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100482
483 switch (reg) {
484 case SMPS_CTRL_MODE_ON:
485 return REGULATOR_MODE_NORMAL;
486 case SMPS_CTRL_MODE_ECO:
487 return REGULATOR_MODE_IDLE;
488 case SMPS_CTRL_MODE_PWM:
489 return REGULATOR_MODE_FAST;
490 }
491
492 return 0;
493}
494
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530495static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
496 int ramp_delay)
497{
Nishanth Menoncf910b62014-06-30 10:57:36 -0500498 int id = rdev_get_id(rdev);
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530499 struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
Keerthycac9e912014-06-18 15:28:59 +0530500 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500501 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530502 unsigned int reg = 0;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530503 int ret;
504
Axel Linf22c2ba2013-04-19 14:18:48 +0800505 /* SMPS3 and SMPS7 do not have tstep_addr setting */
506 switch (id) {
507 case PALMAS_REG_SMPS3:
508 case PALMAS_REG_SMPS7:
509 return 0;
510 }
511
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530512 if (ramp_delay <= 0)
513 reg = 0;
Axel Lin0ea34b52013-04-22 18:22:49 +0800514 else if (ramp_delay <= 2500)
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530515 reg = 3;
Axel Lin0ea34b52013-04-22 18:22:49 +0800516 else if (ramp_delay <= 5000)
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530517 reg = 2;
518 else
519 reg = 1;
520
Nishanth Menoncf910b62014-06-30 10:57:36 -0500521 ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg);
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530522 if (ret < 0) {
523 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
524 return ret;
525 }
526
527 pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
528 return ret;
529}
530
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100531static struct regulator_ops palmas_ops_smps = {
Keerthydbabd622014-05-22 14:48:29 +0530532 .is_enabled = regulator_is_enabled_regmap,
533 .enable = regulator_enable_regmap,
534 .disable = regulator_disable_regmap,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100535 .set_mode = palmas_set_mode_smps,
536 .get_mode = palmas_get_mode_smps,
Axel Linbdc4baa2012-11-29 10:01:44 +0800537 .get_voltage_sel = regulator_get_voltage_sel_regmap,
538 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Keerthydbabd622014-05-22 14:48:29 +0530539 .list_voltage = regulator_list_voltage_linear_range,
540 .map_voltage = regulator_map_voltage_linear_range,
541 .set_voltage_time_sel = regulator_set_voltage_time_sel,
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530542 .set_ramp_delay = palmas_smps_set_ramp_delay,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100543};
544
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530545static struct regulator_ops palmas_ops_ext_control_smps = {
546 .set_mode = palmas_set_mode_smps,
547 .get_mode = palmas_get_mode_smps,
548 .get_voltage_sel = regulator_get_voltage_sel_regmap,
549 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Keerthydbabd622014-05-22 14:48:29 +0530550 .list_voltage = regulator_list_voltage_linear_range,
551 .map_voltage = regulator_map_voltage_linear_range,
552 .set_voltage_time_sel = regulator_set_voltage_time_sel,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530553 .set_ramp_delay = palmas_smps_set_ramp_delay,
554};
555
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100556static struct regulator_ops palmas_ops_smps10 = {
557 .is_enabled = regulator_is_enabled_regmap,
558 .enable = regulator_enable_regmap,
559 .disable = regulator_disable_regmap,
560 .get_voltage_sel = regulator_get_voltage_sel_regmap,
561 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Axel Lin8029a002012-05-22 12:26:42 +0800562 .list_voltage = regulator_list_voltage_linear,
563 .map_voltage = regulator_map_voltage_linear,
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530564 .set_bypass = regulator_set_bypass_regmap,
565 .get_bypass = regulator_get_bypass_regmap,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100566};
567
Keerthyd6f83372014-06-18 15:29:00 +0530568static struct regulator_ops tps65917_ops_smps = {
569 .is_enabled = regulator_is_enabled_regmap,
570 .enable = regulator_enable_regmap,
571 .disable = regulator_disable_regmap,
572 .set_mode = palmas_set_mode_smps,
573 .get_mode = palmas_get_mode_smps,
574 .get_voltage_sel = regulator_get_voltage_sel_regmap,
575 .set_voltage_sel = regulator_set_voltage_sel_regmap,
576 .list_voltage = regulator_list_voltage_linear_range,
577 .map_voltage = regulator_map_voltage_linear_range,
578 .set_voltage_time_sel = regulator_set_voltage_time_sel,
579};
580
581static struct regulator_ops tps65917_ops_ext_control_smps = {
582 .set_mode = palmas_set_mode_smps,
583 .get_mode = palmas_get_mode_smps,
584 .get_voltage_sel = regulator_get_voltage_sel_regmap,
585 .set_voltage_sel = regulator_set_voltage_sel_regmap,
586 .list_voltage = regulator_list_voltage_linear_range,
587 .map_voltage = regulator_map_voltage_linear_range,
588};
589
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100590static int palmas_is_enabled_ldo(struct regulator_dev *dev)
591{
Nishanth Menoncf910b62014-06-30 10:57:36 -0500592 int id = rdev_get_id(dev);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100593 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
Keerthycac9e912014-06-18 15:28:59 +0530594 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500595 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100596 unsigned int reg;
597
Nishanth Menoncf910b62014-06-30 10:57:36 -0500598 palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, &reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100599
600 reg &= PALMAS_LDO1_CTRL_STATUS;
601
602 return !!(reg);
603}
604
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100605static struct regulator_ops palmas_ops_ldo = {
606 .is_enabled = palmas_is_enabled_ldo,
607 .enable = regulator_enable_regmap,
608 .disable = regulator_disable_regmap,
Axel Lin4a247a92012-07-18 12:34:08 +0800609 .get_voltage_sel = regulator_get_voltage_sel_regmap,
610 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Axel Lin9119ff62012-11-27 10:27:34 +0800611 .list_voltage = regulator_list_voltage_linear,
612 .map_voltage = regulator_map_voltage_linear,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100613};
614
Keerthyb554e142015-12-14 12:06:55 +0530615static struct regulator_ops palmas_ops_ldo9 = {
616 .is_enabled = palmas_is_enabled_ldo,
617 .enable = regulator_enable_regmap,
618 .disable = regulator_disable_regmap,
619 .get_voltage_sel = regulator_get_voltage_sel_regmap,
620 .set_voltage_sel = regulator_set_voltage_sel_regmap,
621 .list_voltage = regulator_list_voltage_linear,
622 .map_voltage = regulator_map_voltage_linear,
623 .set_bypass = regulator_set_bypass_regmap,
624 .get_bypass = regulator_get_bypass_regmap,
625};
626
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530627static struct regulator_ops palmas_ops_ext_control_ldo = {
628 .get_voltage_sel = regulator_get_voltage_sel_regmap,
629 .set_voltage_sel = regulator_set_voltage_sel_regmap,
630 .list_voltage = regulator_list_voltage_linear,
631 .map_voltage = regulator_map_voltage_linear,
632};
633
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530634static struct regulator_ops palmas_ops_extreg = {
635 .is_enabled = regulator_is_enabled_regmap,
636 .enable = regulator_enable_regmap,
637 .disable = regulator_disable_regmap,
638};
639
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530640static struct regulator_ops palmas_ops_ext_control_extreg = {
641};
642
Keerthyd6f83372014-06-18 15:29:00 +0530643static struct regulator_ops tps65917_ops_ldo = {
644 .is_enabled = palmas_is_enabled_ldo,
645 .enable = regulator_enable_regmap,
646 .disable = regulator_disable_regmap,
647 .get_voltage_sel = regulator_get_voltage_sel_regmap,
648 .set_voltage_sel = regulator_set_voltage_sel_regmap,
649 .list_voltage = regulator_list_voltage_linear,
650 .map_voltage = regulator_map_voltage_linear,
651 .set_voltage_time_sel = regulator_set_voltage_time_sel,
652};
653
Keerthyb554e142015-12-14 12:06:55 +0530654static struct regulator_ops tps65917_ops_ldo_1_2 = {
655 .is_enabled = palmas_is_enabled_ldo,
656 .enable = regulator_enable_regmap,
657 .disable = regulator_disable_regmap,
658 .get_voltage_sel = regulator_get_voltage_sel_regmap,
659 .set_voltage_sel = regulator_set_voltage_sel_regmap,
660 .list_voltage = regulator_list_voltage_linear,
661 .map_voltage = regulator_map_voltage_linear,
662 .set_voltage_time_sel = regulator_set_voltage_time_sel,
663 .set_bypass = regulator_set_bypass_regmap,
664 .get_bypass = regulator_get_bypass_regmap,
665};
666
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530667static int palmas_regulator_config_external(struct palmas *palmas, int id,
668 struct palmas_reg_init *reg_init)
669{
Nishanth Menoncf910b62014-06-30 10:57:36 -0500670 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
671 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530672 int ret;
673
Nishanth Menoncf910b62014-06-30 10:57:36 -0500674 ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id,
675 reg_init->roof_floor, true);
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530676 if (ret < 0)
677 dev_err(palmas->dev,
678 "Ext control config for regulator %d failed %d\n",
679 id, ret);
680 return ret;
681}
682
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100683/*
684 * setup the hardware based sleep configuration of the SMPS/LDO regulators
685 * from the platform data. This is different to the software based control
686 * supported by the regulator framework as it is controlled by toggling
687 * pins on the PMIC such as PREQ, SYSEN, ...
688 */
689static int palmas_smps_init(struct palmas *palmas, int id,
690 struct palmas_reg_init *reg_init)
691{
692 unsigned int reg;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100693 int ret;
Keerthycac9e912014-06-18 15:28:59 +0530694 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500695 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
696 unsigned int addr = rinfo->ctrl_addr;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100697
698 ret = palmas_smps_read(palmas, addr, &reg);
699 if (ret)
700 return ret;
701
Axel Linfedd89b2012-06-06 20:01:38 +0800702 switch (id) {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530703 case PALMAS_REG_SMPS10_OUT1:
704 case PALMAS_REG_SMPS10_OUT2:
Laxman Dewangan30590d02013-04-17 15:13:11 +0530705 reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
706 if (reg_init->mode_sleep)
Axel Linfedd89b2012-06-06 20:01:38 +0800707 reg |= reg_init->mode_sleep <<
708 PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
Axel Linfedd89b2012-06-06 20:01:38 +0800709 break;
710 default:
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100711 if (reg_init->warm_reset)
712 reg |= PALMAS_SMPS12_CTRL_WR_S;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530713 else
714 reg &= ~PALMAS_SMPS12_CTRL_WR_S;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100715
716 if (reg_init->roof_floor)
717 reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530718 else
719 reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100720
Laxman Dewangan30590d02013-04-17 15:13:11 +0530721 reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
722 if (reg_init->mode_sleep)
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100723 reg |= reg_init->mode_sleep <<
724 PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100725 }
Axel Linfedd89b2012-06-06 20:01:38 +0800726
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100727 ret = palmas_smps_write(palmas, addr, reg);
728 if (ret)
729 return ret;
730
Nishanth Menoncf910b62014-06-30 10:57:36 -0500731 if (rinfo->vsel_addr && reg_init->vsel) {
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100732
733 reg = reg_init->vsel;
734
Nishanth Menoncf910b62014-06-30 10:57:36 -0500735 ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100736 if (ret)
737 return ret;
738 }
739
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530740 if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
741 (id != PALMAS_REG_SMPS10_OUT2)) {
742 /* Enable externally controlled regulator */
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530743 ret = palmas_smps_read(palmas, addr, &reg);
744 if (ret < 0)
745 return ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100746
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530747 if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) {
748 reg |= SMPS_CTRL_MODE_ON;
749 ret = palmas_smps_write(palmas, addr, reg);
750 if (ret < 0)
751 return ret;
752 }
753 return palmas_regulator_config_external(palmas, id, reg_init);
754 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100755 return 0;
756}
757
758static int palmas_ldo_init(struct palmas *palmas, int id,
759 struct palmas_reg_init *reg_init)
760{
761 unsigned int reg;
762 unsigned int addr;
763 int ret;
Keerthycac9e912014-06-18 15:28:59 +0530764 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500765 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Keerthycac9e912014-06-18 15:28:59 +0530766
Nishanth Menoncf910b62014-06-30 10:57:36 -0500767 addr = rinfo->ctrl_addr;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100768
Axel Lin2735dae2012-07-18 12:31:59 +0800769 ret = palmas_ldo_read(palmas, addr, &reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100770 if (ret)
771 return ret;
772
773 if (reg_init->warm_reset)
774 reg |= PALMAS_LDO1_CTRL_WR_S;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530775 else
776 reg &= ~PALMAS_LDO1_CTRL_WR_S;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100777
778 if (reg_init->mode_sleep)
779 reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530780 else
781 reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100782
Axel Lin2735dae2012-07-18 12:31:59 +0800783 ret = palmas_ldo_write(palmas, addr, reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100784 if (ret)
785 return ret;
786
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530787 if (reg_init->roof_floor) {
788 /* Enable externally controlled regulator */
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530789 ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
790 addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
791 PALMAS_LDO1_CTRL_MODE_ACTIVE);
792 if (ret < 0) {
793 dev_err(palmas->dev,
794 "LDO Register 0x%02x update failed %d\n",
795 addr, ret);
796 return ret;
797 }
798 return palmas_regulator_config_external(palmas, id, reg_init);
799 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100800 return 0;
801}
802
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530803static int palmas_extreg_init(struct palmas *palmas, int id,
804 struct palmas_reg_init *reg_init)
805{
806 unsigned int addr;
807 int ret;
808 unsigned int val = 0;
Keerthycac9e912014-06-18 15:28:59 +0530809 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500810 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Keerthycac9e912014-06-18 15:28:59 +0530811
Nishanth Menoncf910b62014-06-30 10:57:36 -0500812 addr = rinfo->ctrl_addr;
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530813
814 if (reg_init->mode_sleep)
815 val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
816
817 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
818 addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
819 if (ret < 0) {
820 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
821 addr, ret);
822 return ret;
823 }
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530824
825 if (reg_init->roof_floor) {
826 /* Enable externally controlled regulator */
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530827 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
828 addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
829 PALMAS_REGEN1_CTRL_MODE_ACTIVE);
830 if (ret < 0) {
831 dev_err(palmas->dev,
832 "Resource Register 0x%02x update failed %d\n",
833 addr, ret);
834 return ret;
835 }
836 return palmas_regulator_config_external(palmas, id, reg_init);
837 }
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530838 return 0;
839}
840
Laxman Dewangan17c11a72013-04-17 15:13:13 +0530841static void palmas_enable_ldo8_track(struct palmas *palmas)
842{
843 unsigned int reg;
844 unsigned int addr;
845 int ret;
Keerthycac9e912014-06-18 15:28:59 +0530846 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500847 struct palmas_regs_info *rinfo;
Keerthycac9e912014-06-18 15:28:59 +0530848
Nishanth Menoncf910b62014-06-30 10:57:36 -0500849 rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8];
850 addr = rinfo->ctrl_addr;
Laxman Dewangan17c11a72013-04-17 15:13:13 +0530851
852 ret = palmas_ldo_read(palmas, addr, &reg);
853 if (ret) {
854 dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
855 return;
856 }
857
858 reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
859 ret = palmas_ldo_write(palmas, addr, reg);
860 if (ret < 0) {
861 dev_err(palmas->dev, "Error in enabling tracking mode\n");
862 return;
863 }
864 /*
865 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
866 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
867 * and can be set from 0.45 to 1.65 V.
868 */
Nishanth Menoncf910b62014-06-30 10:57:36 -0500869 addr = rinfo->vsel_addr;
Laxman Dewangan17c11a72013-04-17 15:13:13 +0530870 ret = palmas_ldo_read(palmas, addr, &reg);
871 if (ret) {
872 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
873 return;
874 }
875
876 reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
877 ret = palmas_ldo_write(palmas, addr, reg);
878 if (ret < 0)
879 dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
880
881 return;
882}
883
Keerthycac9e912014-06-18 15:28:59 +0530884static int palmas_ldo_registration(struct palmas_pmic *pmic,
885 struct palmas_pmic_driver_data *ddata,
886 struct palmas_pmic_platform_data *pdata,
887 const char *pdev_name,
888 struct regulator_config config)
Graeme Gregorya361cd92012-08-28 13:47:40 +0200889{
Keerthycac9e912014-06-18 15:28:59 +0530890 int id, ret;
891 struct regulator_dev *rdev;
892 struct palmas_reg_init *reg_init;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500893 struct palmas_regs_info *rinfo;
Nishanth Menon429222d2014-06-30 10:57:38 -0500894 struct regulator_desc *desc;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200895
Keerthycac9e912014-06-18 15:28:59 +0530896 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
897 if (pdata && pdata->reg_init[id])
898 reg_init = pdata->reg_init[id];
899 else
900 reg_init = NULL;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200901
Nishanth Menoncf910b62014-06-30 10:57:36 -0500902 rinfo = &ddata->palmas_regs_info[id];
Keerthycac9e912014-06-18 15:28:59 +0530903 /* Miss out regulators which are not available due
904 * to alternate functions.
905 */
Graeme Gregorya361cd92012-08-28 13:47:40 +0200906
Keerthycac9e912014-06-18 15:28:59 +0530907 /* Register the regulators */
Nishanth Menon429222d2014-06-30 10:57:38 -0500908 desc = &pmic->desc[id];
909 desc->name = rinfo->name;
910 desc->id = id;
911 desc->type = REGULATOR_VOLTAGE;
912 desc->owner = THIS_MODULE;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200913
Keerthycac9e912014-06-18 15:28:59 +0530914 if (id < PALMAS_REG_REGEN1) {
Nishanth Menon429222d2014-06-30 10:57:38 -0500915 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
Keerthycac9e912014-06-18 15:28:59 +0530916 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -0500917 desc->ops = &palmas_ops_ext_control_ldo;
Keerthycac9e912014-06-18 15:28:59 +0530918 else
Nishanth Menon429222d2014-06-30 10:57:38 -0500919 desc->ops = &palmas_ops_ldo;
920 desc->min_uV = 900000;
921 desc->uV_step = 50000;
922 desc->linear_min_sel = 1;
923 desc->enable_time = 500;
924 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
925 rinfo->vsel_addr);
926 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
927 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
928 rinfo->ctrl_addr);
929 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200930
Keerthycac9e912014-06-18 15:28:59 +0530931 /* Check if LDO8 is in tracking mode or not */
932 if (pdata && (id == PALMAS_REG_LDO8) &&
933 pdata->enable_ldo8_tracking) {
934 palmas_enable_ldo8_track(pmic->palmas);
Nishanth Menon429222d2014-06-30 10:57:38 -0500935 desc->min_uV = 450000;
936 desc->uV_step = 25000;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530937 }
Keerthycac9e912014-06-18 15:28:59 +0530938
939 /* LOD6 in vibrator mode will have enable time 2000us */
940 if (pdata && pdata->ldo6_vibrator &&
941 (id == PALMAS_REG_LDO6))
Nishanth Menon429222d2014-06-30 10:57:38 -0500942 desc->enable_time = 2000;
Keerthyb554e142015-12-14 12:06:55 +0530943
944 if (id == PALMAS_REG_LDO9) {
945 desc->ops = &palmas_ops_ldo9;
946 desc->bypass_reg = desc->enable_reg;
Nishanth Menone0341f12016-04-26 11:36:42 -0500947 desc->bypass_val_on =
948 PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
Keerthyb554e142015-12-14 12:06:55 +0530949 desc->bypass_mask =
950 PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
951 }
Keerthycac9e912014-06-18 15:28:59 +0530952 } else {
Keerthye999c722015-03-17 15:56:05 +0530953 if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3)
954 continue;
955
Nishanth Menon429222d2014-06-30 10:57:38 -0500956 desc->n_voltages = 1;
Keerthycac9e912014-06-18 15:28:59 +0530957 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -0500958 desc->ops = &palmas_ops_ext_control_extreg;
Keerthycac9e912014-06-18 15:28:59 +0530959 else
Nishanth Menon429222d2014-06-30 10:57:38 -0500960 desc->ops = &palmas_ops_extreg;
961 desc->enable_reg =
Keerthycac9e912014-06-18 15:28:59 +0530962 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
Nishanth Menoncf910b62014-06-30 10:57:36 -0500963 rinfo->ctrl_addr);
Nishanth Menon429222d2014-06-30 10:57:38 -0500964 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530965 }
Graeme Gregorya361cd92012-08-28 13:47:40 +0200966
Keerthycac9e912014-06-18 15:28:59 +0530967 if (pdata)
968 config.init_data = pdata->reg_data[id];
969 else
970 config.init_data = NULL;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200971
Nishanth Menon429222d2014-06-30 10:57:38 -0500972 desc->supply_name = rinfo->sname;
Keerthycac9e912014-06-18 15:28:59 +0530973 config.of_node = ddata->palmas_matches[id].of_node;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200974
Nishanth Menon429222d2014-06-30 10:57:38 -0500975 rdev = devm_regulator_register(pmic->dev, desc, &config);
Keerthycac9e912014-06-18 15:28:59 +0530976 if (IS_ERR(rdev)) {
977 dev_err(pmic->dev,
978 "failed to register %s regulator\n",
979 pdev_name);
980 return PTR_ERR(rdev);
981 }
982
983 /* Save regulator for cleanup */
984 pmic->rdev[id] = rdev;
985
986 /* Initialise sleep/init values from platform data */
987 if (pdata) {
988 reg_init = pdata->reg_init[id];
989 if (reg_init) {
990 if (id <= ddata->ldo_end)
991 ret = palmas_ldo_init(pmic->palmas, id,
992 reg_init);
993 else
994 ret = palmas_extreg_init(pmic->palmas,
995 id, reg_init);
996 if (ret)
997 return ret;
998 }
999 }
Graeme Gregorya361cd92012-08-28 13:47:40 +02001000 }
1001
Keerthycac9e912014-06-18 15:28:59 +05301002 return 0;
Graeme Gregorya361cd92012-08-28 13:47:40 +02001003}
1004
Keerthyd6f83372014-06-18 15:29:00 +05301005static int tps65917_ldo_registration(struct palmas_pmic *pmic,
1006 struct palmas_pmic_driver_data *ddata,
1007 struct palmas_pmic_platform_data *pdata,
1008 const char *pdev_name,
1009 struct regulator_config config)
1010{
1011 int id, ret;
1012 struct regulator_dev *rdev;
1013 struct palmas_reg_init *reg_init;
Nishanth Menoncf910b62014-06-30 10:57:36 -05001014 struct palmas_regs_info *rinfo;
Nishanth Menon429222d2014-06-30 10:57:38 -05001015 struct regulator_desc *desc;
Keerthyd6f83372014-06-18 15:29:00 +05301016
1017 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
1018 if (pdata && pdata->reg_init[id])
1019 reg_init = pdata->reg_init[id];
1020 else
1021 reg_init = NULL;
1022
1023 /* Miss out regulators which are not available due
1024 * to alternate functions.
1025 */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001026 rinfo = &ddata->palmas_regs_info[id];
Keerthyd6f83372014-06-18 15:29:00 +05301027
1028 /* Register the regulators */
Nishanth Menon429222d2014-06-30 10:57:38 -05001029 desc = &pmic->desc[id];
1030 desc->name = rinfo->name;
1031 desc->id = id;
1032 desc->type = REGULATOR_VOLTAGE;
1033 desc->owner = THIS_MODULE;
Keerthyd6f83372014-06-18 15:29:00 +05301034
1035 if (id < TPS65917_REG_REGEN1) {
Nishanth Menon429222d2014-06-30 10:57:38 -05001036 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
Keerthyd6f83372014-06-18 15:29:00 +05301037 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -05001038 desc->ops = &palmas_ops_ext_control_ldo;
Keerthyd6f83372014-06-18 15:29:00 +05301039 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001040 desc->ops = &tps65917_ops_ldo;
1041 desc->min_uV = 900000;
1042 desc->uV_step = 50000;
1043 desc->linear_min_sel = 1;
1044 desc->enable_time = 500;
1045 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1046 rinfo->vsel_addr);
1047 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
1048 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1049 rinfo->ctrl_addr);
1050 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
Keerthyd6f83372014-06-18 15:29:00 +05301051 /*
1052 * To be confirmed. Discussion on going with PMIC Team.
1053 * It is of the order of ~60mV/uS.
1054 */
Nishanth Menon429222d2014-06-30 10:57:38 -05001055 desc->ramp_delay = 2500;
Keerthyb554e142015-12-14 12:06:55 +05301056 if (id == TPS65917_REG_LDO1 ||
1057 id == TPS65917_REG_LDO2) {
1058 desc->ops = &tps65917_ops_ldo_1_2;
1059 desc->bypass_reg = desc->enable_reg;
Nishanth Menone0341f12016-04-26 11:36:42 -05001060 desc->bypass_val_on =
1061 TPS65917_LDO1_CTRL_BYPASS_EN;
Keerthyb554e142015-12-14 12:06:55 +05301062 desc->bypass_mask =
1063 TPS65917_LDO1_CTRL_BYPASS_EN;
1064 }
Keerthyd6f83372014-06-18 15:29:00 +05301065 } else {
Nishanth Menon429222d2014-06-30 10:57:38 -05001066 desc->n_voltages = 1;
Keerthyd6f83372014-06-18 15:29:00 +05301067 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -05001068 desc->ops = &palmas_ops_ext_control_extreg;
Keerthyd6f83372014-06-18 15:29:00 +05301069 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001070 desc->ops = &palmas_ops_extreg;
1071 desc->enable_reg =
Keerthyd6f83372014-06-18 15:29:00 +05301072 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
Nishanth Menoncf910b62014-06-30 10:57:36 -05001073 rinfo->ctrl_addr);
Nishanth Menon429222d2014-06-30 10:57:38 -05001074 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
Keerthyd6f83372014-06-18 15:29:00 +05301075 }
1076
1077 if (pdata)
1078 config.init_data = pdata->reg_data[id];
1079 else
1080 config.init_data = NULL;
1081
Nishanth Menon429222d2014-06-30 10:57:38 -05001082 desc->supply_name = rinfo->sname;
Keerthyd6f83372014-06-18 15:29:00 +05301083 config.of_node = ddata->palmas_matches[id].of_node;
1084
Nishanth Menon429222d2014-06-30 10:57:38 -05001085 rdev = devm_regulator_register(pmic->dev, desc, &config);
Keerthyd6f83372014-06-18 15:29:00 +05301086 if (IS_ERR(rdev)) {
1087 dev_err(pmic->dev,
1088 "failed to register %s regulator\n",
1089 pdev_name);
1090 return PTR_ERR(rdev);
1091 }
1092
1093 /* Save regulator for cleanup */
1094 pmic->rdev[id] = rdev;
1095
1096 /* Initialise sleep/init values from platform data */
1097 if (pdata) {
1098 reg_init = pdata->reg_init[id];
1099 if (reg_init) {
1100 if (id < TPS65917_REG_REGEN1)
1101 ret = palmas_ldo_init(pmic->palmas,
1102 id, reg_init);
1103 else
1104 ret = palmas_extreg_init(pmic->palmas,
1105 id, reg_init);
1106 if (ret)
1107 return ret;
1108 }
1109 }
1110 }
1111
1112 return 0;
1113}
1114
Keerthycac9e912014-06-18 15:28:59 +05301115static int palmas_smps_registration(struct palmas_pmic *pmic,
1116 struct palmas_pmic_driver_data *ddata,
1117 struct palmas_pmic_platform_data *pdata,
1118 const char *pdev_name,
1119 struct regulator_config config)
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001120{
Keerthycac9e912014-06-18 15:28:59 +05301121 int id, ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001122 unsigned int addr, reg;
Keerthycac9e912014-06-18 15:28:59 +05301123 struct regulator_dev *rdev;
1124 struct palmas_reg_init *reg_init;
Nishanth Menoncf910b62014-06-30 10:57:36 -05001125 struct palmas_regs_info *rinfo;
Nishanth Menon429222d2014-06-30 10:57:38 -05001126 struct regulator_desc *desc;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001127
Keerthycac9e912014-06-18 15:28:59 +05301128 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301129 bool ramp_delay_support = false;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001130
1131 /*
1132 * Miss out regulators which are not available due
1133 * to slaving configurations.
1134 */
1135 switch (id) {
1136 case PALMAS_REG_SMPS12:
1137 case PALMAS_REG_SMPS3:
1138 if (pmic->smps123)
1139 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301140 if (id == PALMAS_REG_SMPS12)
1141 ramp_delay_support = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001142 break;
1143 case PALMAS_REG_SMPS123:
1144 if (!pmic->smps123)
1145 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301146 ramp_delay_support = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001147 break;
1148 case PALMAS_REG_SMPS45:
1149 case PALMAS_REG_SMPS7:
1150 if (pmic->smps457)
1151 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301152 if (id == PALMAS_REG_SMPS45)
1153 ramp_delay_support = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001154 break;
1155 case PALMAS_REG_SMPS457:
1156 if (!pmic->smps457)
1157 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301158 ramp_delay_support = true;
1159 break;
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +05301160 case PALMAS_REG_SMPS10_OUT1:
1161 case PALMAS_REG_SMPS10_OUT2:
Keerthycac9e912014-06-18 15:28:59 +05301162 if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST))
J Keerthy1ffb0be2013-06-19 11:27:48 +05301163 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301164 }
Nishanth Menoncf910b62014-06-30 10:57:36 -05001165 rinfo = &ddata->palmas_regs_info[id];
Nishanth Menon429222d2014-06-30 10:57:38 -05001166 desc = &pmic->desc[id];
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301167
Sachin Kamat3f4d6362013-05-08 16:09:06 +05301168 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301169 ramp_delay_support = true;
1170
1171 if (ramp_delay_support) {
Nishanth Menoncf910b62014-06-30 10:57:36 -05001172 addr = rinfo->tstep_addr;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301173 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1174 if (ret < 0) {
Keerthycac9e912014-06-18 15:28:59 +05301175 dev_err(pmic->dev,
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301176 "reading TSTEP reg failed: %d\n", ret);
Sachin Kamat51c86b32013-09-04 12:01:01 +05301177 return ret;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301178 }
Nishanth Menon429222d2014-06-30 10:57:38 -05001179 desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3];
1180 pmic->ramp_delay[id] = desc->ramp_delay;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001181 }
1182
Axel Linbdc4baa2012-11-29 10:01:44 +08001183 /* Initialise sleep/init values from platform data */
1184 if (pdata && pdata->reg_init[id]) {
1185 reg_init = pdata->reg_init[id];
Keerthycac9e912014-06-18 15:28:59 +05301186 ret = palmas_smps_init(pmic->palmas, id, reg_init);
Axel Linbdc4baa2012-11-29 10:01:44 +08001187 if (ret)
Sachin Kamat51c86b32013-09-04 12:01:01 +05301188 return ret;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +05301189 } else {
1190 reg_init = NULL;
Axel Linbdc4baa2012-11-29 10:01:44 +08001191 }
1192
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001193 /* Register the regulators */
Nishanth Menon429222d2014-06-30 10:57:38 -05001194 desc->name = rinfo->name;
1195 desc->id = id;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001196
Axel Linfedd89b2012-06-06 20:01:38 +08001197 switch (id) {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +05301198 case PALMAS_REG_SMPS10_OUT1:
1199 case PALMAS_REG_SMPS10_OUT2:
Nishanth Menon429222d2014-06-30 10:57:38 -05001200 desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
1201 desc->ops = &palmas_ops_smps10;
1202 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1203 PALMAS_SMPS10_CTRL);
1204 desc->vsel_mask = SMPS10_VSEL;
1205 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1206 PALMAS_SMPS10_CTRL);
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +05301207 if (id == PALMAS_REG_SMPS10_OUT1)
Nishanth Menon429222d2014-06-30 10:57:38 -05001208 desc->enable_mask = SMPS10_SWITCH_EN;
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +05301209 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001210 desc->enable_mask = SMPS10_BOOST_EN;
1211 desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1212 PALMAS_SMPS10_CTRL);
Nishanth Menone0341f12016-04-26 11:36:42 -05001213 desc->bypass_val_on = SMPS10_BYPASS_EN;
Nishanth Menon429222d2014-06-30 10:57:38 -05001214 desc->bypass_mask = SMPS10_BYPASS_EN;
1215 desc->min_uV = 3750000;
1216 desc->uV_step = 1250000;
Axel Linfedd89b2012-06-06 20:01:38 +08001217 break;
1218 default:
Axel Linbdc4baa2012-11-29 10:01:44 +08001219 /*
1220 * Read and store the RANGE bit for later use
1221 * This must be done before regulator is probed,
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +05301222 * otherwise we error in probe with unsupportable
1223 * ranges. Read the current smps mode for later use.
Axel Linbdc4baa2012-11-29 10:01:44 +08001224 */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001225 addr = rinfo->vsel_addr;
Nishanth Menon429222d2014-06-30 10:57:38 -05001226 desc->n_linear_ranges = 3;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001227
1228 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1229 if (ret)
Sachin Kamat51c86b32013-09-04 12:01:01 +05301230 return ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001231 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
1232 pmic->range[id] = 1;
Keerthydbabd622014-05-22 14:48:29 +05301233 if (pmic->range[id])
Nishanth Menon429222d2014-06-30 10:57:38 -05001234 desc->linear_ranges = smps_high_ranges;
Keerthydbabd622014-05-22 14:48:29 +05301235 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001236 desc->linear_ranges = smps_low_ranges;
Axel Linbdc4baa2012-11-29 10:01:44 +08001237
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +05301238 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -05001239 desc->ops = &palmas_ops_ext_control_smps;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +05301240 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001241 desc->ops = &palmas_ops_smps;
1242 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1243 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1244 rinfo->vsel_addr);
1245 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +05301246
1247 /* Read the smps mode for later use. */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001248 addr = rinfo->ctrl_addr;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +05301249 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1250 if (ret)
Sachin Kamat51c86b32013-09-04 12:01:01 +05301251 return ret;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +05301252 pmic->current_reg_mode[id] = reg &
1253 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Nishanth Menon318dbb02014-06-20 12:26:23 -05001254
Nishanth Menon429222d2014-06-30 10:57:38 -05001255 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1256 rinfo->ctrl_addr);
1257 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Nishanth Menon318dbb02014-06-20 12:26:23 -05001258 /* set_mode overrides this value */
Nishanth Menon429222d2014-06-30 10:57:38 -05001259 desc->enable_val = SMPS_CTRL_MODE_ON;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001260 }
1261
Nishanth Menon429222d2014-06-30 10:57:38 -05001262 desc->type = REGULATOR_VOLTAGE;
1263 desc->owner = THIS_MODULE;
Axel Linbdc4baa2012-11-29 10:01:44 +08001264
Graeme Gregorya361cd92012-08-28 13:47:40 +02001265 if (pdata)
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001266 config.init_data = pdata->reg_data[id];
1267 else
1268 config.init_data = NULL;
1269
Nishanth Menon429222d2014-06-30 10:57:38 -05001270 desc->supply_name = rinfo->sname;
Keerthycac9e912014-06-18 15:28:59 +05301271 config.of_node = ddata->palmas_matches[id].of_node;
Graeme Gregorya361cd92012-08-28 13:47:40 +02001272
Nishanth Menon429222d2014-06-30 10:57:38 -05001273 rdev = devm_regulator_register(pmic->dev, desc, &config);
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001274 if (IS_ERR(rdev)) {
Keerthycac9e912014-06-18 15:28:59 +05301275 dev_err(pmic->dev,
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001276 "failed to register %s regulator\n",
Keerthycac9e912014-06-18 15:28:59 +05301277 pdev_name);
Sachin Kamat51c86b32013-09-04 12:01:01 +05301278 return PTR_ERR(rdev);
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001279 }
1280
1281 /* Save regulator for cleanup */
1282 pmic->rdev[id] = rdev;
1283 }
1284
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001285 return 0;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001286}
1287
Keerthyd6f83372014-06-18 15:29:00 +05301288static int tps65917_smps_registration(struct palmas_pmic *pmic,
1289 struct palmas_pmic_driver_data *ddata,
1290 struct palmas_pmic_platform_data *pdata,
1291 const char *pdev_name,
1292 struct regulator_config config)
1293{
1294 int id, ret;
1295 unsigned int addr, reg;
1296 struct regulator_dev *rdev;
1297 struct palmas_reg_init *reg_init;
Nishanth Menoncf910b62014-06-30 10:57:36 -05001298 struct palmas_regs_info *rinfo;
Nishanth Menon429222d2014-06-30 10:57:38 -05001299 struct regulator_desc *desc;
Keerthyd6f83372014-06-18 15:29:00 +05301300
1301 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1302 /*
1303 * Miss out regulators which are not available due
1304 * to slaving configurations.
1305 */
Nishanth Menon429222d2014-06-30 10:57:38 -05001306 desc = &pmic->desc[id];
1307 desc->n_linear_ranges = 3;
Keerthyd6f83372014-06-18 15:29:00 +05301308 if ((id == TPS65917_REG_SMPS2) && pmic->smps12)
1309 continue;
1310
1311 /* Initialise sleep/init values from platform data */
1312 if (pdata && pdata->reg_init[id]) {
1313 reg_init = pdata->reg_init[id];
1314 ret = palmas_smps_init(pmic->palmas, id, reg_init);
1315 if (ret)
1316 return ret;
1317 } else {
1318 reg_init = NULL;
1319 }
Nishanth Menoncf910b62014-06-30 10:57:36 -05001320 rinfo = &ddata->palmas_regs_info[id];
Keerthyd6f83372014-06-18 15:29:00 +05301321
1322 /* Register the regulators */
Nishanth Menon429222d2014-06-30 10:57:38 -05001323 desc->name = rinfo->name;
1324 desc->id = id;
Keerthyd6f83372014-06-18 15:29:00 +05301325
1326 /*
1327 * Read and store the RANGE bit for later use
1328 * This must be done before regulator is probed,
1329 * otherwise we error in probe with unsupportable
1330 * ranges. Read the current smps mode for later use.
1331 */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001332 addr = rinfo->vsel_addr;
Keerthyd6f83372014-06-18 15:29:00 +05301333
1334 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1335 if (ret)
1336 return ret;
1337 if (reg & TPS65917_SMPS1_VOLTAGE_RANGE)
1338 pmic->range[id] = 1;
1339
1340 if (pmic->range[id])
Nishanth Menon429222d2014-06-30 10:57:38 -05001341 desc->linear_ranges = smps_high_ranges;
1342 else
1343 desc->linear_ranges = smps_low_ranges;
Keerthyd6f83372014-06-18 15:29:00 +05301344
1345 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -05001346 desc->ops = &tps65917_ops_ext_control_smps;
Keerthyd6f83372014-06-18 15:29:00 +05301347 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001348 desc->ops = &tps65917_ops_smps;
1349 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1350 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1351 rinfo->vsel_addr);
1352 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1353 desc->ramp_delay = 2500;
Keerthyd6f83372014-06-18 15:29:00 +05301354
1355 /* Read the smps mode for later use. */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001356 addr = rinfo->ctrl_addr;
Keerthyd6f83372014-06-18 15:29:00 +05301357 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1358 if (ret)
1359 return ret;
1360 pmic->current_reg_mode[id] = reg &
1361 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Nishanth Menonb6328152014-06-30 10:57:39 -05001362 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1363 rinfo->ctrl_addr);
1364 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1365 /* set_mode overrides this value */
1366 desc->enable_val = SMPS_CTRL_MODE_ON;
Keerthyd6f83372014-06-18 15:29:00 +05301367
Nishanth Menon429222d2014-06-30 10:57:38 -05001368 desc->type = REGULATOR_VOLTAGE;
1369 desc->owner = THIS_MODULE;
Keerthyd6f83372014-06-18 15:29:00 +05301370
1371 if (pdata)
1372 config.init_data = pdata->reg_data[id];
1373 else
1374 config.init_data = NULL;
1375
Nishanth Menon429222d2014-06-30 10:57:38 -05001376 desc->supply_name = rinfo->sname;
Keerthyd6f83372014-06-18 15:29:00 +05301377 config.of_node = ddata->palmas_matches[id].of_node;
1378
Nishanth Menon429222d2014-06-30 10:57:38 -05001379 rdev = devm_regulator_register(pmic->dev, desc, &config);
Keerthyd6f83372014-06-18 15:29:00 +05301380 if (IS_ERR(rdev)) {
1381 dev_err(pmic->dev,
1382 "failed to register %s regulator\n",
1383 pdev_name);
1384 return PTR_ERR(rdev);
1385 }
1386
1387 /* Save regulator for cleanup */
1388 pmic->rdev[id] = rdev;
1389 }
1390
1391 return 0;
1392}
1393
Keerthycac9e912014-06-18 15:28:59 +05301394static struct of_regulator_match palmas_matches[] = {
1395 { .name = "smps12", },
1396 { .name = "smps123", },
1397 { .name = "smps3", },
1398 { .name = "smps45", },
1399 { .name = "smps457", },
1400 { .name = "smps6", },
1401 { .name = "smps7", },
1402 { .name = "smps8", },
1403 { .name = "smps9", },
1404 { .name = "smps10_out2", },
1405 { .name = "smps10_out1", },
1406 { .name = "ldo1", },
1407 { .name = "ldo2", },
1408 { .name = "ldo3", },
1409 { .name = "ldo4", },
1410 { .name = "ldo5", },
1411 { .name = "ldo6", },
1412 { .name = "ldo7", },
1413 { .name = "ldo8", },
1414 { .name = "ldo9", },
1415 { .name = "ldoln", },
1416 { .name = "ldousb", },
1417 { .name = "regen1", },
1418 { .name = "regen2", },
1419 { .name = "regen3", },
1420 { .name = "sysen1", },
1421 { .name = "sysen2", },
1422};
1423
Keerthyd6f83372014-06-18 15:29:00 +05301424static struct of_regulator_match tps65917_matches[] = {
1425 { .name = "smps1", },
1426 { .name = "smps2", },
1427 { .name = "smps3", },
1428 { .name = "smps4", },
1429 { .name = "smps5", },
1430 { .name = "ldo1", },
1431 { .name = "ldo2", },
1432 { .name = "ldo3", },
1433 { .name = "ldo4", },
1434 { .name = "ldo5", },
1435 { .name = "regen1", },
1436 { .name = "regen2", },
1437 { .name = "regen3", },
1438 { .name = "sysen1", },
1439 { .name = "sysen2", },
1440};
1441
Nishanth Menon4b09e172014-06-30 10:57:34 -05001442static struct palmas_pmic_driver_data palmas_ddata = {
Keerthycac9e912014-06-18 15:28:59 +05301443 .smps_start = PALMAS_REG_SMPS12,
1444 .smps_end = PALMAS_REG_SMPS10_OUT1,
1445 .ldo_begin = PALMAS_REG_LDO1,
1446 .ldo_end = PALMAS_REG_LDOUSB,
1447 .max_reg = PALMAS_NUM_REGS,
Keerthye999c722015-03-17 15:56:05 +05301448 .has_regen3 = true,
Nishanth Menon6839cd62014-06-30 10:57:37 -05001449 .palmas_regs_info = palmas_generic_regs_info,
Keerthycac9e912014-06-18 15:28:59 +05301450 .palmas_matches = palmas_matches,
1451 .sleep_req_info = palma_sleep_req_info,
1452 .smps_register = palmas_smps_registration,
1453 .ldo_register = palmas_ldo_registration,
1454};
1455
Nishanth Menon4b09e172014-06-30 10:57:34 -05001456static struct palmas_pmic_driver_data tps65917_ddata = {
Keerthyd6f83372014-06-18 15:29:00 +05301457 .smps_start = TPS65917_REG_SMPS1,
1458 .smps_end = TPS65917_REG_SMPS5,
1459 .ldo_begin = TPS65917_REG_LDO1,
1460 .ldo_end = TPS65917_REG_LDO5,
1461 .max_reg = TPS65917_NUM_REGS,
Keerthye999c722015-03-17 15:56:05 +05301462 .has_regen3 = true,
Keerthyd6f83372014-06-18 15:29:00 +05301463 .palmas_regs_info = tps65917_regs_info,
1464 .palmas_matches = tps65917_matches,
1465 .sleep_req_info = tps65917_sleep_req_info,
1466 .smps_register = tps65917_smps_registration,
1467 .ldo_register = tps65917_ldo_registration,
1468};
1469
Nishanth Menon7f091e52016-05-05 19:29:51 -05001470static int palmas_dt_to_pdata(struct device *dev,
1471 struct device_node *node,
1472 struct palmas_pmic_platform_data *pdata,
1473 struct palmas_pmic_driver_data *ddata)
Keerthycac9e912014-06-18 15:28:59 +05301474{
1475 struct device_node *regulators;
1476 u32 prop;
1477 int idx, ret;
1478
Keerthycac9e912014-06-18 15:28:59 +05301479 regulators = of_get_child_by_name(node, "regulators");
1480 if (!regulators) {
1481 dev_info(dev, "regulator node not found\n");
Nishanth Menon7f091e52016-05-05 19:29:51 -05001482 return 0;
Keerthycac9e912014-06-18 15:28:59 +05301483 }
1484
1485 ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
1486 ddata->max_reg);
1487 of_node_put(regulators);
1488 if (ret < 0) {
1489 dev_err(dev, "Error parsing regulator init data: %d\n", ret);
Nishanth Menon7f091e52016-05-05 19:29:51 -05001490 return 0;
Keerthycac9e912014-06-18 15:28:59 +05301491 }
1492
1493 for (idx = 0; idx < ddata->max_reg; idx++) {
Nishanth Menon036d1932016-05-05 19:29:49 -05001494 static struct of_regulator_match *match;
Nishanth Menon1b424432016-05-05 19:29:50 -05001495 struct palmas_reg_init *rinit;
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001496 struct device_node *np;
Nishanth Menon036d1932016-05-05 19:29:49 -05001497
1498 match = &ddata->palmas_matches[idx];
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001499 np = match->of_node;
Nishanth Menon036d1932016-05-05 19:29:49 -05001500
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001501 if (!match->init_data || !np)
Keerthycac9e912014-06-18 15:28:59 +05301502 continue;
1503
Nishanth Menon1b424432016-05-05 19:29:50 -05001504 rinit = devm_kzalloc(dev, sizeof(*rinit), GFP_KERNEL);
Nishanth Menon7f091e52016-05-05 19:29:51 -05001505 if (!rinit)
1506 return -ENOMEM;
1507
Nishanth Menon036d1932016-05-05 19:29:49 -05001508 pdata->reg_data[idx] = match->init_data;
Nishanth Menon1b424432016-05-05 19:29:50 -05001509 pdata->reg_init[idx] = rinit;
Keerthycac9e912014-06-18 15:28:59 +05301510
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001511 rinit->warm_reset = of_property_read_bool(np, "ti,warm-reset");
1512 ret = of_property_read_u32(np, "ti,roof-floor", &prop);
Keerthycac9e912014-06-18 15:28:59 +05301513 /* EINVAL: Property not found */
1514 if (ret != -EINVAL) {
1515 int econtrol;
1516
1517 /* use default value, when no value is specified */
1518 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1519 if (!ret) {
1520 switch (prop) {
1521 case 1:
1522 econtrol = PALMAS_EXT_CONTROL_ENABLE1;
1523 break;
1524 case 2:
1525 econtrol = PALMAS_EXT_CONTROL_ENABLE2;
1526 break;
1527 case 3:
1528 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1529 break;
1530 default:
1531 WARN_ON(1);
1532 dev_warn(dev,
1533 "%s: Invalid roof-floor option: %u\n",
Nishanth Menon036d1932016-05-05 19:29:49 -05001534 match->name, prop);
Keerthycac9e912014-06-18 15:28:59 +05301535 break;
1536 }
1537 }
Nishanth Menon1b424432016-05-05 19:29:50 -05001538 rinit->roof_floor = econtrol;
Keerthycac9e912014-06-18 15:28:59 +05301539 }
1540
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001541 ret = of_property_read_u32(np, "ti,mode-sleep", &prop);
Keerthycac9e912014-06-18 15:28:59 +05301542 if (!ret)
Nishanth Menon1b424432016-05-05 19:29:50 -05001543 rinit->mode_sleep = prop;
Keerthycac9e912014-06-18 15:28:59 +05301544
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001545 ret = of_property_read_bool(np, "ti,smps-range");
Keerthycac9e912014-06-18 15:28:59 +05301546 if (ret)
Nishanth Menon1b424432016-05-05 19:29:50 -05001547 rinit->vsel = PALMAS_SMPS12_VOLTAGE_RANGE;
Keerthycac9e912014-06-18 15:28:59 +05301548
1549 if (idx == PALMAS_REG_LDO8)
1550 pdata->enable_ldo8_tracking = of_property_read_bool(
Nishanth Menon6c7d6142016-05-05 19:29:52 -05001551 np, "ti,enable-ldo8-tracking");
Keerthycac9e912014-06-18 15:28:59 +05301552 }
1553
1554 pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
Nishanth Menon7f091e52016-05-05 19:29:51 -05001555
1556 return 0;
Keerthycac9e912014-06-18 15:28:59 +05301557}
1558
Fabian Frederickcdbf6f02015-03-16 20:17:08 +01001559static const struct of_device_id of_palmas_match_tbl[] = {
Keerthycac9e912014-06-18 15:28:59 +05301560 {
1561 .compatible = "ti,palmas-pmic",
1562 .data = &palmas_ddata,
1563 },
1564 {
1565 .compatible = "ti,twl6035-pmic",
1566 .data = &palmas_ddata,
1567 },
1568 {
1569 .compatible = "ti,twl6036-pmic",
1570 .data = &palmas_ddata,
1571 },
1572 {
1573 .compatible = "ti,twl6037-pmic",
1574 .data = &palmas_ddata,
1575 },
1576 {
1577 .compatible = "ti,tps65913-pmic",
1578 .data = &palmas_ddata,
1579 },
1580 {
1581 .compatible = "ti,tps65914-pmic",
1582 .data = &palmas_ddata,
1583 },
1584 {
1585 .compatible = "ti,tps80036-pmic",
1586 .data = &palmas_ddata,
1587 },
1588 {
1589 .compatible = "ti,tps659038-pmic",
1590 .data = &palmas_ddata,
1591 },
Keerthyd6f83372014-06-18 15:29:00 +05301592 {
1593 .compatible = "ti,tps65917-pmic",
1594 .data = &tps65917_ddata,
1595 },
Graeme Gregorya361cd92012-08-28 13:47:40 +02001596 { /* end */ }
1597};
1598
Keerthycac9e912014-06-18 15:28:59 +05301599static int palmas_regulators_probe(struct platform_device *pdev)
1600{
1601 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
1602 struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
1603 struct device_node *node = pdev->dev.of_node;
1604 struct palmas_pmic_driver_data *driver_data;
1605 struct regulator_config config = { };
1606 struct palmas_pmic *pmic;
1607 const char *pdev_name;
1608 const struct of_device_id *match;
1609 int ret = 0;
1610 unsigned int reg;
1611
1612 match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev);
1613
1614 if (!match)
1615 return -ENODATA;
1616
1617 driver_data = (struct palmas_pmic_driver_data *)match->data;
1618 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1619 if (!pdata)
1620 return -ENOMEM;
1621
1622 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1623 if (!pmic)
1624 return -ENOMEM;
1625
Keerthye999c722015-03-17 15:56:05 +05301626 if (of_device_is_compatible(node, "ti,tps659038-pmic")) {
Keerthye03826d2015-03-17 15:56:04 +05301627 palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr =
1628 TPS659038_REGEN2_CTRL;
Keerthye999c722015-03-17 15:56:05 +05301629 palmas_ddata.has_regen3 = false;
1630 }
Keerthye03826d2015-03-17 15:56:04 +05301631
Keerthycac9e912014-06-18 15:28:59 +05301632 pmic->dev = &pdev->dev;
1633 pmic->palmas = palmas;
1634 palmas->pmic = pmic;
1635 platform_set_drvdata(pdev, pmic);
1636 pmic->palmas->pmic_ddata = driver_data;
1637
Nishanth Menon7f091e52016-05-05 19:29:51 -05001638 ret = palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data);
1639 if (ret)
1640 return ret;
Keerthycac9e912014-06-18 15:28:59 +05301641
1642 ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
1643 if (ret)
1644 return ret;
1645
1646 if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)
1647 pmic->smps123 = 1;
1648
1649 if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
1650 pmic->smps457 = 1;
1651
1652 config.regmap = palmas->regmap[REGULATOR_SLAVE];
1653 config.dev = &pdev->dev;
1654 config.driver_data = pmic;
1655 pdev_name = pdev->name;
1656
1657 ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name,
1658 config);
1659 if (ret)
1660 return ret;
1661
1662 ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name,
1663 config);
1664
1665 return ret;
1666}
1667
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001668static struct platform_driver palmas_driver = {
1669 .driver = {
1670 .name = "palmas-pmic",
Graeme Gregorya361cd92012-08-28 13:47:40 +02001671 .of_match_table = of_palmas_match_tbl,
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001672 },
Laxman Dewanganbbcf50b2013-03-18 14:59:49 +05301673 .probe = palmas_regulators_probe,
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001674};
1675
1676static int __init palmas_init(void)
1677{
1678 return platform_driver_register(&palmas_driver);
1679}
1680subsys_initcall(palmas_init);
1681
1682static void __exit palmas_exit(void)
1683{
1684 platform_driver_unregister(&palmas_driver);
1685}
1686module_exit(palmas_exit);
1687
1688MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1689MODULE_DESCRIPTION("Palmas voltage regulator driver");
1690MODULE_LICENSE("GPL");
1691MODULE_ALIAS("platform:palmas-pmic");
Graeme Gregorya361cd92012-08-28 13:47:40 +02001692MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);