Thomas Gleixner | 3f4110a | 2009-08-29 14:54:20 +0200 | [diff] [blame] | 1 | /* |
| 2 | * mrst.c: Intel Moorestown platform specific setup code |
| 3 | * |
| 4 | * (C) Copyright 2008 Intel Corporation |
| 5 | * Author: Jacob Pan (jacob.jun.pan@intel.com) |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License |
| 9 | * as published by the Free Software Foundation; version 2 |
| 10 | * of the License. |
| 11 | */ |
Feng Tang | 1da4b1c | 2010-11-09 11:22:58 +0000 | [diff] [blame] | 12 | |
| 13 | #define pr_fmt(fmt) "mrst: " fmt |
| 14 | |
Thomas Gleixner | 3f4110a | 2009-08-29 14:54:20 +0200 | [diff] [blame] | 15 | #include <linux/init.h> |
Jacob Pan | 16ab539 | 2010-02-12 03:08:30 -0800 | [diff] [blame] | 16 | #include <linux/kernel.h> |
| 17 | #include <linux/sfi.h> |
Feng Tang | 1da4b1c | 2010-11-09 11:22:58 +0000 | [diff] [blame] | 18 | #include <linux/intel_pmic_gpio.h> |
| 19 | #include <linux/spi/spi.h> |
| 20 | #include <linux/i2c.h> |
| 21 | #include <linux/i2c/pca953x.h> |
| 22 | #include <linux/gpio_keys.h> |
| 23 | #include <linux/input.h> |
| 24 | #include <linux/platform_device.h> |
Jacob Pan | 16ab539 | 2010-02-12 03:08:30 -0800 | [diff] [blame] | 25 | #include <linux/irq.h> |
Feng Tang | cf08945 | 2010-02-12 03:37:38 -0800 | [diff] [blame] | 26 | #include <linux/module.h> |
Thomas Gleixner | 3f4110a | 2009-08-29 14:54:20 +0200 | [diff] [blame] | 27 | |
| 28 | #include <asm/setup.h> |
Jacob Pan | 16ab539 | 2010-02-12 03:08:30 -0800 | [diff] [blame] | 29 | #include <asm/mpspec_def.h> |
| 30 | #include <asm/hw_irq.h> |
| 31 | #include <asm/apic.h> |
| 32 | #include <asm/io_apic.h> |
Jacob Pan | 5b78b67 | 2010-02-12 02:29:11 -0800 | [diff] [blame] | 33 | #include <asm/mrst.h> |
| 34 | #include <asm/io.h> |
| 35 | #include <asm/i8259.h> |
Feng Tang | 1da4b1c | 2010-11-09 11:22:58 +0000 | [diff] [blame] | 36 | #include <asm/intel_scu_ipc.h> |
Jacob Pan | 3746c6b | 2010-02-12 05:01:12 -0800 | [diff] [blame] | 37 | #include <asm/apb_timer.h> |
Alek Du | cfb505a | 2010-11-10 16:50:08 +0000 | [diff] [blame^] | 38 | #include <asm/reboot.h> |
Thomas Gleixner | 3f4110a | 2009-08-29 14:54:20 +0200 | [diff] [blame] | 39 | |
Feng Tang | 1da4b1c | 2010-11-09 11:22:58 +0000 | [diff] [blame] | 40 | |
Jacob Pan | a875c01 | 2010-05-19 12:01:25 -0700 | [diff] [blame] | 41 | /* |
| 42 | * the clockevent devices on Moorestown/Medfield can be APBT or LAPIC clock, |
| 43 | * cmdline option x86_mrst_timer can be used to override the configuration |
| 44 | * to prefer one or the other. |
| 45 | * at runtime, there are basically three timer configurations: |
| 46 | * 1. per cpu apbt clock only |
| 47 | * 2. per cpu always-on lapic clocks only, this is Penwell/Medfield only |
| 48 | * 3. per cpu lapic clock (C3STOP) and one apbt clock, with broadcast. |
| 49 | * |
| 50 | * by default (without cmdline option), platform code first detects cpu type |
| 51 | * to see if we are on lincroft or penwell, then set up both lapic or apbt |
| 52 | * clocks accordingly. |
| 53 | * i.e. by default, medfield uses configuration #2, moorestown uses #1. |
| 54 | * config #3 is supported but not recommended on medfield. |
| 55 | * |
| 56 | * rating and feature summary: |
| 57 | * lapic (with C3STOP) --------- 100 |
| 58 | * apbt (always-on) ------------ 110 |
| 59 | * lapic (always-on,ARAT) ------ 150 |
| 60 | */ |
| 61 | |
H. Peter Anvin | 1467138 | 2010-05-19 14:37:40 -0700 | [diff] [blame] | 62 | __cpuinitdata enum mrst_timer_options mrst_timer_options; |
Jacob Pan | a875c01 | 2010-05-19 12:01:25 -0700 | [diff] [blame] | 63 | |
Jacob Pan | 16ab539 | 2010-02-12 03:08:30 -0800 | [diff] [blame] | 64 | static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM]; |
| 65 | static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM]; |
H. Peter Anvin | a75af58 | 2010-05-19 13:40:14 -0700 | [diff] [blame] | 66 | enum mrst_cpu_type __mrst_cpu_chip; |
| 67 | EXPORT_SYMBOL_GPL(__mrst_cpu_chip); |
Jacob Pan | a0c173b | 2010-05-19 12:01:24 -0700 | [diff] [blame] | 68 | |
Jacob Pan | 16ab539 | 2010-02-12 03:08:30 -0800 | [diff] [blame] | 69 | int sfi_mtimer_num; |
| 70 | |
Feng Tang | cf08945 | 2010-02-12 03:37:38 -0800 | [diff] [blame] | 71 | struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX]; |
| 72 | EXPORT_SYMBOL_GPL(sfi_mrtc_array); |
| 73 | int sfi_mrtc_num; |
| 74 | |
Jacob Pan | 16ab539 | 2010-02-12 03:08:30 -0800 | [diff] [blame] | 75 | static inline void assign_to_mp_irq(struct mpc_intsrc *m, |
| 76 | struct mpc_intsrc *mp_irq) |
| 77 | { |
| 78 | memcpy(mp_irq, m, sizeof(struct mpc_intsrc)); |
| 79 | } |
| 80 | |
| 81 | static inline int mp_irq_cmp(struct mpc_intsrc *mp_irq, |
| 82 | struct mpc_intsrc *m) |
| 83 | { |
| 84 | return memcmp(mp_irq, m, sizeof(struct mpc_intsrc)); |
| 85 | } |
| 86 | |
| 87 | static void save_mp_irq(struct mpc_intsrc *m) |
| 88 | { |
| 89 | int i; |
| 90 | |
| 91 | for (i = 0; i < mp_irq_entries; i++) { |
| 92 | if (!mp_irq_cmp(&mp_irqs[i], m)) |
| 93 | return; |
| 94 | } |
| 95 | |
| 96 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); |
| 97 | if (++mp_irq_entries == MAX_IRQ_SOURCES) |
| 98 | panic("Max # of irq sources exceeded!!\n"); |
| 99 | } |
| 100 | |
| 101 | /* parse all the mtimer info to a static mtimer array */ |
| 102 | static int __init sfi_parse_mtmr(struct sfi_table_header *table) |
| 103 | { |
| 104 | struct sfi_table_simple *sb; |
| 105 | struct sfi_timer_table_entry *pentry; |
| 106 | struct mpc_intsrc mp_irq; |
| 107 | int totallen; |
| 108 | |
| 109 | sb = (struct sfi_table_simple *)table; |
| 110 | if (!sfi_mtimer_num) { |
| 111 | sfi_mtimer_num = SFI_GET_NUM_ENTRIES(sb, |
| 112 | struct sfi_timer_table_entry); |
| 113 | pentry = (struct sfi_timer_table_entry *) sb->pentry; |
| 114 | totallen = sfi_mtimer_num * sizeof(*pentry); |
| 115 | memcpy(sfi_mtimer_array, pentry, totallen); |
| 116 | } |
| 117 | |
Feng Tang | 1da4b1c | 2010-11-09 11:22:58 +0000 | [diff] [blame] | 118 | pr_debug("SFI MTIMER info (num = %d):\n", sfi_mtimer_num); |
Jacob Pan | 16ab539 | 2010-02-12 03:08:30 -0800 | [diff] [blame] | 119 | pentry = sfi_mtimer_array; |
| 120 | for (totallen = 0; totallen < sfi_mtimer_num; totallen++, pentry++) { |
Feng Tang | 1da4b1c | 2010-11-09 11:22:58 +0000 | [diff] [blame] | 121 | pr_debug("timer[%d]: paddr = 0x%08x, freq = %dHz," |
Jacob Pan | 16ab539 | 2010-02-12 03:08:30 -0800 | [diff] [blame] | 122 | " irq = %d\n", totallen, (u32)pentry->phys_addr, |
| 123 | pentry->freq_hz, pentry->irq); |
| 124 | if (!pentry->irq) |
| 125 | continue; |
| 126 | mp_irq.type = MP_IOAPIC; |
| 127 | mp_irq.irqtype = mp_INT; |
| 128 | /* triggering mode edge bit 2-3, active high polarity bit 0-1 */ |
| 129 | mp_irq.irqflag = 5; |
| 130 | mp_irq.srcbus = 0; |
| 131 | mp_irq.srcbusirq = pentry->irq; /* IRQ */ |
| 132 | mp_irq.dstapic = MP_APIC_ALL; |
| 133 | mp_irq.dstirq = pentry->irq; |
| 134 | save_mp_irq(&mp_irq); |
| 135 | } |
| 136 | |
| 137 | return 0; |
| 138 | } |
| 139 | |
| 140 | struct sfi_timer_table_entry *sfi_get_mtmr(int hint) |
| 141 | { |
| 142 | int i; |
| 143 | if (hint < sfi_mtimer_num) { |
| 144 | if (!sfi_mtimer_usage[hint]) { |
| 145 | pr_debug("hint taken for timer %d irq %d\n",\ |
| 146 | hint, sfi_mtimer_array[hint].irq); |
| 147 | sfi_mtimer_usage[hint] = 1; |
| 148 | return &sfi_mtimer_array[hint]; |
| 149 | } |
| 150 | } |
| 151 | /* take the first timer available */ |
| 152 | for (i = 0; i < sfi_mtimer_num;) { |
| 153 | if (!sfi_mtimer_usage[i]) { |
| 154 | sfi_mtimer_usage[i] = 1; |
| 155 | return &sfi_mtimer_array[i]; |
| 156 | } |
| 157 | i++; |
| 158 | } |
| 159 | return NULL; |
| 160 | } |
| 161 | |
| 162 | void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr) |
| 163 | { |
| 164 | int i; |
| 165 | for (i = 0; i < sfi_mtimer_num;) { |
| 166 | if (mtmr->irq == sfi_mtimer_array[i].irq) { |
| 167 | sfi_mtimer_usage[i] = 0; |
| 168 | return; |
| 169 | } |
| 170 | i++; |
| 171 | } |
| 172 | } |
| 173 | |
Feng Tang | cf08945 | 2010-02-12 03:37:38 -0800 | [diff] [blame] | 174 | /* parse all the mrtc info to a global mrtc array */ |
| 175 | int __init sfi_parse_mrtc(struct sfi_table_header *table) |
| 176 | { |
| 177 | struct sfi_table_simple *sb; |
| 178 | struct sfi_rtc_table_entry *pentry; |
| 179 | struct mpc_intsrc mp_irq; |
| 180 | |
| 181 | int totallen; |
| 182 | |
| 183 | sb = (struct sfi_table_simple *)table; |
| 184 | if (!sfi_mrtc_num) { |
| 185 | sfi_mrtc_num = SFI_GET_NUM_ENTRIES(sb, |
| 186 | struct sfi_rtc_table_entry); |
| 187 | pentry = (struct sfi_rtc_table_entry *)sb->pentry; |
| 188 | totallen = sfi_mrtc_num * sizeof(*pentry); |
| 189 | memcpy(sfi_mrtc_array, pentry, totallen); |
| 190 | } |
| 191 | |
Feng Tang | 1da4b1c | 2010-11-09 11:22:58 +0000 | [diff] [blame] | 192 | pr_debug("SFI RTC info (num = %d):\n", sfi_mrtc_num); |
Feng Tang | cf08945 | 2010-02-12 03:37:38 -0800 | [diff] [blame] | 193 | pentry = sfi_mrtc_array; |
| 194 | for (totallen = 0; totallen < sfi_mrtc_num; totallen++, pentry++) { |
Feng Tang | 1da4b1c | 2010-11-09 11:22:58 +0000 | [diff] [blame] | 195 | pr_debug("RTC[%d]: paddr = 0x%08x, irq = %d\n", |
Feng Tang | cf08945 | 2010-02-12 03:37:38 -0800 | [diff] [blame] | 196 | totallen, (u32)pentry->phys_addr, pentry->irq); |
| 197 | mp_irq.type = MP_IOAPIC; |
| 198 | mp_irq.irqtype = mp_INT; |
| 199 | mp_irq.irqflag = 0; |
| 200 | mp_irq.srcbus = 0; |
| 201 | mp_irq.srcbusirq = pentry->irq; /* IRQ */ |
| 202 | mp_irq.dstapic = MP_APIC_ALL; |
| 203 | mp_irq.dstirq = pentry->irq; |
| 204 | save_mp_irq(&mp_irq); |
| 205 | } |
| 206 | return 0; |
| 207 | } |
| 208 | |
Jacob Pan | 3746c6b | 2010-02-12 05:01:12 -0800 | [diff] [blame] | 209 | static unsigned long __init mrst_calibrate_tsc(void) |
| 210 | { |
| 211 | unsigned long flags, fast_calibrate; |
| 212 | |
| 213 | local_irq_save(flags); |
| 214 | fast_calibrate = apbt_quick_calibrate(); |
| 215 | local_irq_restore(flags); |
| 216 | |
| 217 | if (fast_calibrate) |
| 218 | return fast_calibrate; |
| 219 | |
| 220 | return 0; |
| 221 | } |
| 222 | |
| 223 | void __init mrst_time_init(void) |
| 224 | { |
Jacob Pan | 7f05dec | 2010-11-09 11:28:43 +0000 | [diff] [blame] | 225 | sfi_table_parse(SFI_SIG_MTMR, NULL, NULL, sfi_parse_mtmr); |
Jacob Pan | a875c01 | 2010-05-19 12:01:25 -0700 | [diff] [blame] | 226 | switch (mrst_timer_options) { |
| 227 | case MRST_TIMER_APBT_ONLY: |
| 228 | break; |
| 229 | case MRST_TIMER_LAPIC_APBT: |
| 230 | x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock; |
| 231 | x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock; |
| 232 | break; |
| 233 | default: |
| 234 | if (!boot_cpu_has(X86_FEATURE_ARAT)) |
| 235 | break; |
| 236 | x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock; |
| 237 | x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock; |
| 238 | return; |
| 239 | } |
| 240 | /* we need at least one APB timer */ |
Jacob Pan | 3746c6b | 2010-02-12 05:01:12 -0800 | [diff] [blame] | 241 | pre_init_apic_IRQ0(); |
| 242 | apbt_time_init(); |
| 243 | } |
| 244 | |
Feng Tang | cf08945 | 2010-02-12 03:37:38 -0800 | [diff] [blame] | 245 | void __init mrst_rtc_init(void) |
| 246 | { |
| 247 | sfi_table_parse(SFI_SIG_MRTC, NULL, NULL, sfi_parse_mrtc); |
| 248 | } |
| 249 | |
Jacob Pan | a0c173b | 2010-05-19 12:01:24 -0700 | [diff] [blame] | 250 | void __cpuinit mrst_arch_setup(void) |
Jacob Pan | 3746c6b | 2010-02-12 05:01:12 -0800 | [diff] [blame] | 251 | { |
Jacob Pan | a0c173b | 2010-05-19 12:01:24 -0700 | [diff] [blame] | 252 | if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x27) |
H. Peter Anvin | a75af58 | 2010-05-19 13:40:14 -0700 | [diff] [blame] | 253 | __mrst_cpu_chip = MRST_CPU_CHIP_PENWELL; |
Jacob Pan | a0c173b | 2010-05-19 12:01:24 -0700 | [diff] [blame] | 254 | else if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x26) |
H. Peter Anvin | a75af58 | 2010-05-19 13:40:14 -0700 | [diff] [blame] | 255 | __mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; |
Jacob Pan | a0c173b | 2010-05-19 12:01:24 -0700 | [diff] [blame] | 256 | else { |
| 257 | pr_err("Unknown Moorestown CPU (%d:%d), default to Lincroft\n", |
| 258 | boot_cpu_data.x86, boot_cpu_data.x86_model); |
H. Peter Anvin | a75af58 | 2010-05-19 13:40:14 -0700 | [diff] [blame] | 259 | __mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT; |
Jacob Pan | a0c173b | 2010-05-19 12:01:24 -0700 | [diff] [blame] | 260 | } |
| 261 | pr_debug("Moorestown CPU %s identified\n", |
H. Peter Anvin | a75af58 | 2010-05-19 13:40:14 -0700 | [diff] [blame] | 262 | (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) ? |
Jacob Pan | a0c173b | 2010-05-19 12:01:24 -0700 | [diff] [blame] | 263 | "Lincroft" : "Penwell"); |
| 264 | } |
Jacob Pan | 3746c6b | 2010-02-12 05:01:12 -0800 | [diff] [blame] | 265 | |
Feng Tang | 6d2cce6 | 2010-07-05 23:03:19 +0800 | [diff] [blame] | 266 | /* MID systems don't have i8042 controller */ |
| 267 | static int mrst_i8042_detect(void) |
| 268 | { |
| 269 | return 0; |
| 270 | } |
| 271 | |
Alek Du | cfb505a | 2010-11-10 16:50:08 +0000 | [diff] [blame^] | 272 | /* Reboot and power off are handled by the SCU on a MID device */ |
| 273 | static void mrst_power_off(void) |
| 274 | { |
| 275 | intel_scu_ipc_simple_command(0xf1, 1); |
| 276 | } |
| 277 | |
| 278 | static void mrst_reboot(void) |
| 279 | { |
| 280 | intel_scu_ipc_simple_command(0xf1, 0); |
| 281 | } |
| 282 | |
Jacob Pan | 3746c6b | 2010-02-12 05:01:12 -0800 | [diff] [blame] | 283 | /* |
Thomas Gleixner | 3f4110a | 2009-08-29 14:54:20 +0200 | [diff] [blame] | 284 | * Moorestown specific x86_init function overrides and early setup |
| 285 | * calls. |
| 286 | */ |
| 287 | void __init x86_mrst_early_setup(void) |
| 288 | { |
| 289 | x86_init.resources.probe_roms = x86_init_noop; |
| 290 | x86_init.resources.reserve_resources = x86_init_noop; |
Jacob Pan | 5b78b67 | 2010-02-12 02:29:11 -0800 | [diff] [blame] | 291 | |
Jacob Pan | 3746c6b | 2010-02-12 05:01:12 -0800 | [diff] [blame] | 292 | x86_init.timers.timer_init = mrst_time_init; |
Jacob Pan | a875c01 | 2010-05-19 12:01:25 -0700 | [diff] [blame] | 293 | x86_init.timers.setup_percpu_clockev = x86_init_noop; |
Jacob Pan | 3746c6b | 2010-02-12 05:01:12 -0800 | [diff] [blame] | 294 | |
| 295 | x86_init.irqs.pre_vector_init = x86_init_noop; |
| 296 | |
Jacob Pan | a0c173b | 2010-05-19 12:01:24 -0700 | [diff] [blame] | 297 | x86_init.oem.arch_setup = mrst_arch_setup; |
| 298 | |
Jacob Pan | a875c01 | 2010-05-19 12:01:25 -0700 | [diff] [blame] | 299 | x86_cpuinit.setup_percpu_clockev = apbt_setup_secondary_clock; |
Jacob Pan | 3746c6b | 2010-02-12 05:01:12 -0800 | [diff] [blame] | 300 | |
| 301 | x86_platform.calibrate_tsc = mrst_calibrate_tsc; |
Feng Tang | 6d2cce6 | 2010-07-05 23:03:19 +0800 | [diff] [blame] | 302 | x86_platform.i8042_detect = mrst_i8042_detect; |
Jacob Pan | af2730f | 2010-02-12 10:31:47 -0800 | [diff] [blame] | 303 | x86_init.pci.init = pci_mrst_init; |
| 304 | x86_init.pci.fixup_irqs = x86_init_noop; |
| 305 | |
Jacob Pan | 5b78b67 | 2010-02-12 02:29:11 -0800 | [diff] [blame] | 306 | legacy_pic = &null_legacy_pic; |
Jacob Pan | fea24e2 | 2010-05-14 14:41:20 -0700 | [diff] [blame] | 307 | |
Alek Du | cfb505a | 2010-11-10 16:50:08 +0000 | [diff] [blame^] | 308 | /* Moorestown specific power_off/restart method */ |
| 309 | pm_power_off = mrst_power_off; |
| 310 | machine_ops.emergency_restart = mrst_reboot; |
| 311 | |
Jacob Pan | fea24e2 | 2010-05-14 14:41:20 -0700 | [diff] [blame] | 312 | /* Avoid searching for BIOS MP tables */ |
| 313 | x86_init.mpparse.find_smp_config = x86_init_noop; |
| 314 | x86_init.mpparse.get_smp_config = x86_init_uint_noop; |
| 315 | |
Thomas Gleixner | 3f4110a | 2009-08-29 14:54:20 +0200 | [diff] [blame] | 316 | } |
Jacob Pan | a875c01 | 2010-05-19 12:01:25 -0700 | [diff] [blame] | 317 | |
| 318 | /* |
| 319 | * if user does not want to use per CPU apb timer, just give it a lower rating |
| 320 | * than local apic timer and skip the late per cpu timer init. |
| 321 | */ |
| 322 | static inline int __init setup_x86_mrst_timer(char *arg) |
| 323 | { |
| 324 | if (!arg) |
| 325 | return -EINVAL; |
| 326 | |
| 327 | if (strcmp("apbt_only", arg) == 0) |
| 328 | mrst_timer_options = MRST_TIMER_APBT_ONLY; |
| 329 | else if (strcmp("lapic_and_apbt", arg) == 0) |
| 330 | mrst_timer_options = MRST_TIMER_LAPIC_APBT; |
| 331 | else { |
| 332 | pr_warning("X86 MRST timer option %s not recognised" |
| 333 | " use x86_mrst_timer=apbt_only or lapic_and_apbt\n", |
| 334 | arg); |
| 335 | return -EINVAL; |
| 336 | } |
| 337 | return 0; |
| 338 | } |
| 339 | __setup("x86_mrst_timer=", setup_x86_mrst_timer); |
Feng Tang | 1da4b1c | 2010-11-09 11:22:58 +0000 | [diff] [blame] | 340 | |
| 341 | /* |
| 342 | * Parsing GPIO table first, since the DEVS table will need this table |
| 343 | * to map the pin name to the actual pin. |
| 344 | */ |
| 345 | static struct sfi_gpio_table_entry *gpio_table; |
| 346 | static int gpio_num_entry; |
| 347 | |
| 348 | static int __init sfi_parse_gpio(struct sfi_table_header *table) |
| 349 | { |
| 350 | struct sfi_table_simple *sb; |
| 351 | struct sfi_gpio_table_entry *pentry; |
| 352 | int num, i; |
| 353 | |
| 354 | if (gpio_table) |
| 355 | return 0; |
| 356 | sb = (struct sfi_table_simple *)table; |
| 357 | num = SFI_GET_NUM_ENTRIES(sb, struct sfi_gpio_table_entry); |
| 358 | pentry = (struct sfi_gpio_table_entry *)sb->pentry; |
| 359 | |
| 360 | gpio_table = (struct sfi_gpio_table_entry *) |
| 361 | kmalloc(num * sizeof(*pentry), GFP_KERNEL); |
| 362 | if (!gpio_table) |
| 363 | return -1; |
| 364 | memcpy(gpio_table, pentry, num * sizeof(*pentry)); |
| 365 | gpio_num_entry = num; |
| 366 | |
| 367 | pr_debug("GPIO pin info:\n"); |
| 368 | for (i = 0; i < num; i++, pentry++) |
| 369 | pr_debug("info[%2d]: controller = %16.16s, pin_name = %16.16s," |
| 370 | " pin = %d\n", i, |
| 371 | pentry->controller_name, |
| 372 | pentry->pin_name, |
| 373 | pentry->pin_no); |
| 374 | return 0; |
| 375 | } |
| 376 | |
| 377 | static int get_gpio_by_name(const char *name) |
| 378 | { |
| 379 | struct sfi_gpio_table_entry *pentry = gpio_table; |
| 380 | int i; |
| 381 | |
| 382 | if (!pentry) |
| 383 | return -1; |
| 384 | for (i = 0; i < gpio_num_entry; i++, pentry++) { |
| 385 | if (!strncmp(name, pentry->pin_name, SFI_NAME_LEN)) |
| 386 | return pentry->pin_no; |
| 387 | } |
| 388 | return -1; |
| 389 | } |
| 390 | |
| 391 | /* |
| 392 | * Here defines the array of devices platform data that IAFW would export |
| 393 | * through SFI "DEVS" table, we use name and type to match the device and |
| 394 | * its platform data. |
| 395 | */ |
| 396 | struct devs_id { |
| 397 | char name[SFI_NAME_LEN + 1]; |
| 398 | u8 type; |
| 399 | u8 delay; |
| 400 | void *(*get_platform_data)(void *info); |
| 401 | }; |
| 402 | |
| 403 | /* the offset for the mapping of global gpio pin to irq */ |
| 404 | #define MRST_IRQ_OFFSET 0x100 |
| 405 | |
| 406 | static void __init *pmic_gpio_platform_data(void *info) |
| 407 | { |
| 408 | static struct intel_pmic_gpio_platform_data pmic_gpio_pdata; |
| 409 | int gpio_base = get_gpio_by_name("pmic_gpio_base"); |
| 410 | |
| 411 | if (gpio_base == -1) |
| 412 | gpio_base = 64; |
| 413 | pmic_gpio_pdata.gpio_base = gpio_base; |
| 414 | pmic_gpio_pdata.irq_base = gpio_base + MRST_IRQ_OFFSET; |
| 415 | pmic_gpio_pdata.gpiointr = 0xffffeff8; |
| 416 | |
| 417 | return &pmic_gpio_pdata; |
| 418 | } |
| 419 | |
| 420 | static void __init *max3111_platform_data(void *info) |
| 421 | { |
| 422 | struct spi_board_info *spi_info = info; |
| 423 | int intr = get_gpio_by_name("max3111_int"); |
| 424 | |
| 425 | if (intr == -1) |
| 426 | return NULL; |
| 427 | spi_info->irq = intr + MRST_IRQ_OFFSET; |
| 428 | return NULL; |
| 429 | } |
| 430 | |
| 431 | /* we have multiple max7315 on the board ... */ |
| 432 | #define MAX7315_NUM 2 |
| 433 | static void __init *max7315_platform_data(void *info) |
| 434 | { |
| 435 | static struct pca953x_platform_data max7315_pdata[MAX7315_NUM]; |
| 436 | static int nr; |
| 437 | struct pca953x_platform_data *max7315 = &max7315_pdata[nr]; |
| 438 | struct i2c_board_info *i2c_info = info; |
| 439 | int gpio_base, intr; |
| 440 | char base_pin_name[SFI_NAME_LEN + 1]; |
| 441 | char intr_pin_name[SFI_NAME_LEN + 1]; |
| 442 | |
| 443 | if (nr == MAX7315_NUM) { |
| 444 | pr_err("too many max7315s, we only support %d\n", |
| 445 | MAX7315_NUM); |
| 446 | return NULL; |
| 447 | } |
| 448 | /* we have several max7315 on the board, we only need load several |
| 449 | * instances of the same pca953x driver to cover them |
| 450 | */ |
| 451 | strcpy(i2c_info->type, "max7315"); |
| 452 | if (nr++) { |
| 453 | sprintf(base_pin_name, "max7315_%d_base", nr); |
| 454 | sprintf(intr_pin_name, "max7315_%d_int", nr); |
| 455 | } else { |
| 456 | strcpy(base_pin_name, "max7315_base"); |
| 457 | strcpy(intr_pin_name, "max7315_int"); |
| 458 | } |
| 459 | |
| 460 | gpio_base = get_gpio_by_name(base_pin_name); |
| 461 | intr = get_gpio_by_name(intr_pin_name); |
| 462 | |
| 463 | if (gpio_base == -1) |
| 464 | return NULL; |
| 465 | max7315->gpio_base = gpio_base; |
| 466 | if (intr != -1) { |
| 467 | i2c_info->irq = intr + MRST_IRQ_OFFSET; |
| 468 | max7315->irq_base = gpio_base + MRST_IRQ_OFFSET; |
| 469 | } else { |
| 470 | i2c_info->irq = -1; |
| 471 | max7315->irq_base = -1; |
| 472 | } |
| 473 | return max7315; |
| 474 | } |
| 475 | |
| 476 | static void __init *emc1403_platform_data(void *info) |
| 477 | { |
| 478 | static short intr2nd_pdata; |
| 479 | struct i2c_board_info *i2c_info = info; |
| 480 | int intr = get_gpio_by_name("thermal_int"); |
| 481 | int intr2nd = get_gpio_by_name("thermal_alert"); |
| 482 | |
| 483 | if (intr == -1 || intr2nd == -1) |
| 484 | return NULL; |
| 485 | |
| 486 | i2c_info->irq = intr + MRST_IRQ_OFFSET; |
| 487 | intr2nd_pdata = intr2nd + MRST_IRQ_OFFSET; |
| 488 | |
| 489 | return &intr2nd_pdata; |
| 490 | } |
| 491 | |
| 492 | static void __init *lis331dl_platform_data(void *info) |
| 493 | { |
| 494 | static short intr2nd_pdata; |
| 495 | struct i2c_board_info *i2c_info = info; |
| 496 | int intr = get_gpio_by_name("accel_int"); |
| 497 | int intr2nd = get_gpio_by_name("accel_2"); |
| 498 | |
| 499 | if (intr == -1 || intr2nd == -1) |
| 500 | return NULL; |
| 501 | |
| 502 | i2c_info->irq = intr + MRST_IRQ_OFFSET; |
| 503 | intr2nd_pdata = intr2nd + MRST_IRQ_OFFSET; |
| 504 | |
| 505 | return &intr2nd_pdata; |
| 506 | } |
| 507 | |
| 508 | static const struct devs_id __initconst device_ids[] = { |
| 509 | {"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data}, |
| 510 | {"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data}, |
| 511 | {"i2c_max7315", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data}, |
| 512 | {"i2c_max7315_2", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data}, |
| 513 | {"emc1403", SFI_DEV_TYPE_I2C, 1, &emc1403_platform_data}, |
| 514 | {"i2c_accel", SFI_DEV_TYPE_I2C, 0, &lis331dl_platform_data}, |
| 515 | {}, |
| 516 | }; |
| 517 | |
| 518 | #define MAX_IPCDEVS 24 |
| 519 | static struct platform_device *ipc_devs[MAX_IPCDEVS]; |
| 520 | static int ipc_next_dev; |
| 521 | |
| 522 | #define MAX_SCU_SPI 24 |
| 523 | static struct spi_board_info *spi_devs[MAX_SCU_SPI]; |
| 524 | static int spi_next_dev; |
| 525 | |
| 526 | #define MAX_SCU_I2C 24 |
| 527 | static struct i2c_board_info *i2c_devs[MAX_SCU_I2C]; |
| 528 | static int i2c_bus[MAX_SCU_I2C]; |
| 529 | static int i2c_next_dev; |
| 530 | |
| 531 | static void __init intel_scu_device_register(struct platform_device *pdev) |
| 532 | { |
| 533 | if(ipc_next_dev == MAX_IPCDEVS) |
| 534 | pr_err("too many SCU IPC devices"); |
| 535 | else |
| 536 | ipc_devs[ipc_next_dev++] = pdev; |
| 537 | } |
| 538 | |
| 539 | static void __init intel_scu_spi_device_register(struct spi_board_info *sdev) |
| 540 | { |
| 541 | struct spi_board_info *new_dev; |
| 542 | |
| 543 | if (spi_next_dev == MAX_SCU_SPI) { |
| 544 | pr_err("too many SCU SPI devices"); |
| 545 | return; |
| 546 | } |
| 547 | |
| 548 | new_dev = kzalloc(sizeof(*sdev), GFP_KERNEL); |
| 549 | if (!new_dev) { |
| 550 | pr_err("failed to alloc mem for delayed spi dev %s\n", |
| 551 | sdev->modalias); |
| 552 | return; |
| 553 | } |
| 554 | memcpy(new_dev, sdev, sizeof(*sdev)); |
| 555 | |
| 556 | spi_devs[spi_next_dev++] = new_dev; |
| 557 | } |
| 558 | |
| 559 | static void __init intel_scu_i2c_device_register(int bus, |
| 560 | struct i2c_board_info *idev) |
| 561 | { |
| 562 | struct i2c_board_info *new_dev; |
| 563 | |
| 564 | if (i2c_next_dev == MAX_SCU_I2C) { |
| 565 | pr_err("too many SCU I2C devices"); |
| 566 | return; |
| 567 | } |
| 568 | |
| 569 | new_dev = kzalloc(sizeof(*idev), GFP_KERNEL); |
| 570 | if (!new_dev) { |
| 571 | pr_err("failed to alloc mem for delayed i2c dev %s\n", |
| 572 | idev->type); |
| 573 | return; |
| 574 | } |
| 575 | memcpy(new_dev, idev, sizeof(*idev)); |
| 576 | |
| 577 | i2c_bus[i2c_next_dev] = bus; |
| 578 | i2c_devs[i2c_next_dev++] = new_dev; |
| 579 | } |
| 580 | |
| 581 | /* Called by IPC driver */ |
| 582 | void intel_scu_devices_create(void) |
| 583 | { |
| 584 | int i; |
| 585 | |
| 586 | for (i = 0; i < ipc_next_dev; i++) |
| 587 | platform_device_add(ipc_devs[i]); |
| 588 | |
| 589 | for (i = 0; i < spi_next_dev; i++) |
| 590 | spi_register_board_info(spi_devs[i], 1); |
| 591 | |
| 592 | for (i = 0; i < i2c_next_dev; i++) { |
| 593 | struct i2c_adapter *adapter; |
| 594 | struct i2c_client *client; |
| 595 | |
| 596 | adapter = i2c_get_adapter(i2c_bus[i]); |
| 597 | if (adapter) { |
| 598 | client = i2c_new_device(adapter, i2c_devs[i]); |
| 599 | if (!client) |
| 600 | pr_err("can't create i2c device %s\n", |
| 601 | i2c_devs[i]->type); |
| 602 | } else |
| 603 | i2c_register_board_info(i2c_bus[i], i2c_devs[i], 1); |
| 604 | } |
| 605 | } |
| 606 | EXPORT_SYMBOL_GPL(intel_scu_devices_create); |
| 607 | |
| 608 | /* Called by IPC driver */ |
| 609 | void intel_scu_devices_destroy(void) |
| 610 | { |
| 611 | int i; |
| 612 | |
| 613 | for (i = 0; i < ipc_next_dev; i++) |
| 614 | platform_device_del(ipc_devs[i]); |
| 615 | } |
| 616 | EXPORT_SYMBOL_GPL(intel_scu_devices_destroy); |
| 617 | |
| 618 | static void __init install_irq_resource(struct platform_device *pdev, int irq) |
| 619 | { |
| 620 | /* Single threaded */ |
| 621 | static struct resource __initdata res = { |
| 622 | .name = "IRQ", |
| 623 | .flags = IORESOURCE_IRQ, |
| 624 | }; |
| 625 | res.start = irq; |
| 626 | platform_device_add_resources(pdev, &res, 1); |
| 627 | } |
| 628 | |
| 629 | static void __init sfi_handle_ipc_dev(struct platform_device *pdev) |
| 630 | { |
| 631 | const struct devs_id *dev = device_ids; |
| 632 | void *pdata = NULL; |
| 633 | |
| 634 | while (dev->name[0]) { |
| 635 | if (dev->type == SFI_DEV_TYPE_IPC && |
| 636 | !strncmp(dev->name, pdev->name, SFI_NAME_LEN)) { |
| 637 | pdata = dev->get_platform_data(pdev); |
| 638 | break; |
| 639 | } |
| 640 | dev++; |
| 641 | } |
| 642 | pdev->dev.platform_data = pdata; |
| 643 | intel_scu_device_register(pdev); |
| 644 | } |
| 645 | |
| 646 | static void __init sfi_handle_spi_dev(struct spi_board_info *spi_info) |
| 647 | { |
| 648 | const struct devs_id *dev = device_ids; |
| 649 | void *pdata = NULL; |
| 650 | |
| 651 | while (dev->name[0]) { |
| 652 | if (dev->type == SFI_DEV_TYPE_SPI && |
| 653 | !strncmp(dev->name, spi_info->modalias, SFI_NAME_LEN)) { |
| 654 | pdata = dev->get_platform_data(spi_info); |
| 655 | break; |
| 656 | } |
| 657 | dev++; |
| 658 | } |
| 659 | spi_info->platform_data = pdata; |
| 660 | if (dev->delay) |
| 661 | intel_scu_spi_device_register(spi_info); |
| 662 | else |
| 663 | spi_register_board_info(spi_info, 1); |
| 664 | } |
| 665 | |
| 666 | static void __init sfi_handle_i2c_dev(int bus, struct i2c_board_info *i2c_info) |
| 667 | { |
| 668 | const struct devs_id *dev = device_ids; |
| 669 | void *pdata = NULL; |
| 670 | |
| 671 | while (dev->name[0]) { |
| 672 | if (dev->type == SFI_DEV_TYPE_I2C && |
| 673 | !strncmp(dev->name, i2c_info->type, SFI_NAME_LEN)) { |
| 674 | pdata = dev->get_platform_data(i2c_info); |
| 675 | break; |
| 676 | } |
| 677 | dev++; |
| 678 | } |
| 679 | i2c_info->platform_data = pdata; |
| 680 | |
| 681 | if (dev->delay) |
| 682 | intel_scu_i2c_device_register(bus, i2c_info); |
| 683 | else |
| 684 | i2c_register_board_info(bus, i2c_info, 1); |
| 685 | } |
| 686 | |
| 687 | |
| 688 | static int __init sfi_parse_devs(struct sfi_table_header *table) |
| 689 | { |
| 690 | struct sfi_table_simple *sb; |
| 691 | struct sfi_device_table_entry *pentry; |
| 692 | struct spi_board_info spi_info; |
| 693 | struct i2c_board_info i2c_info; |
| 694 | struct platform_device *pdev; |
| 695 | int num, i, bus; |
| 696 | int ioapic; |
| 697 | struct io_apic_irq_attr irq_attr; |
| 698 | |
| 699 | sb = (struct sfi_table_simple *)table; |
| 700 | num = SFI_GET_NUM_ENTRIES(sb, struct sfi_device_table_entry); |
| 701 | pentry = (struct sfi_device_table_entry *)sb->pentry; |
| 702 | |
| 703 | for (i = 0; i < num; i++, pentry++) { |
| 704 | if (pentry->irq != (u8)0xff) { /* native RTE case */ |
| 705 | /* these SPI2 devices are not exposed to system as PCI |
| 706 | * devices, but they have separate RTE entry in IOAPIC |
| 707 | * so we have to enable them one by one here |
| 708 | */ |
| 709 | ioapic = mp_find_ioapic(pentry->irq); |
| 710 | irq_attr.ioapic = ioapic; |
| 711 | irq_attr.ioapic_pin = pentry->irq; |
| 712 | irq_attr.trigger = 1; |
| 713 | irq_attr.polarity = 1; |
| 714 | io_apic_set_pci_routing(NULL, pentry->irq, &irq_attr); |
| 715 | } |
| 716 | switch (pentry->type) { |
| 717 | case SFI_DEV_TYPE_IPC: |
| 718 | /* ID as IRQ is a hack that will go away */ |
| 719 | pdev = platform_device_alloc(pentry->name, pentry->irq); |
| 720 | if (pdev == NULL) { |
| 721 | pr_err("out of memory for SFI platform device '%s'.\n", |
| 722 | pentry->name); |
| 723 | continue; |
| 724 | } |
| 725 | install_irq_resource(pdev, pentry->irq); |
| 726 | pr_debug("info[%2d]: IPC bus, name = %16.16s, " |
| 727 | "irq = 0x%2x\n", i, pentry->name, pentry->irq); |
| 728 | sfi_handle_ipc_dev(pdev); |
| 729 | break; |
| 730 | case SFI_DEV_TYPE_SPI: |
| 731 | memset(&spi_info, 0, sizeof(spi_info)); |
| 732 | strncpy(spi_info.modalias, pentry->name, SFI_NAME_LEN); |
| 733 | spi_info.irq = pentry->irq; |
| 734 | spi_info.bus_num = pentry->host_num; |
| 735 | spi_info.chip_select = pentry->addr; |
| 736 | spi_info.max_speed_hz = pentry->max_freq; |
| 737 | pr_debug("info[%2d]: SPI bus = %d, name = %16.16s, " |
| 738 | "irq = 0x%2x, max_freq = %d, cs = %d\n", i, |
| 739 | spi_info.bus_num, |
| 740 | spi_info.modalias, |
| 741 | spi_info.irq, |
| 742 | spi_info.max_speed_hz, |
| 743 | spi_info.chip_select); |
| 744 | sfi_handle_spi_dev(&spi_info); |
| 745 | break; |
| 746 | case SFI_DEV_TYPE_I2C: |
| 747 | memset(&i2c_info, 0, sizeof(i2c_info)); |
| 748 | bus = pentry->host_num; |
| 749 | strncpy(i2c_info.type, pentry->name, SFI_NAME_LEN); |
| 750 | i2c_info.irq = pentry->irq; |
| 751 | i2c_info.addr = pentry->addr; |
| 752 | pr_debug("info[%2d]: I2C bus = %d, name = %16.16s, " |
| 753 | "irq = 0x%2x, addr = 0x%x\n", i, bus, |
| 754 | i2c_info.type, |
| 755 | i2c_info.irq, |
| 756 | i2c_info.addr); |
| 757 | sfi_handle_i2c_dev(bus, &i2c_info); |
| 758 | break; |
| 759 | case SFI_DEV_TYPE_UART: |
| 760 | case SFI_DEV_TYPE_HSI: |
| 761 | default: |
| 762 | ; |
| 763 | } |
| 764 | } |
| 765 | return 0; |
| 766 | } |
| 767 | |
| 768 | static int __init mrst_platform_init(void) |
| 769 | { |
| 770 | sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, sfi_parse_gpio); |
| 771 | sfi_table_parse(SFI_SIG_DEVS, NULL, NULL, sfi_parse_devs); |
| 772 | return 0; |
| 773 | } |
| 774 | arch_initcall(mrst_platform_init); |
| 775 | |
| 776 | /* |
| 777 | * we will search these buttons in SFI GPIO table (by name) |
| 778 | * and register them dynamically. Please add all possible |
| 779 | * buttons here, we will shrink them if no GPIO found. |
| 780 | */ |
| 781 | static struct gpio_keys_button gpio_button[] = { |
| 782 | {KEY_POWER, -1, 1, "power_btn", EV_KEY, 0, 3000}, |
| 783 | {KEY_PROG1, -1, 1, "prog_btn1", EV_KEY, 0, 20}, |
| 784 | {KEY_PROG2, -1, 1, "prog_btn2", EV_KEY, 0, 20}, |
| 785 | {SW_LID, -1, 1, "lid_switch", EV_SW, 0, 20}, |
| 786 | {KEY_VOLUMEUP, -1, 1, "vol_up", EV_KEY, 0, 20}, |
| 787 | {KEY_VOLUMEDOWN, -1, 1, "vol_down", EV_KEY, 0, 20}, |
| 788 | {KEY_CAMERA, -1, 1, "camera_full", EV_KEY, 0, 20}, |
| 789 | {KEY_CAMERA_FOCUS, -1, 1, "camera_half", EV_KEY, 0, 20}, |
| 790 | {SW_KEYPAD_SLIDE, -1, 1, "MagSw1", EV_SW, 0, 20}, |
| 791 | {SW_KEYPAD_SLIDE, -1, 1, "MagSw2", EV_SW, 0, 20}, |
| 792 | }; |
| 793 | |
| 794 | static struct gpio_keys_platform_data mrst_gpio_keys = { |
| 795 | .buttons = gpio_button, |
| 796 | .rep = 1, |
| 797 | .nbuttons = -1, /* will fill it after search */ |
| 798 | }; |
| 799 | |
| 800 | static struct platform_device pb_device = { |
| 801 | .name = "gpio-keys", |
| 802 | .id = -1, |
| 803 | .dev = { |
| 804 | .platform_data = &mrst_gpio_keys, |
| 805 | }, |
| 806 | }; |
| 807 | |
| 808 | /* |
| 809 | * Shrink the non-existent buttons, register the gpio button |
| 810 | * device if there is some |
| 811 | */ |
| 812 | static int __init pb_keys_init(void) |
| 813 | { |
| 814 | struct gpio_keys_button *gb = gpio_button; |
| 815 | int i, num, good = 0; |
| 816 | |
| 817 | num = sizeof(gpio_button) / sizeof(struct gpio_keys_button); |
| 818 | for (i = 0; i < num; i++) { |
| 819 | gb[i].gpio = get_gpio_by_name(gb[i].desc); |
| 820 | if (gb[i].gpio == -1) |
| 821 | continue; |
| 822 | |
| 823 | if (i != good) |
| 824 | gb[good] = gb[i]; |
| 825 | good++; |
| 826 | } |
| 827 | |
| 828 | if (good) { |
| 829 | mrst_gpio_keys.nbuttons = good; |
| 830 | return platform_device_register(&pb_device); |
| 831 | } |
| 832 | return 0; |
| 833 | } |
| 834 | late_initcall(pb_keys_init); |