blob: f4437430dc5f1bf1633ebd1e00f2d152ce31f452 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* drivers/video/s1d13xxxfb.c
2 *
3 * (c) 2004 Simtec Electronics
4 * (c) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 *
6 * Driver for Epson S1D13xxx series framebuffer chips
7 *
8 * Adapted from
9 * linux/drivers/video/skeletonfb.c
10 * linux/drivers/video/epson1355fb.c
11 * linux/drivers/video/epson/s1d13xxxfb.c (2.4 driver by Epson)
12 *
13 * Note, currently only tested on S1D13806 with 16bit CRT.
14 * As such, this driver might still contain some hardcoded bits relating to
15 * S1D13806.
16 * Making it work on other S1D13XXX chips should merely be a matter of adding
17 * a few switch()s, some missing glue here and there maybe, and split header
18 * files.
19 *
20 * TODO: - handle dual screen display (CRT and LCD at the same time).
21 * - check_var(), mode change, etc.
22 * - PM untested.
23 * - Accelerated interfaces.
24 * - Probably not SMP safe :)
25 *
26 * This file is subject to the terms and conditions of the GNU General Public
27 * License. See the file COPYING in the main directory of this archive for
28 * more details.
29 */
30
31#include <linux/config.h>
32#include <linux/module.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010033#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include <linux/delay.h>
35
36#include <linux/types.h>
37#include <linux/errno.h>
38#include <linux/mm.h>
39#include <linux/mman.h>
40#include <linux/fb.h>
41
42#include <asm/io.h>
43
44#include <video/s1d13xxxfb.h>
45
46#define PFX "s1d13xxxfb: "
47
48#if 0
49#define dbg(fmt, args...) do { printk(KERN_INFO fmt, ## args); } while(0)
50#else
51#define dbg(fmt, args...) do { } while (0)
52#endif
53
54/*
55 * Here we define the default struct fb_fix_screeninfo
56 */
57static struct fb_fix_screeninfo __devinitdata s1d13xxxfb_fix = {
58 .id = S1D_FBID,
59 .type = FB_TYPE_PACKED_PIXELS,
60 .visual = FB_VISUAL_PSEUDOCOLOR,
61 .xpanstep = 0,
62 .ypanstep = 1,
63 .ywrapstep = 0,
64 .accel = FB_ACCEL_NONE,
65};
66
67static inline u8
68s1d13xxxfb_readreg(struct s1d13xxxfb_par *par, u16 regno)
69{
Hirokazu Takata316240f2005-07-07 17:59:32 -070070#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
71 regno=((regno & 1) ? (regno & ~1L) : (regno + 1));
72#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070073 return readb(par->regs + regno);
74}
75
76static inline void
77s1d13xxxfb_writereg(struct s1d13xxxfb_par *par, u16 regno, u8 value)
78{
Hirokazu Takata316240f2005-07-07 17:59:32 -070079#if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
80 regno=((regno & 1) ? (regno & ~1L) : (regno + 1));
81#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070082 writeb(value, par->regs + regno);
83}
84
85static inline void
86s1d13xxxfb_runinit(struct s1d13xxxfb_par *par,
87 const struct s1d13xxxfb_regval *initregs,
88 const unsigned int size)
89{
90 int i;
91
92 for (i = 0; i < size; i++) {
93 if ((initregs[i].addr == S1DREG_DELAYOFF) ||
94 (initregs[i].addr == S1DREG_DELAYON))
95 mdelay((int)initregs[i].value);
96 else {
97 s1d13xxxfb_writereg(par, initregs[i].addr, initregs[i].value);
98 }
99 }
100
101 /* make sure the hardware can cope with us */
102 mdelay(1);
103}
104
105static inline void
106lcd_enable(struct s1d13xxxfb_par *par, int enable)
107{
108 u8 mode = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE);
109
110 if (enable)
111 mode |= 0x01;
112 else
113 mode &= ~0x01;
114
115 s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, mode);
116}
117
118static inline void
119crt_enable(struct s1d13xxxfb_par *par, int enable)
120{
121 u8 mode = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE);
122
123 if (enable)
124 mode |= 0x02;
125 else
126 mode &= ~0x02;
127
128 s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, mode);
129}
130
131/* framebuffer control routines */
132
133static inline void
134s1d13xxxfb_setup_pseudocolour(struct fb_info *info)
135{
136 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
137
138 info->var.red.length = 4;
139 info->var.green.length = 4;
140 info->var.blue.length = 4;
141}
142
143static inline void
144s1d13xxxfb_setup_truecolour(struct fb_info *info)
145{
146 info->fix.visual = FB_VISUAL_TRUECOLOR;
147 info->var.bits_per_pixel = 16;
148
149 info->var.red.length = 5;
150 info->var.red.offset = 11;
151
152 info->var.green.length = 6;
153 info->var.green.offset = 5;
154
155 info->var.blue.length = 5;
156 info->var.blue.offset = 0;
157}
158
159/**
160 * s1d13xxxfb_set_par - Alters the hardware state.
161 * @info: frame buffer structure
162 *
163 * Using the fb_var_screeninfo in fb_info we set the depth of the
164 * framebuffer. This function alters the par AND the
165 * fb_fix_screeninfo stored in fb_info. It doesn't not alter var in
166 * fb_info since we are using that data. This means we depend on the
167 * data in var inside fb_info to be supported by the hardware.
168 * xxxfb_check_var is always called before xxxfb_set_par to ensure this.
169 *
170 * XXX TODO: write proper s1d13xxxfb_check_var(), without which that
171 * function is quite useless.
172 */
173static int
174s1d13xxxfb_set_par(struct fb_info *info)
175{
176 struct s1d13xxxfb_par *s1dfb = info->par;
177 unsigned int val;
178
179 dbg("s1d13xxxfb_set_par: bpp=%d\n", info->var.bits_per_pixel);
180
181 if ((s1dfb->display & 0x01)) /* LCD */
182 val = s1d13xxxfb_readreg(s1dfb, S1DREG_LCD_DISP_MODE); /* read colour control */
183 else /* CRT */
184 val = s1d13xxxfb_readreg(s1dfb, S1DREG_CRT_DISP_MODE); /* read colour control */
185
186 val &= ~0x07;
187
188 switch (info->var.bits_per_pixel) {
189 case 4:
190 dbg("pseudo colour 4\n");
191 s1d13xxxfb_setup_pseudocolour(info);
192 val |= 2;
193 break;
194 case 8:
195 dbg("pseudo colour 8\n");
196 s1d13xxxfb_setup_pseudocolour(info);
197 val |= 3;
198 break;
199 case 16:
200 dbg("true colour\n");
201 s1d13xxxfb_setup_truecolour(info);
202 val |= 5;
203 break;
204
205 default:
206 dbg("bpp not supported!\n");
207 return -EINVAL;
208 }
209
210 dbg("writing %02x to display mode register\n", val);
211
212 if ((s1dfb->display & 0x01)) /* LCD */
213 s1d13xxxfb_writereg(s1dfb, S1DREG_LCD_DISP_MODE, val);
214 else /* CRT */
215 s1d13xxxfb_writereg(s1dfb, S1DREG_CRT_DISP_MODE, val);
216
217 info->fix.line_length = info->var.xres * info->var.bits_per_pixel;
218 info->fix.line_length /= 8;
219
220 dbg("setting line_length to %d\n", info->fix.line_length);
221
222 dbg("done setup\n");
223
224 return 0;
225}
226
227/**
228 * s1d13xxxfb_setcolreg - sets a color register.
229 * @regno: Which register in the CLUT we are programming
230 * @red: The red value which can be up to 16 bits wide
231 * @green: The green value which can be up to 16 bits wide
232 * @blue: The blue value which can be up to 16 bits wide.
233 * @transp: If supported the alpha value which can be up to 16 bits wide.
234 * @info: frame buffer info structure
235 *
236 * Returns negative errno on error, or zero on success.
237 */
238static int
239s1d13xxxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
240 u_int transp, struct fb_info *info)
241{
242 struct s1d13xxxfb_par *s1dfb = info->par;
243 unsigned int pseudo_val;
244
245 if (regno >= S1D_PALETTE_SIZE)
246 return -EINVAL;
247
248 dbg("s1d13xxxfb_setcolreg: %d: rgb=%d,%d,%d, tr=%d\n",
249 regno, red, green, blue, transp);
250
251 if (info->var.grayscale)
252 red = green = blue = (19595*red + 38470*green + 7471*blue) >> 16;
253
254 switch (info->fix.visual) {
255 case FB_VISUAL_TRUECOLOR:
256 if (regno >= 16)
257 return -EINVAL;
258
259 /* deal with creating pseudo-palette entries */
260
261 pseudo_val = (red >> 11) << info->var.red.offset;
262 pseudo_val |= (green >> 10) << info->var.green.offset;
263 pseudo_val |= (blue >> 11) << info->var.blue.offset;
264
265 dbg("s1d13xxxfb_setcolreg: pseudo %d, val %08x\n",
266 regno, pseudo_val);
267
Hirokazu Takata316240f2005-07-07 17:59:32 -0700268#if defined(CONFIG_PLAT_MAPPI)
269 ((u32 *)info->pseudo_palette)[regno] = cpu_to_le16(pseudo_val);
270#else
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271 ((u32 *)info->pseudo_palette)[regno] = pseudo_val;
Hirokazu Takata316240f2005-07-07 17:59:32 -0700272#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700273
274 break;
275 case FB_VISUAL_PSEUDOCOLOR:
276 s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_ADDR, regno);
277 s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, red);
278 s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, green);
279 s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, blue);
280
281 break;
282 default:
283 return -ENOSYS;
284 }
285
286 dbg("s1d13xxxfb_setcolreg: done\n");
287
288 return 0;
289}
290
291/**
292 * s1d13xxxfb_blank - blanks the display.
293 * @blank_mode: the blank mode we want.
294 * @info: frame buffer structure that represents a single frame buffer
295 *
296 * Blank the screen if blank_mode != 0, else unblank. Return 0 if
297 * blanking succeeded, != 0 if un-/blanking failed due to e.g. a
298 * video mode which doesn't support it. Implements VESA suspend
299 * and powerdown modes on hardware that supports disabling hsync/vsync:
300 * blank_mode == 2: suspend vsync
301 * blank_mode == 3: suspend hsync
302 * blank_mode == 4: powerdown
303 *
304 * Returns negative errno on error, or zero on success.
305 */
306static int
307s1d13xxxfb_blank(int blank_mode, struct fb_info *info)
308{
309 struct s1d13xxxfb_par *par = info->par;
310
311 dbg("s1d13xxxfb_blank: blank=%d, info=%p\n", blank_mode, info);
312
313 switch (blank_mode) {
314 case FB_BLANK_UNBLANK:
315 case FB_BLANK_NORMAL:
316 if ((par->display & 0x01) != 0)
317 lcd_enable(par, 1);
318 if ((par->display & 0x02) != 0)
319 crt_enable(par, 1);
320 break;
321 case FB_BLANK_VSYNC_SUSPEND:
322 case FB_BLANK_HSYNC_SUSPEND:
323 break;
324 case FB_BLANK_POWERDOWN:
325 lcd_enable(par, 0);
326 crt_enable(par, 0);
327 break;
328 default:
329 return -EINVAL;
330 }
331
332 /* let fbcon do a soft blank for us */
333 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
334}
335
336/**
337 * s1d13xxxfb_pan_display - Pans the display.
338 * @var: frame buffer variable screen structure
339 * @info: frame buffer structure that represents a single frame buffer
340 *
341 * Pan (or wrap, depending on the `vmode' field) the display using the
342 * `yoffset' field of the `var' structure (`xoffset' not yet supported).
343 * If the values don't fit, return -EINVAL.
344 *
345 * Returns negative errno on error, or zero on success.
346 */
347static int
348s1d13xxxfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
349{
350 struct s1d13xxxfb_par *par = info->par;
351 u32 start;
352
353 if (var->xoffset != 0) /* not yet ... */
354 return -EINVAL;
355
356 if (var->yoffset + info->var.yres > info->var.yres_virtual)
357 return -EINVAL;
358
359 start = (info->fix.line_length >> 1) * var->yoffset;
360
361 if ((par->display & 0x01)) {
362 /* LCD */
363 s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START0, (start & 0xff));
364 s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START1, ((start >> 8) & 0xff));
365 s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START2, ((start >> 16) & 0x0f));
366 } else {
367 /* CRT */
368 s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START0, (start & 0xff));
369 s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START1, ((start >> 8) & 0xff));
370 s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START2, ((start >> 16) & 0x0f));
371 }
372
373 return 0;
374}
375
376
377/* framebuffer information structures */
378
379static struct fb_ops s1d13xxxfb_fbops = {
380 .owner = THIS_MODULE,
381 .fb_set_par = s1d13xxxfb_set_par,
382 .fb_setcolreg = s1d13xxxfb_setcolreg,
383 .fb_blank = s1d13xxxfb_blank,
384
385 .fb_pan_display = s1d13xxxfb_pan_display,
386
387 /* to be replaced by any acceleration we can */
388 .fb_fillrect = cfb_fillrect,
389 .fb_copyarea = cfb_copyarea,
390 .fb_imageblit = cfb_imageblit,
391 .fb_cursor = soft_cursor
392};
393
394static int s1d13xxxfb_width_tab[2][4] __devinitdata = {
395 {4, 8, 16, -1},
396 {9, 12, 18, -1},
397};
398
399/**
400 * s1d13xxxfb_fetch_hw_state - Configure the framebuffer according to
401 * hardware setup.
402 * @info: frame buffer structure
403 *
404 * We setup the framebuffer structures according to the current
405 * hardware setup. On some machines, the BIOS will have filled
406 * the chip registers with such info, on others, these values will
407 * have been written in some init procedure. In any case, the
408 * software values needs to match the hardware ones. This is what
409 * this function ensures.
410 *
411 * Note: some of the hardcoded values here might need some love to
412 * work on various chips, and might need to no longer be hardcoded.
413 */
414static void __devinit
415s1d13xxxfb_fetch_hw_state(struct fb_info *info)
416{
417 struct fb_var_screeninfo *var = &info->var;
418 struct fb_fix_screeninfo *fix = &info->fix;
419 struct s1d13xxxfb_par *par = info->par;
420 u8 panel, display;
421 u16 offset;
422 u32 xres, yres;
423 u32 xres_virtual, yres_virtual;
424 int bpp, lcd_bpp;
425 int is_color, is_dual, is_tft;
426 int lcd_enabled, crt_enabled;
427
428 fix->type = FB_TYPE_PACKED_PIXELS;
429
430 /* general info */
431 par->display = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE);
432 crt_enabled = (par->display & 0x02) != 0;
433 lcd_enabled = (par->display & 0x01) != 0;
434
435 if (lcd_enabled && crt_enabled)
436 printk(KERN_WARNING PFX "Warning: LCD and CRT detected, using LCD\n");
437
438 if (lcd_enabled)
439 display = s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_MODE);
440 else /* CRT */
441 display = s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_MODE);
442
443 bpp = display & 0x07;
444
445 switch (bpp) {
446 case 2: /* 4 bpp */
447 case 3: /* 8 bpp */
448 var->bits_per_pixel = 8;
449 var->red.offset = var->green.offset = var->blue.offset = 0;
450 var->red.length = var->green.length = var->blue.length = 8;
451 break;
452 case 5: /* 16 bpp */
453 s1d13xxxfb_setup_truecolour(info);
454 break;
455 default:
456 dbg("bpp: %i\n", bpp);
457 }
458 fb_alloc_cmap(&info->cmap, 256, 0);
459
460 /* LCD info */
461 panel = s1d13xxxfb_readreg(par, S1DREG_PANEL_TYPE);
462 is_color = (panel & 0x04) != 0;
463 is_dual = (panel & 0x02) != 0;
464 is_tft = (panel & 0x01) != 0;
465 lcd_bpp = s1d13xxxfb_width_tab[is_tft][(panel >> 4) & 3];
466
467 if (lcd_enabled) {
468 xres = (s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_HWIDTH) + 1) * 8;
469 yres = (s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_VHEIGHT0) +
470 ((s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_VHEIGHT1) & 0x03) << 8) + 1);
471
472 offset = (s1d13xxxfb_readreg(par, S1DREG_LCD_MEM_OFF0) +
473 ((s1d13xxxfb_readreg(par, S1DREG_LCD_MEM_OFF1) & 0x7) << 8));
474 } else { /* crt */
475 xres = (s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_HWIDTH) + 1) * 8;
476 yres = (s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_VHEIGHT0) +
477 ((s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_VHEIGHT1) & 0x03) << 8) + 1);
478
479 offset = (s1d13xxxfb_readreg(par, S1DREG_CRT_MEM_OFF0) +
480 ((s1d13xxxfb_readreg(par, S1DREG_CRT_MEM_OFF1) & 0x7) << 8));
481 }
482 xres_virtual = offset * 16 / var->bits_per_pixel;
483 yres_virtual = fix->smem_len / (offset * 2);
484
485 var->xres = xres;
486 var->yres = yres;
487 var->xres_virtual = xres_virtual;
488 var->yres_virtual = yres_virtual;
489 var->xoffset = var->yoffset = 0;
490
491 fix->line_length = offset * 2;
492
493 var->grayscale = !is_color;
494
495 var->activate = FB_ACTIVATE_NOW;
496
497 dbg(PFX "bpp=%d, lcd_bpp=%d, "
498 "crt_enabled=%d, lcd_enabled=%d\n",
499 var->bits_per_pixel, lcd_bpp, crt_enabled, lcd_enabled);
500 dbg(PFX "xres=%d, yres=%d, vxres=%d, vyres=%d "
501 "is_color=%d, is_dual=%d, is_tft=%d\n",
502 xres, yres, xres_virtual, yres_virtual, is_color, is_dual, is_tft);
503}
504
505
Andrew Morton27f931d2005-06-21 17:16:55 -0700506static int
Linus Torvalds1da177e2005-04-16 15:20:36 -0700507s1d13xxxfb_remove(struct device *dev)
508{
509 struct fb_info *info = dev_get_drvdata(dev);
510 struct platform_device *pdev = to_platform_device(dev);
511 struct s1d13xxxfb_par *par = NULL;
512
513 if (info) {
514 par = info->par;
515 if (par && par->regs) {
516 /* disable output & enable powersave */
517 s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, 0x00);
518 s1d13xxxfb_writereg(par, S1DREG_PS_CNF, 0x11);
519 iounmap(par->regs);
520 }
521
522 fb_dealloc_cmap(&info->cmap);
523
524 if (info->screen_base)
525 iounmap(info->screen_base);
526
527 framebuffer_release(info);
528 }
529
530 release_mem_region(pdev->resource[0].start,
531 pdev->resource[0].end - pdev->resource[0].start +1);
532 release_mem_region(pdev->resource[1].start,
533 pdev->resource[1].end - pdev->resource[1].start +1);
534 return 0;
535}
536
537static int __devinit
538s1d13xxxfb_probe(struct device *dev)
539{
540 struct platform_device *pdev = to_platform_device(dev);
541 struct s1d13xxxfb_par *default_par;
542 struct fb_info *info;
543 struct s1d13xxxfb_pdata *pdata = NULL;
544 int ret = 0;
545 u8 revision;
546
547 dbg("probe called: device is %p\n", dev);
548
549 printk(KERN_INFO "Epson S1D13XXX FB Driver\n");
550
551 /* enable platform-dependent hardware glue, if any */
552 if (dev->platform_data)
553 pdata = dev->platform_data;
554
555 if (pdata && pdata->platform_init_video)
556 pdata->platform_init_video();
557
558
559 if (pdev->num_resources != 2) {
560 dev_err(&pdev->dev, "invalid num_resources: %i\n",
561 pdev->num_resources);
562 ret = -ENODEV;
563 goto bail;
564 }
565
566 /* resource[0] is VRAM, resource[1] is registers */
567 if (pdev->resource[0].flags != IORESOURCE_MEM
568 || pdev->resource[1].flags != IORESOURCE_MEM) {
569 dev_err(&pdev->dev, "invalid resource type\n");
570 ret = -ENODEV;
571 goto bail;
572 }
573
574 if (!request_mem_region(pdev->resource[0].start,
575 pdev->resource[0].end - pdev->resource[0].start +1, "s1d13xxxfb mem")) {
576 dev_dbg(dev, "request_mem_region failed\n");
577 ret = -EBUSY;
578 goto bail;
579 }
580
581 if (!request_mem_region(pdev->resource[1].start,
582 pdev->resource[1].end - pdev->resource[1].start +1, "s1d13xxxfb regs")) {
583 dev_dbg(dev, "request_mem_region failed\n");
584 ret = -EBUSY;
585 goto bail;
586 }
587
588 info = framebuffer_alloc(sizeof(struct s1d13xxxfb_par) + sizeof(u32) * 256, &pdev->dev);
589 if (!info) {
590 ret = -ENOMEM;
591 goto bail;
592 }
593
594 default_par = info->par;
595 default_par->regs = ioremap_nocache(pdev->resource[1].start,
596 pdev->resource[1].end - pdev->resource[1].start +1);
597 if (!default_par->regs) {
598 printk(KERN_ERR PFX "unable to map registers\n");
599 ret = -ENOMEM;
600 goto bail;
601 }
602 info->pseudo_palette = default_par->pseudo_palette;
603
604 info->screen_base = ioremap_nocache(pdev->resource[0].start,
605 pdev->resource[0].end - pdev->resource[0].start +1);
606
607 if (!info->screen_base) {
608 printk(KERN_ERR PFX "unable to map framebuffer\n");
609 ret = -ENOMEM;
610 goto bail;
611 }
612
613 revision = s1d13xxxfb_readreg(default_par, S1DREG_REV_CODE);
614 if ((revision >> 2) != S1D_CHIP_REV) {
615 printk(KERN_INFO PFX "chip not found: %i\n", (revision >> 2));
616 ret = -ENODEV;
617 goto bail;
618 }
619
620 info->fix = s1d13xxxfb_fix;
621 info->fix.mmio_start = pdev->resource[1].start;
622 info->fix.mmio_len = pdev->resource[1].end - pdev->resource[1].start +1;
623 info->fix.smem_start = pdev->resource[0].start;
624 info->fix.smem_len = pdev->resource[0].end - pdev->resource[0].start +1;
625
626 printk(KERN_INFO PFX "regs mapped at 0x%p, fb %d KiB mapped at 0x%p\n",
627 default_par->regs, info->fix.smem_len / 1024, info->screen_base);
628
629 info->par = default_par;
630 info->fbops = &s1d13xxxfb_fbops;
631 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
632
633 /* perform "manual" chip initialization, if needed */
634 if (pdata && pdata->initregs)
635 s1d13xxxfb_runinit(info->par, pdata->initregs, pdata->initregssize);
636
637 s1d13xxxfb_fetch_hw_state(info);
638
639 if (register_framebuffer(info) < 0) {
640 ret = -EINVAL;
641 goto bail;
642 }
643
644 dev_set_drvdata(&pdev->dev, info);
645
646 printk(KERN_INFO "fb%d: %s frame buffer device\n",
647 info->node, info->fix.id);
648
649 return 0;
650
651bail:
652 s1d13xxxfb_remove(dev);
653 return ret;
654
655}
656
657#ifdef CONFIG_PM
Russell King9480e302005-10-28 09:52:56 -0700658static int s1d13xxxfb_suspend(struct device *dev, pm_message_t state)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659{
660 struct fb_info *info = dev_get_drvdata(dev);
661 struct s1d13xxxfb_par *s1dfb = info->par;
662 struct s1d13xxxfb_pdata *pdata = NULL;
663
664 /* disable display */
665 lcd_enable(s1dfb, 0);
666 crt_enable(s1dfb, 0);
667
668 if (dev->platform_data)
669 pdata = dev->platform_data;
670
671#if 0
672 if (!s1dfb->disp_save)
673 s1dfb->disp_save = kmalloc(info->fix.smem_len, GFP_KERNEL);
674
675 if (!s1dfb->disp_save) {
676 printk(KERN_ERR PFX "no memory to save screen");
677 return -ENOMEM;
678 }
679
680 memcpy_fromio(s1dfb->disp_save, info->screen_base, info->fix.smem_len);
681#else
682 s1dfb->disp_save = NULL;
683#endif
684
685 if (!s1dfb->regs_save)
686 s1dfb->regs_save = kmalloc(info->fix.mmio_len, GFP_KERNEL);
687
688 if (!s1dfb->regs_save) {
689 printk(KERN_ERR PFX "no memory to save registers");
690 return -ENOMEM;
691 }
692
693 /* backup all registers */
694 memcpy_fromio(s1dfb->regs_save, s1dfb->regs, info->fix.mmio_len);
695
696 /* now activate power save mode */
697 s1d13xxxfb_writereg(s1dfb, S1DREG_PS_CNF, 0x11);
698
699 if (pdata && pdata->platform_suspend_video)
700 return pdata->platform_suspend_video();
701 else
702 return 0;
703}
704
Russell King9480e302005-10-28 09:52:56 -0700705static int s1d13xxxfb_resume(struct device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700706{
707 struct fb_info *info = dev_get_drvdata(dev);
708 struct s1d13xxxfb_par *s1dfb = info->par;
709 struct s1d13xxxfb_pdata *pdata = NULL;
710
Linus Torvalds1da177e2005-04-16 15:20:36 -0700711 /* awaken the chip */
712 s1d13xxxfb_writereg(s1dfb, S1DREG_PS_CNF, 0x10);
713
714 /* do not let go until SDRAM "wakes up" */
715 while ((s1d13xxxfb_readreg(s1dfb, S1DREG_PS_STATUS) & 0x01))
716 udelay(10);
717
718 if (dev->platform_data)
719 pdata = dev->platform_data;
720
721 if (s1dfb->regs_save) {
722 /* will write RO regs, *should* get away with it :) */
723 memcpy_toio(s1dfb->regs, s1dfb->regs_save, info->fix.mmio_len);
724 kfree(s1dfb->regs_save);
725 }
726
727 if (s1dfb->disp_save) {
728 memcpy_toio(info->screen_base, s1dfb->disp_save,
729 info->fix.smem_len);
730 kfree(s1dfb->disp_save); /* XXX kmalloc()'d when? */
731 }
732
733 if ((s1dfb->display & 0x01) != 0)
734 lcd_enable(s1dfb, 1);
735 if ((s1dfb->display & 0x02) != 0)
736 crt_enable(s1dfb, 1);
737
738 if (pdata && pdata->platform_resume_video)
739 return pdata->platform_resume_video();
740 else
741 return 0;
742}
743#endif /* CONFIG_PM */
744
745static struct device_driver s1d13xxxfb_driver = {
746 .name = S1D_DEVICENAME,
747 .bus = &platform_bus_type,
748 .probe = s1d13xxxfb_probe,
749 .remove = s1d13xxxfb_remove,
750#ifdef CONFIG_PM
751 .suspend = s1d13xxxfb_suspend,
752 .resume = s1d13xxxfb_resume
753#endif
754};
755
756
757static int __init
758s1d13xxxfb_init(void)
759{
760 if (fb_get_options("s1d13xxxfb", NULL))
761 return -ENODEV;
762
763 return driver_register(&s1d13xxxfb_driver);
764}
765
766
767static void __exit
768s1d13xxxfb_exit(void)
769{
770 driver_unregister(&s1d13xxxfb_driver);
771}
772
773module_init(s1d13xxxfb_init);
774module_exit(s1d13xxxfb_exit);
775
776
777MODULE_LICENSE("GPL");
778MODULE_DESCRIPTION("Framebuffer driver for S1D13xxx devices");
779MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, Thibaut VARENE <varenet@parisc-linux.org>");