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Troy Kisky1efa1262013-12-12 18:49:05 -07001/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
Troy Kiskyda474d42013-12-18 14:51:44 -070012#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
Troy Kisky1efa1262013-12-12 18:49:05 -070014
15/ {
Sascha Hauer48f51962014-05-07 15:19:00 +020016 chosen {
17 stdout-path = &uart2;
18 };
19
Troy Kisky1efa1262013-12-12 18:49:05 -070020 memory {
21 reg = <0x10000000 0x40000000>;
22 };
23
24 regulators {
25 compatible = "simple-bus";
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 reg_2p5v: regulator@0 {
30 compatible = "regulator-fixed";
31 reg = <0>;
32 regulator-name = "2P5V";
33 regulator-min-microvolt = <2500000>;
34 regulator-max-microvolt = <2500000>;
35 regulator-always-on;
36 };
37
38 reg_3p3v: regulator@1 {
39 compatible = "regulator-fixed";
40 reg = <1>;
41 regulator-name = "3P3V";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
44 regulator-always-on;
45 };
46
47 reg_usb_otg_vbus: regulator@2 {
48 compatible = "regulator-fixed";
49 reg = <2>;
50 regulator-name = "usb_otg_vbus";
51 regulator-min-microvolt = <5000000>;
52 regulator-max-microvolt = <5000000>;
53 gpio = <&gpio3 22 0>;
54 enable-active-high;
55 };
Peter Seiderer366c5952015-06-02 21:07:17 +020056
57 reg_can_xcvr: regulator@3 {
58 compatible = "regulator-fixed";
59 reg = <3>;
60 regulator-name = "CAN XCVR";
61 regulator-min-microvolt = <3300000>;
62 regulator-max-microvolt = <3300000>;
63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_can_xcvr>;
65 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
66 };
Troy Kisky1efa1262013-12-12 18:49:05 -070067 };
68
Troy Kiskyda474d42013-12-18 14:51:44 -070069 gpio-keys {
70 compatible = "gpio-keys";
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_gpio_keys>;
73
74 power {
75 label = "Power Button";
76 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
77 linux,code = <KEY_POWER>;
78 gpio-key,wakeup;
79 };
80
81 menu {
82 label = "Menu";
83 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
84 linux,code = <KEY_MENU>;
85 };
86
87 home {
88 label = "Home";
89 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
90 linux,code = <KEY_HOME>;
91 };
92
93 back {
94 label = "Back";
95 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
96 linux,code = <KEY_BACK>;
97 };
98
99 volume-up {
100 label = "Volume Up";
101 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
102 linux,code = <KEY_VOLUMEUP>;
103 };
104
105 volume-down {
106 label = "Volume Down";
107 gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
108 linux,code = <KEY_VOLUMEDOWN>;
109 };
110 };
111
Troy Kisky1efa1262013-12-12 18:49:05 -0700112 sound {
113 compatible = "fsl,imx6q-sabrelite-sgtl5000",
114 "fsl,imx-audio-sgtl5000";
115 model = "imx6q-sabrelite-sgtl5000";
116 ssi-controller = <&ssi1>;
117 audio-codec = <&codec>;
118 audio-routing =
119 "MIC_IN", "Mic Jack",
120 "Mic Jack", "Mic Bias",
121 "Headphone Jack", "HP_OUT";
122 mux-int-port = <1>;
123 mux-ext-port = <4>;
124 };
Troy Kiskyf5ecc322013-12-16 18:12:59 -0700125
Gary Bissond0ddcc52015-09-30 15:05:20 +0200126 backlight_lcd: backlight_lcd {
Troy Kiskyf5ecc322013-12-16 18:12:59 -0700127 compatible = "pwm-backlight";
128 pwms = <&pwm1 0 5000000>;
129 brightness-levels = <0 4 8 16 32 64 128 255>;
130 default-brightness-level = <7>;
131 power-supply = <&reg_3p3v>;
132 status = "okay";
133 };
134
Eric Nelson4dc633e2015-05-19 08:50:16 -0700135 backlight_lvds: backlight_lvds {
Troy Kiskyf5ecc322013-12-16 18:12:59 -0700136 compatible = "pwm-backlight";
137 pwms = <&pwm4 0 5000000>;
138 brightness-levels = <0 4 8 16 32 64 128 255>;
139 default-brightness-level = <7>;
140 power-supply = <&reg_3p3v>;
141 status = "okay";
142 };
Eric Nelson4dc633e2015-05-19 08:50:16 -0700143
Gary Bissond0ddcc52015-09-30 15:05:20 +0200144 lcd_display: display@di0 {
145 compatible = "fsl,imx-parallel-display";
146 #address-cells = <1>;
147 #size-cells = <0>;
148 interface-pix-fmt = "bgr666";
149 pinctrl-names = "default";
150 pinctrl-0 = <&pinctrl_j15>;
151 status = "okay";
152
153 port@0 {
154 reg = <0>;
155
156 lcd_display_in: endpoint {
157 remote-endpoint = <&ipu1_di0_disp0>;
158 };
159 };
160
161 port@1 {
162 reg = <1>;
163
164 lcd_display_out: endpoint {
165 remote-endpoint = <&lcd_panel_in>;
166 };
167 };
168 };
169
170 lcd_panel {
171 compatible = "okaya,rs800480t-7x0gp";
172 backlight = <&backlight_lcd>;
173
174 port {
175 lcd_panel_in: endpoint {
176 remote-endpoint = <&lcd_display_out>;
177 };
178 };
179 };
180
Eric Nelson4dc633e2015-05-19 08:50:16 -0700181 panel {
182 compatible = "hannstar,hsd100pxn1";
183 backlight = <&backlight_lvds>;
184
185 port {
186 panel_in: endpoint {
187 remote-endpoint = <&lvds0_out>;
188 };
189 };
190 };
Troy Kisky1efa1262013-12-12 18:49:05 -0700191};
192
193&audmux {
194 pinctrl-names = "default";
195 pinctrl-0 = <&pinctrl_audmux>;
196 status = "okay";
197};
198
Peter Seiderer366c5952015-06-02 21:07:17 +0200199&can1 {
200 pinctrl-names = "default";
201 pinctrl-0 = <&pinctrl_can1>;
202 xceiver-supply = <&reg_can_xcvr>;
203 status = "okay";
204};
205
Fabio Estevamb6db3092015-06-29 13:16:53 -0300206&clks {
207 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
208 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
209 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
210 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
211};
212
Troy Kisky1efa1262013-12-12 18:49:05 -0700213&ecspi1 {
214 fsl,spi-num-chipselects = <1>;
215 cs-gpios = <&gpio3 19 0>;
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_ecspi1>;
218 status = "okay";
219
220 flash: m25p80@0 {
Rafał Miłecki79826ac2015-08-16 08:39:17 +0200221 compatible = "sst,sst25vf016b", "jedec,spi-nor";
Troy Kisky1efa1262013-12-12 18:49:05 -0700222 spi-max-frequency = <20000000>;
223 reg = <0>;
224 };
225};
226
227&fec {
228 pinctrl-names = "default";
229 pinctrl-0 = <&pinctrl_enet>;
230 phy-mode = "rgmii";
Philipp Zabela58a12a2013-12-20 16:25:17 +0100231 phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
Troy Kiskya48a1e52013-12-16 18:13:00 -0700232 txen-skew-ps = <0>;
233 txc-skew-ps = <3000>;
234 rxdv-skew-ps = <0>;
235 rxc-skew-ps = <3000>;
236 rxd0-skew-ps = <0>;
237 rxd1-skew-ps = <0>;
238 rxd2-skew-ps = <0>;
239 rxd3-skew-ps = <0>;
240 txd0-skew-ps = <0>;
241 txd1-skew-ps = <0>;
242 txd2-skew-ps = <0>;
243 txd3-skew-ps = <0>;
Troy Kisky6261c4c2013-12-20 11:47:11 -0700244 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
245 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
Troy Kisky1efa1262013-12-12 18:49:05 -0700246 status = "okay";
247};
248
Eric Nelson8eedffe2014-12-02 15:37:17 -0700249&hdmi {
250 ddc-i2c-bus = <&i2c2>;
251 status = "okay";
252};
253
Troy Kisky1efa1262013-12-12 18:49:05 -0700254&i2c1 {
255 clock-frequency = <100000>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_i2c1>;
258 status = "okay";
259
260 codec: sgtl5000@0a {
261 compatible = "fsl,sgtl5000";
262 reg = <0x0a>;
263 clocks = <&clks 201>;
264 VDDA-supply = <&reg_2p5v>;
265 VDDIO-supply = <&reg_3p3v>;
266 };
267};
268
Eric Nelsond9515342014-12-02 15:37:16 -0700269&i2c2 {
270 clock-frequency = <100000>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&pinctrl_i2c2>;
273 status = "okay";
274};
275
Eric Nelson0a3e41f2014-12-02 15:37:18 -0700276&i2c3 {
277 clock-frequency = <100000>;
278 pinctrl-names = "default";
279 pinctrl-0 = <&pinctrl_i2c3>;
280 status = "okay";
281};
282
Troy Kisky1efa1262013-12-12 18:49:05 -0700283&iomuxc {
284 pinctrl-names = "default";
285 pinctrl-0 = <&pinctrl_hog>;
286
287 imx6q-sabrelite {
288 pinctrl_hog: hoggrp {
289 fsl,pins = <
Troy Kisky8c766cb2013-12-16 18:12:57 -0700290 /* SGTL5000 sys_mclk */
291 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
Troy Kisky1efa1262013-12-12 18:49:05 -0700292 >;
293 };
294
295 pinctrl_audmux: audmuxgrp {
296 fsl,pins = <
297 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
298 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
299 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
300 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
301 >;
302 };
303
Peter Seiderer366c5952015-06-02 21:07:17 +0200304 pinctrl_can1: can1grp {
305 fsl,pins = <
306 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
307 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
308 >;
309 };
310
311 pinctrl_can_xcvr: can-xcvrgrp {
312 fsl,pins = <
313 /* Flexcan XCVR enable */
314 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
315 >;
316 };
317
Troy Kisky1efa1262013-12-12 18:49:05 -0700318 pinctrl_ecspi1: ecspi1grp {
319 fsl,pins = <
320 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
321 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
322 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
Troy Kiskyc40f58a2013-12-16 18:12:54 -0700323 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
Troy Kisky1efa1262013-12-12 18:49:05 -0700324 >;
325 };
326
327 pinctrl_enet: enetgrp {
328 fsl,pins = <
Troy Kiskyfde90932013-12-16 18:13:01 -0700329 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
330 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
331 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
332 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
333 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
334 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
335 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
336 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
337 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
Troy Kisky1efa1262013-12-12 18:49:05 -0700338 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
339 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
340 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
341 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
342 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
343 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
Troy Kiskyf3b0ea62013-12-16 18:12:56 -0700344 /* Phy reset */
345 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
Troy Kisky6261c4c2013-12-20 11:47:11 -0700346 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
Troy Kisky1efa1262013-12-12 18:49:05 -0700347 >;
348 };
349
Troy Kiskyda474d42013-12-18 14:51:44 -0700350 pinctrl_gpio_keys: gpio_keysgrp {
351 fsl,pins = <
352 /* Power Button */
353 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
354 /* Menu Button */
355 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
356 /* Home Button */
357 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
358 /* Back Button */
359 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
360 /* Volume Up Button */
361 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
362 /* Volume Down Button */
363 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
364 >;
365 };
366
Troy Kisky1efa1262013-12-12 18:49:05 -0700367 pinctrl_i2c1: i2c1grp {
368 fsl,pins = <
369 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
370 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
371 >;
372 };
373
Eric Nelsond9515342014-12-02 15:37:16 -0700374 pinctrl_i2c2: i2c2grp {
375 fsl,pins = <
376 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
377 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
378 >;
379 };
380
Eric Nelson0a3e41f2014-12-02 15:37:18 -0700381 pinctrl_i2c3: i2c3grp {
382 fsl,pins = <
383 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
384 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
385 >;
386 };
387
Gary Bissond0ddcc52015-09-30 15:05:20 +0200388 pinctrl_j15: j15grp {
389 fsl,pins = <
390 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
391 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
392 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
393 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
394 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
395 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
396 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
397 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
398 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
399 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
400 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
401 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
402 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
403 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
404 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
405 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
406 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
407 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
408 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
409 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
410 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
411 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
412 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
413 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
414 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
415 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
416 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
417 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
418 >;
419 };
420
Troy Kiskyf5ecc322013-12-16 18:12:59 -0700421 pinctrl_pwm1: pwm1grp {
422 fsl,pins = <
423 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
424 >;
425 };
426
427 pinctrl_pwm3: pwm3grp {
428 fsl,pins = <
429 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
430 >;
431 };
432
433 pinctrl_pwm4: pwm4grp {
434 fsl,pins = <
435 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
436 >;
437 };
438
Troy Kiskyda08d272013-12-12 18:49:06 -0700439 pinctrl_uart1: uart1grp {
440 fsl,pins = <
441 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
442 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
443 >;
444 };
445
Troy Kisky1efa1262013-12-12 18:49:05 -0700446 pinctrl_uart2: uart2grp {
447 fsl,pins = <
448 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
449 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
450 >;
451 };
452
453 pinctrl_usbotg: usbotggrp {
454 fsl,pins = <
455 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
Troy Kiskyda5b1122013-12-16 18:13:02 -0700456 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
Troy Kiskyd06d8782013-12-16 18:12:55 -0700457 /* power enable, high active */
458 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
Troy Kisky1efa1262013-12-12 18:49:05 -0700459 >;
460 };
461
462 pinctrl_usdhc3: usdhc3grp {
463 fsl,pins = <
464 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
465 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
466 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
467 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
468 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
469 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
Troy Kisky473f0fc2013-12-16 18:12:53 -0700470 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
471 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
Troy Kisky1efa1262013-12-12 18:49:05 -0700472 >;
473 };
474
475 pinctrl_usdhc4: usdhc4grp {
476 fsl,pins = <
477 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
478 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
479 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
480 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
481 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
482 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
Troy Kisky0e068422013-12-16 18:12:52 -0700483 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
Troy Kisky1efa1262013-12-12 18:49:05 -0700484 >;
485 };
486 };
487};
488
Gary Bissond0ddcc52015-09-30 15:05:20 +0200489&ipu1_di0_disp0 {
490 remote-endpoint = <&lcd_display_in>;
491};
492
Troy Kisky1efa1262013-12-12 18:49:05 -0700493&ldb {
494 status = "okay";
495
496 lvds-channel@0 {
497 fsl,data-mapping = "spwg";
498 fsl,data-width = <18>;
499 status = "okay";
500
Eric Nelson4dc633e2015-05-19 08:50:16 -0700501 port@4 {
502 reg = <4>;
503
504 lvds0_out: endpoint {
505 remote-endpoint = <&panel_in>;
Troy Kisky1efa1262013-12-12 18:49:05 -0700506 };
507 };
508 };
509};
510
511&pcie {
512 status = "okay";
513};
514
Troy Kiskyf5ecc322013-12-16 18:12:59 -0700515&pwm1 {
516 pinctrl-names = "default";
517 pinctrl-0 = <&pinctrl_pwm1>;
518 status = "okay";
519};
520
521&pwm3 {
522 pinctrl-names = "default";
523 pinctrl-0 = <&pinctrl_pwm3>;
524 status = "okay";
525};
526
527&pwm4 {
528 pinctrl-names = "default";
529 pinctrl-0 = <&pinctrl_pwm4>;
530 status = "okay";
531};
532
Troy Kisky1efa1262013-12-12 18:49:05 -0700533&ssi1 {
Troy Kisky1efa1262013-12-12 18:49:05 -0700534 status = "okay";
535};
536
Troy Kiskyda08d272013-12-12 18:49:06 -0700537&uart1 {
538 pinctrl-names = "default";
539 pinctrl-0 = <&pinctrl_uart1>;
540 status = "okay";
541};
542
Troy Kisky1efa1262013-12-12 18:49:05 -0700543&uart2 {
544 pinctrl-names = "default";
545 pinctrl-0 = <&pinctrl_uart2>;
546 status = "okay";
547};
548
549&usbh1 {
550 status = "okay";
551};
552
553&usbotg {
554 vbus-supply = <&reg_usb_otg_vbus>;
555 pinctrl-names = "default";
556 pinctrl-0 = <&pinctrl_usbotg>;
557 disable-over-current;
558 status = "okay";
559};
560
561&usdhc3 {
562 pinctrl-names = "default";
563 pinctrl-0 = <&pinctrl_usdhc3>;
Dong Aisheng89c1a8cf2015-07-22 20:53:02 +0800564 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
565 wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
Troy Kisky1efa1262013-12-12 18:49:05 -0700566 vmmc-supply = <&reg_3p3v>;
567 status = "okay";
568};
569
570&usdhc4 {
571 pinctrl-names = "default";
572 pinctrl-0 = <&pinctrl_usdhc4>;
Dong Aisheng89c1a8cf2015-07-22 20:53:02 +0800573 cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
Troy Kisky1efa1262013-12-12 18:49:05 -0700574 vmmc-supply = <&reg_3p3v>;
575 status = "okay";
576};