blob: 0d027732cd00215836bb4529d3726382c2baff48 [file] [log] [blame]
Nicholas Bellingerc66ac9d2010-12-17 11:11:26 -08001#ifndef TARGET_CORE_RD_H
2#define TARGET_CORE_RD_H
3
4#define RD_HBA_VERSION "v4.0"
5#define RD_DR_VERSION "4.0"
6#define RD_MCP_VERSION "4.0"
7
8/* Largest piece of memory kmalloc can allocate */
9#define RD_MAX_ALLOCATION_SIZE 65536
Nicholas Bellingerc66ac9d2010-12-17 11:11:26 -080010#define RD_DEVICE_QUEUE_DEPTH 32
11#define RD_MAX_DEVICE_QUEUE_DEPTH 128
12#define RD_BLOCKSIZE 512
13#define RD_MAX_SECTORS 1024
14
Nicholas Bellingerc66ac9d2010-12-17 11:11:26 -080015/* Used in target_core_init_configfs() for virtual LUN 0 access */
16int __init rd_module_init(void);
17void rd_module_exit(void);
18
19#define RRF_EMULATE_CDB 0x01
20#define RRF_GOT_LBA 0x02
21
22struct rd_request {
23 struct se_task rd_task;
24
25 /* SCSI CDB from iSCSI Command PDU */
26 unsigned char rd_scsi_cdb[TCM_MAX_COMMAND_SIZE];
27 /* Offset from start of page */
28 u32 rd_offset;
29 /* Starting page in Ramdisk for request */
30 u32 rd_page;
31 /* Total number of pages needed for request */
32 u32 rd_page_count;
33 /* Scatterlist count */
34 u32 rd_size;
Nicholas Bellingerc66ac9d2010-12-17 11:11:26 -080035} ____cacheline_aligned;
36
37struct rd_dev_sg_table {
38 u32 page_start_offset;
39 u32 page_end_offset;
40 u32 rd_sg_count;
41 struct scatterlist *sg_table;
42} ____cacheline_aligned;
43
44#define RDF_HAS_PAGE_COUNT 0x01
45
46struct rd_dev {
47 int rd_direct;
48 u32 rd_flags;
49 /* Unique Ramdisk Device ID in Ramdisk HBA */
50 u32 rd_dev_id;
51 /* Total page count for ramdisk device */
52 u32 rd_page_count;
53 /* Number of SG tables in sg_table_array */
54 u32 sg_table_count;
55 u32 rd_queue_depth;
56 /* Array of rd_dev_sg_table_t containing scatterlists */
57 struct rd_dev_sg_table *sg_table_array;
58 /* Ramdisk HBA device is connected to */
59 struct rd_host *rd_host;
60} ____cacheline_aligned;
61
62struct rd_host {
63 u32 rd_host_dev_id_count;
64 u32 rd_host_id; /* Unique Ramdisk Host ID */
65} ____cacheline_aligned;
66
67#endif /* TARGET_CORE_RD_H */