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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file contains the routines for flushing entries from the
3 * TLB and MMU hash table.
4 *
5 * Derived from arch/ppc64/mm/init.c:
6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
7 *
8 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
9 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
10 * Copyright (C) 1996 Paul Mackerras
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 *
12 * Derived from "arch/i386/mm/init.c"
13 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
14 *
15 * Dave Engebretsen <engebret@us.ibm.com>
16 * Rework for PPC64 port.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
22 */
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +110023
Linus Torvalds1da177e2005-04-16 15:20:36 -070024#include <linux/kernel.h>
25#include <linux/mm.h>
26#include <linux/init.h>
27#include <linux/percpu.h>
28#include <linux/hardirq.h>
29#include <asm/pgalloc.h>
30#include <asm/tlbflush.h>
31#include <asm/tlb.h>
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +110032#include <asm/bug.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033
34DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
35
36/* This is declared as we are using the more or less generic
Stephen Rothwellb8b572e2008-08-01 15:20:30 +100037 * arch/powerpc/include/asm/tlb.h file -- tgall
Linus Torvalds1da177e2005-04-16 15:20:36 -070038 */
39DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
Linus Torvalds1da177e2005-04-16 15:20:36 -070040
41/*
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +100042 * A linux PTE was changed and the corresponding hash table entry
43 * neesd to be flushed. This function will either perform the flush
44 * immediately or will batch it up if the current CPU has an active
45 * batch on it.
46 *
47 * Must be called from within some kind of spinlock/non-preempt region...
Linus Torvalds1da177e2005-04-16 15:20:36 -070048 */
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +100049void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
50 pte_t *ptep, unsigned long pte, int huge)
Linus Torvalds1da177e2005-04-16 15:20:36 -070051{
Linus Torvalds1da177e2005-04-16 15:20:36 -070052 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +100053 unsigned long vsid, vaddr;
Paul Mackerrasbf72aeb2006-06-15 10:45:18 +100054 unsigned int psize;
Paul Mackerras1189be62007-10-11 20:37:10 +100055 int ssize;
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +100056 real_pte_t rpte;
Benjamin Herrenschmidt61b1a942005-09-20 13:52:50 +100057 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -070058
Linus Torvalds1da177e2005-04-16 15:20:36 -070059 i = batch->index;
60
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +110061 /* We mask the address for the base page size. Huge pages will
62 * have applied their own masking already
63 */
64 addr &= PAGE_MASK;
65
Benjamin Herrenschmidt16c2d472007-05-08 16:27:28 +100066 /* Get page size (maybe move back to caller).
67 *
68 * NOTE: when using special 64K mappings in 4K environment like
69 * for SPEs, we obtain the page size from the slice, which thus
70 * must still exist (and thus the VMA not reused) at the time
71 * of this call
72 */
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +110073 if (huge) {
74#ifdef CONFIG_HUGETLB_PAGE
Joe Perchesd258e642009-06-28 06:26:10 +000075 psize = get_slice_psize(mm, addr);
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +110076#else
77 BUG();
Benjamin Herrenschmidt16c2d472007-05-08 16:27:28 +100078 psize = pte_pagesize_index(mm, addr, pte); /* shutup gcc */
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +110079#endif
Paul Mackerrasbf72aeb2006-06-15 10:45:18 +100080 } else
Benjamin Herrenschmidt16c2d472007-05-08 16:27:28 +100081 psize = pte_pagesize_index(mm, addr, pte);
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +110082
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +100083 /* Build full vaddr */
84 if (!is_kernel_addr(addr)) {
Paul Mackerras1189be62007-10-11 20:37:10 +100085 ssize = user_segment_size(addr);
86 vsid = get_vsid(mm->context.id, addr, ssize);
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +100087 WARN_ON(vsid == 0);
Paul Mackerras1189be62007-10-11 20:37:10 +100088 } else {
89 vsid = get_kernel_vsid(addr, mmu_kernel_ssize);
90 ssize = mmu_kernel_ssize;
91 }
92 vaddr = hpt_va(addr, vsid, ssize);
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +100093 rpte = __real_pte(__pte(pte), ptep);
94
95 /*
96 * Check if we have an active batch on this CPU. If not, just
97 * flush now and return. For now, we don global invalidates
98 * in that case, might be worth testing the mm cpu mask though
99 * and decide to use local invalidates instead...
100 */
101 if (!batch->active) {
Paul Mackerras1189be62007-10-11 20:37:10 +1000102 flush_hash_page(vaddr, rpte, psize, ssize, 0);
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +1000103 return;
104 }
105
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106 /*
107 * This can happen when we are in the middle of a TLB batch and
108 * we encounter memory pressure (eg copy_page_range when it tries
109 * to allocate a new pte). If we have to reclaim memory and end
110 * up scanning and resetting referenced bits then our batch context
111 * will change mid stream.
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100112 *
113 * We also need to ensure only one page size is present in a given
114 * batch
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115 */
Paul Mackerras1189be62007-10-11 20:37:10 +1000116 if (i != 0 && (mm != batch->mm || batch->psize != psize ||
117 batch->ssize != ssize)) {
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +1000118 __flush_tlb_pending(batch);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119 i = 0;
120 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121 if (i == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700122 batch->mm = mm;
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100123 batch->psize = psize;
Paul Mackerras1189be62007-10-11 20:37:10 +1000124 batch->ssize = ssize;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125 }
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +1000126 batch->pte[i] = rpte;
127 batch->vaddr[i] = vaddr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128 batch->index = ++i;
129 if (i >= PPC64_TLB_BATCH_NR)
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +1000130 __flush_tlb_pending(batch);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131}
132
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +1000133/*
134 * This function is called when terminating an mmu batch or when a batch
135 * is full. It will perform the flush of all the entries currently stored
136 * in a batch.
137 *
138 * Must be called from within some kind of spinlock/non-preempt region...
139 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140void __flush_tlb_pending(struct ppc64_tlb_batch *batch)
141{
Rusty Russell56aa4122009-03-15 18:16:43 +0000142 const struct cpumask *tmp;
Benjamin Herrenschmidta741e672007-04-10 17:09:37 +1000143 int i, local = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145 i = batch->index;
Rusty Russell56aa4122009-03-15 18:16:43 +0000146 tmp = cpumask_of(smp_processor_id());
147 if (cpumask_equal(mm_cpumask(batch->mm), tmp))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148 local = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149 if (i == 1)
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100150 flush_hash_page(batch->vaddr[0], batch->pte[0],
Paul Mackerras1189be62007-10-11 20:37:10 +1000151 batch->psize, batch->ssize, local);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 else
Benjamin Herrenschmidt61b1a942005-09-20 13:52:50 +1000153 flush_hash_range(i, local);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700154 batch->index = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155}
156
Benjamin Herrenschmidt3d5134e2007-06-04 15:15:36 +1000157/**
158 * __flush_hash_table_range - Flush all HPTEs for a given address range
159 * from the hash table (and the TLB). But keeps
160 * the linux PTEs intact.
161 *
162 * @mm : mm_struct of the target address space (generally init_mm)
163 * @start : starting address
164 * @end : ending address (not included in the flush)
165 *
166 * This function is mostly to be used by some IO hotplug code in order
167 * to remove all hash entries from a given address range used to map IO
168 * space on a removed PCI-PCI bidge without tearing down the full mapping
169 * since 64K pages may overlap with other bridges when using 64K pages
170 * with 4K HW pages on IO space.
171 *
172 * Because of that usage pattern, it's only available with CONFIG_HOTPLUG
173 * and is implemented for small size rather than speed.
174 */
175#ifdef CONFIG_HOTPLUG
176
177void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
178 unsigned long end)
179{
180 unsigned long flags;
181
182 start = _ALIGN_DOWN(start, PAGE_SIZE);
183 end = _ALIGN_UP(end, PAGE_SIZE);
184
185 BUG_ON(!mm->pgd);
186
187 /* Note: Normally, we should only ever use a batch within a
188 * PTE locked section. This violates the rule, but will work
189 * since we don't actually modify the PTEs, we just flush the
190 * hash while leaving the PTEs intact (including their reference
191 * to being hashed). This is not the most performance oriented
192 * way to do things but is fine for our needs here.
193 */
194 local_irq_save(flags);
195 arch_enter_lazy_mmu_mode();
196 for (; start < end; start += PAGE_SIZE) {
197 pte_t *ptep = find_linux_pte(mm->pgd, start);
198 unsigned long pte;
199
200 if (ptep == NULL)
201 continue;
202 pte = pte_val(*ptep);
203 if (!(pte & _PAGE_HASHPTE))
204 continue;
205 hpte_need_flush(mm, start, ptep, pte, 0);
206 }
207 arch_leave_lazy_mmu_mode();
208 local_irq_restore(flags);
209}
210
211#endif /* CONFIG_HOTPLUG */