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Chris Zankel9a8fd552005-06-23 22:01:26 -07001/*
2 * include/asm-xtensa/tlbflush.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_TLBFLUSH_H
12#define _XTENSA_TLBFLUSH_H
13
Chris Zankel9a8fd552005-06-23 22:01:26 -070014#ifdef __KERNEL__
15
Chris Zankel9a8fd552005-06-23 22:01:26 -070016#include <linux/stringify.h>
Chris Zankel173d66812006-12-10 02:18:48 -080017#include <asm/processor.h>
18
19#define DTLB_WAY_PGD 7
20
21#define ITLB_ARF_WAYS 4
22#define DTLB_ARF_WAYS 4
23
24#define ITLB_HIT_BIT 3
25#define DTLB_HIT_BIT 4
26
27#ifndef __ASSEMBLY__
Chris Zankel9a8fd552005-06-23 22:01:26 -070028
29/* TLB flushing:
30 *
31 * - flush_tlb_all() flushes all processes TLB entries
32 * - flush_tlb_mm(mm) flushes the specified mm context TLB entries
33 * - flush_tlb_page(mm, vmaddr) flushes a single page
34 * - flush_tlb_range(mm, start, end) flushes a range of pages
35 */
36
37extern void flush_tlb_all(void);
38extern void flush_tlb_mm(struct mm_struct*);
39extern void flush_tlb_page(struct vm_area_struct*,unsigned long);
40extern void flush_tlb_range(struct vm_area_struct*,unsigned long,unsigned long);
41
42#define flush_tlb_kernel_range(start,end) flush_tlb_all()
43
44
45/* This is calld in munmap when we have freed up some page-table pages.
46 * We don't need to do anything here, there's nothing special about our
47 * page-table pages.
48 */
49
Adrian Bunkd99cf712005-09-03 15:57:53 -070050static inline void flush_tlb_pgtables(struct mm_struct *mm,
Chris Zankel9a8fd552005-06-23 22:01:26 -070051 unsigned long start, unsigned long end)
52{
53}
54
55/* TLB operations. */
56
Adrian Bunkd99cf712005-09-03 15:57:53 -070057static inline unsigned long itlb_probe(unsigned long addr)
Chris Zankel9a8fd552005-06-23 22:01:26 -070058{
59 unsigned long tmp;
60 __asm__ __volatile__("pitlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
61 return tmp;
62}
63
Adrian Bunkd99cf712005-09-03 15:57:53 -070064static inline unsigned long dtlb_probe(unsigned long addr)
Chris Zankel9a8fd552005-06-23 22:01:26 -070065{
66 unsigned long tmp;
67 __asm__ __volatile__("pdtlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
68 return tmp;
69}
70
Adrian Bunkd99cf712005-09-03 15:57:53 -070071static inline void invalidate_itlb_entry (unsigned long probe)
Chris Zankel9a8fd552005-06-23 22:01:26 -070072{
73 __asm__ __volatile__("iitlb %0; isync\n\t" : : "a" (probe));
74}
75
Adrian Bunkd99cf712005-09-03 15:57:53 -070076static inline void invalidate_dtlb_entry (unsigned long probe)
Chris Zankel9a8fd552005-06-23 22:01:26 -070077{
78 __asm__ __volatile__("idtlb %0; dsync\n\t" : : "a" (probe));
79}
80
81/* Use the .._no_isync functions with caution. Generally, these are
82 * handy for bulk invalidates followed by a single 'isync'. The
83 * caller must follow up with an 'isync', which can be relatively
84 * expensive on some Xtensa implementations.
85 */
Adrian Bunkd99cf712005-09-03 15:57:53 -070086static inline void invalidate_itlb_entry_no_isync (unsigned entry)
Chris Zankel9a8fd552005-06-23 22:01:26 -070087{
88 /* Caller must follow up with 'isync'. */
89 __asm__ __volatile__ ("iitlb %0\n" : : "a" (entry) );
90}
91
Adrian Bunkd99cf712005-09-03 15:57:53 -070092static inline void invalidate_dtlb_entry_no_isync (unsigned entry)
Chris Zankel9a8fd552005-06-23 22:01:26 -070093{
94 /* Caller must follow up with 'isync'. */
95 __asm__ __volatile__ ("idtlb %0\n" : : "a" (entry) );
96}
97
Adrian Bunkd99cf712005-09-03 15:57:53 -070098static inline void set_itlbcfg_register (unsigned long val)
Chris Zankel9a8fd552005-06-23 22:01:26 -070099{
100 __asm__ __volatile__("wsr %0, "__stringify(ITLBCFG)"\n\t" "isync\n\t"
101 : : "a" (val));
102}
103
Adrian Bunkd99cf712005-09-03 15:57:53 -0700104static inline void set_dtlbcfg_register (unsigned long val)
Chris Zankel9a8fd552005-06-23 22:01:26 -0700105{
106 __asm__ __volatile__("wsr %0, "__stringify(DTLBCFG)"; dsync\n\t"
107 : : "a" (val));
108}
109
Adrian Bunkd99cf712005-09-03 15:57:53 -0700110static inline void set_ptevaddr_register (unsigned long val)
Chris Zankel9a8fd552005-06-23 22:01:26 -0700111{
112 __asm__ __volatile__(" wsr %0, "__stringify(PTEVADDR)"; isync\n"
113 : : "a" (val));
114}
115
Adrian Bunkd99cf712005-09-03 15:57:53 -0700116static inline unsigned long read_ptevaddr_register (void)
Chris Zankel9a8fd552005-06-23 22:01:26 -0700117{
118 unsigned long tmp;
119 __asm__ __volatile__("rsr %0, "__stringify(PTEVADDR)"\n\t" : "=a" (tmp));
120 return tmp;
121}
122
Adrian Bunkd99cf712005-09-03 15:57:53 -0700123static inline void write_dtlb_entry (pte_t entry, int way)
Chris Zankel9a8fd552005-06-23 22:01:26 -0700124{
125 __asm__ __volatile__("wdtlb %1, %0; dsync\n\t"
126 : : "r" (way), "r" (entry) );
127}
128
Adrian Bunkd99cf712005-09-03 15:57:53 -0700129static inline void write_itlb_entry (pte_t entry, int way)
Chris Zankel9a8fd552005-06-23 22:01:26 -0700130{
131 __asm__ __volatile__("witlb %1, %0; isync\n\t"
132 : : "r" (way), "r" (entry) );
133}
134
Adrian Bunkd99cf712005-09-03 15:57:53 -0700135static inline void invalidate_page_directory (void)
Chris Zankel9a8fd552005-06-23 22:01:26 -0700136{
Chris Zankel173d66812006-12-10 02:18:48 -0800137 invalidate_dtlb_entry (DTLB_WAY_PGD);
138 invalidate_dtlb_entry (DTLB_WAY_PGD+1);
139 invalidate_dtlb_entry (DTLB_WAY_PGD+2);
Chris Zankel9a8fd552005-06-23 22:01:26 -0700140}
141
Adrian Bunkd99cf712005-09-03 15:57:53 -0700142static inline void invalidate_itlb_mapping (unsigned address)
Chris Zankel9a8fd552005-06-23 22:01:26 -0700143{
144 unsigned long tlb_entry;
Chris Zankel173d66812006-12-10 02:18:48 -0800145 if (((tlb_entry = itlb_probe(address)) & (1 << ITLB_HIT_BIT)) != 0)
146 invalidate_itlb_entry(tlb_entry);
Chris Zankel9a8fd552005-06-23 22:01:26 -0700147}
148
Adrian Bunkd99cf712005-09-03 15:57:53 -0700149static inline void invalidate_dtlb_mapping (unsigned address)
Chris Zankel9a8fd552005-06-23 22:01:26 -0700150{
151 unsigned long tlb_entry;
Chris Zankel173d66812006-12-10 02:18:48 -0800152 if (((tlb_entry = dtlb_probe(address)) & (1 << DTLB_HIT_BIT)) != 0)
153 invalidate_dtlb_entry(tlb_entry);
Chris Zankel9a8fd552005-06-23 22:01:26 -0700154}
155
156#define check_pgt_cache() do { } while (0)
157
158
Chris Zankel173d66812006-12-10 02:18:48 -0800159/*
160 * DO NOT USE THESE FUNCTIONS. These instructions aren't part of the Xtensa
Chris Zankel9a8fd552005-06-23 22:01:26 -0700161 * ISA and exist only for test purposes..
162 * You may find it helpful for MMU debugging, however.
163 *
164 * 'at' is the unmodified input register
165 * 'as' is the output register, as follows (specific to the Linux config):
166 *
167 * as[31..12] contain the virtual address
168 * as[11..08] are meaningless
169 * as[07..00] contain the asid
170 */
171
Adrian Bunkd99cf712005-09-03 15:57:53 -0700172static inline unsigned long read_dtlb_virtual (int way)
Chris Zankel9a8fd552005-06-23 22:01:26 -0700173{
174 unsigned long tmp;
175 __asm__ __volatile__("rdtlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
176 return tmp;
177}
178
Adrian Bunkd99cf712005-09-03 15:57:53 -0700179static inline unsigned long read_dtlb_translation (int way)
Chris Zankel9a8fd552005-06-23 22:01:26 -0700180{
181 unsigned long tmp;
182 __asm__ __volatile__("rdtlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
183 return tmp;
184}
185
Adrian Bunkd99cf712005-09-03 15:57:53 -0700186static inline unsigned long read_itlb_virtual (int way)
Chris Zankel9a8fd552005-06-23 22:01:26 -0700187{
188 unsigned long tmp;
189 __asm__ __volatile__("ritlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
190 return tmp;
191}
192
Adrian Bunkd99cf712005-09-03 15:57:53 -0700193static inline unsigned long read_itlb_translation (int way)
Chris Zankel9a8fd552005-06-23 22:01:26 -0700194{
195 unsigned long tmp;
196 __asm__ __volatile__("ritlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
197 return tmp;
198}
199
Chris Zankel173d66812006-12-10 02:18:48 -0800200#endif /* __ASSEMBLY__ */
Chris Zankel9a8fd552005-06-23 22:01:26 -0700201#endif /* __KERNEL__ */
Chris Zankel173d66812006-12-10 02:18:48 -0800202#endif /* _XTENSA_TLBFLUSH_H */