Adam Thomson | ee4105a | 2015-11-25 14:24:33 +0000 | [diff] [blame] | 1 | Dialog Semiconductor DA7218 Audio Codec bindings |
| 2 | |
| 3 | DA7218 is an audio codec with HP detect feature. |
| 4 | |
| 5 | ====== |
| 6 | |
| 7 | Required properties: |
| 8 | - compatible : Should be "dlg,da7217" or "dlg,da7218" |
| 9 | - reg: Specifies the I2C slave address |
| 10 | |
| 11 | - VDD-supply: VDD power supply for the device |
| 12 | - VDDMIC-supply: VDDMIC power supply for the device |
| 13 | - VDDIO-supply: VDDIO power supply for the device |
| 14 | (See Documentation/devicetree/bindings/regulator/regulator.txt for further |
| 15 | information relating to regulators) |
| 16 | |
| 17 | Optional properties: |
| 18 | - interrupt-parent: Specifies the phandle of the interrupt controller to which |
| 19 | the IRQs from DA7218 are delivered to. |
| 20 | - interrupts: IRQ line info for DA7218 chip. |
| 21 | (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for |
| 22 | further information relating to interrupt properties) |
| 23 | - interrupt-names : Name associated with interrupt line. Should be "wakeup" if |
| 24 | interrupt is to be used to wake system, otherwise "irq" should be used. |
| 25 | - wakeup-source: Flag to indicate this device can wake system (suspend/resume). |
| 26 | |
| 27 | - clocks : phandle and clock specifier for codec MCLK. |
| 28 | - clock-names : Clock name string for 'clocks' attribute, should be "mclk". |
| 29 | |
| 30 | - dlg,micbias1-lvl-millivolt : Voltage (mV) for Mic Bias 1 |
| 31 | [<1200>, <1600>, <1800>, <2000>, <2200>, <2400>, <2600>, <2800>, <3000>] |
| 32 | - dlg,micbias2-lvl-millivolt : Voltage (mV) for Mic Bias 2 |
| 33 | [<1200>, <1600>, <1800>, <2000>, <2200>, <2400>, <2600>, <2800>, <3000>] |
| 34 | - dlg,mic1-amp-in-sel : Mic1 input source type |
| 35 | ["diff", "se_p", "se_n"] |
| 36 | - dlg,mic2-amp-in-sel : Mic2 input source type |
| 37 | ["diff", "se_p", "se_n"] |
| 38 | - dlg,dmic1-data-sel : DMIC1 channel select based on clock edge. |
| 39 | ["lrise_rfall", "lfall_rrise"] |
| 40 | - dlg,dmic1-samplephase : When to sample audio from DMIC1. |
| 41 | ["on_clkedge", "between_clkedge"] |
| 42 | - dlg,dmic1-clkrate-hz : DMic1 clock frequency (Hz). |
| 43 | [<1500000>, <3000000>] |
| 44 | - dlg,dmic2-data-sel : DMic2 channel select based on clock edge. |
| 45 | ["lrise_rfall", "lfall_rrise"] |
| 46 | - dlg,dmic2-samplephase : When to sample audio from DMic2. |
| 47 | ["on_clkedge", "between_clkedge"] |
| 48 | - dlg,dmic2-clkrate-hz : DMic2 clock frequency (Hz). |
| 49 | [<1500000>, <3000000>] |
| 50 | - dlg,hp-diff-single-supply : Boolean flag, use single supply for HP |
| 51 | (DA7217 only) |
| 52 | |
| 53 | ====== |
| 54 | |
| 55 | Optional Child node - 'da7218_hpldet' (DA7218 only): |
| 56 | |
| 57 | Optional properties: |
| 58 | - dlg,jack-rate-us : Time between jack detect measurements (us) |
| 59 | [<5>, <10>, <20>, <40>, <80>, <160>, <320>, <640>] |
| 60 | - dlg,jack-debounce : Number of debounce measurements taken for jack detect |
| 61 | [<0>, <2>, <3>, <4>] |
| 62 | - dlg,jack-threshold-pct : Threshold level for jack detection (% of VDD) |
| 63 | [<84>, <88>, <92>, <96>] |
| 64 | - dlg,comp-inv : Boolean flag, invert comparator output |
| 65 | - dlg,hyst : Boolean flag, enable hysteresis |
| 66 | - dlg,discharge : Boolean flag, auto discharge of Mic Bias on jack removal |
| 67 | |
| 68 | ====== |
| 69 | |
| 70 | Example: |
| 71 | |
| 72 | codec: da7218@1a { |
| 73 | compatible = "dlg,da7218"; |
| 74 | reg = <0x1a>; |
| 75 | interrupt-parent = <&gpio6>; |
| 76 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; |
| 77 | wakeup-source; |
| 78 | |
| 79 | VDD-supply = <®_audio>; |
| 80 | VDDMIC-supply = <®_audio>; |
| 81 | VDDIO-supply = <®_audio>; |
| 82 | |
| 83 | clocks = <&clks 201>; |
| 84 | clock-names = "mclk"; |
| 85 | |
| 86 | dlg,micbias1-lvl-millivolt = <2600>; |
| 87 | dlg,micbias2-lvl-millivolt = <2600>; |
| 88 | dlg,mic1-amp-in-sel = "diff"; |
| 89 | dlg,mic2-amp-in-sel = "diff"; |
| 90 | |
| 91 | dlg,dmic1-data-sel = "lrise_rfall"; |
| 92 | dlg,dmic1-samplephase = "on_clkedge"; |
| 93 | dlg,dmic1-clkrate-hz = <3000000>; |
| 94 | dlg,dmic2-data-sel = "lrise_rfall"; |
| 95 | dlg,dmic2-samplephase = "on_clkedge"; |
| 96 | dlg,dmic2-clkrate-hz = <3000000>; |
| 97 | |
| 98 | da7218_hpldet { |
| 99 | dlg,jack-rate-us = <40>; |
| 100 | dlg,jack-debounce = <2>; |
| 101 | dlg,jack-threshold-pct = <84>; |
| 102 | dlg,hyst; |
| 103 | }; |
| 104 | }; |