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Dylan Reid3c320f32014-05-19 19:18:27 -07001NVIDIA Tegra30 HDA controller
2
3Required properties:
Paul Walmsley193c9d22015-01-30 15:11:04 -07004- compatible : For Tegra30, must contain "nvidia,tegra30-hda". Otherwise,
5 must contain '"nvidia,<chip>-hda", "nvidia,tegra30-hda"', where <chip> is
6 tegra114, tegra124, or tegra132.
Dylan Reid3c320f32014-05-19 19:18:27 -07007- reg : Should contain the HDA registers location and length.
8- interrupts : The interrupt from the HDA controller.
9- clocks : Must contain an entry for each required entry in clock-names.
10 See ../clocks/clock-bindings.txt for details.
Thierry Reding5cf4af32015-01-23 09:34:44 +010011- clock-names : Must include the following entries: hda, hda2hdmi, hda2codec_2x
Dylan Reid3c320f32014-05-19 19:18:27 -070012- resets : Must contain an entry for each entry in reset-names.
13 See ../reset/reset.txt for details.
Thierry Reding5cf4af32015-01-23 09:34:44 +010014- reset-names : Must include the following entries: hda, hda2hdmi, hda2codec_2x
Dylan Reid3c320f32014-05-19 19:18:27 -070015
16Example:
17
Thierry Redingf43521e2016-04-12 17:07:35 +020018hda@70030000 {
Dylan Reid3c320f32014-05-19 19:18:27 -070019 compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
20 reg = <0x0 0x70030000 0x0 0x10000>;
21 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
22 clocks = <&tegra_car TEGRA124_CLK_HDA>,
23 <&tegra_car TEGRA124_CLK_HDA2HDMI>,
24 <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>;
Dylan Reid2c6db772014-05-30 19:15:47 -070025 clock-names = "hda", "hda2hdmi", "hda2codec_2x";
Dylan Reid3c320f32014-05-19 19:18:27 -070026 resets = <&tegra_car 125>, /* hda */
Marcel Ziswiler42a86792015-04-10 23:35:58 +020027 <&tegra_car 128>, /* hda2hdmi */
28 <&tegra_car 111>; /* hda2codec_2x */
Dylan Reid2c6db772014-05-30 19:15:47 -070029 reset-names = "hda", "hda2hdmi", "hda2codec_2x";
Dylan Reid3c320f32014-05-19 19:18:27 -070030};