blob: 014e26cda08d1b08d012b174ed1b1908132f1b96 [file] [log] [blame]
Jon Loeliger4ca4b622006-06-17 17:52:45 -05001/*
2 * Author: Xianghua Xiao <x.xiao@freescale.com>
3 * Zhang Wei <wei.zhang@freescale.com>
4 *
5 * Copyright 2006 Freescale Semiconductor Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
Jon Loeliger4ca4b622006-06-17 17:52:45 -050013#include <linux/stddef.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17
Michael Ellermanaaddd3e2008-06-24 11:32:21 +100018#include <asm/code-patching.h>
Jon Loeliger4ca4b622006-06-17 17:52:45 -050019#include <asm/page.h>
David Gibsonf1a1eb22007-05-09 15:20:37 +100020#include <asm/pgtable.h>
Jon Loeliger4ca4b622006-06-17 17:52:45 -050021#include <asm/pci-bridge.h>
Stephen Rothwellb8b572e2008-08-01 15:20:30 +100022#include <asm/mpic.h>
Jon Loeliger4ca4b622006-06-17 17:52:45 -050023#include <asm/mpc86xx.h>
24#include <asm/cacheflush.h>
25
26#include <sysdev/fsl_soc.h>
27
28#include "mpc86xx.h"
29
30extern void __secondary_start_mpc86xx(void);
31extern unsigned long __secondary_hold_acknowledge;
32
33
34static void __init
35smp_86xx_release_core(int nr)
36{
Kumar Gala9ad494f2006-06-28 00:37:45 -050037 __be32 __iomem *mcm_vaddr;
38 unsigned long pcr;
Jon Loeliger4ca4b622006-06-17 17:52:45 -050039
40 if (nr < 0 || nr >= NR_CPUS)
41 return;
42
43 /*
44 * Startup Core #nr.
45 */
46 mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET,
47 MPC86xx_MCM_SIZE);
Kumar Gala9ad494f2006-06-28 00:37:45 -050048 pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2));
Jon Loeliger4ca4b622006-06-17 17:52:45 -050049 pcr |= 1 << (nr + 24);
Kumar Gala9ad494f2006-06-28 00:37:45 -050050 out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr);
Jon Loeliger4ca4b622006-06-17 17:52:45 -050051}
52
53
54static void __init
55smp_86xx_kick_cpu(int nr)
56{
57 unsigned int save_vector;
58 unsigned long target, flags;
59 int n = 0;
Michael Ellermane7a57272008-06-24 11:32:22 +100060 unsigned int *vector = (unsigned int *)(KERNELBASE + 0x100);
Jon Loeliger4ca4b622006-06-17 17:52:45 -050061
62 if (nr < 0 || nr >= NR_CPUS)
63 return;
64
65 pr_debug("smp_86xx_kick_cpu: kick CPU #%d\n", nr);
66
67 local_irq_save(flags);
Jon Loeliger4ca4b622006-06-17 17:52:45 -050068
69 /* Save reset vector */
70 save_vector = *vector;
71
72 /* Setup fake reset vector to call __secondary_start_mpc86xx. */
73 target = (unsigned long) __secondary_start_mpc86xx;
Michael Ellermane7a57272008-06-24 11:32:22 +100074 patch_branch(vector, target, BRANCH_SET_LINK);
Jon Loeliger4ca4b622006-06-17 17:52:45 -050075
76 /* Kick that CPU */
77 smp_86xx_release_core(nr);
78
79 /* Wait a bit for the CPU to take the exception. */
80 while ((__secondary_hold_acknowledge != nr) && (n++, n < 1000))
81 mdelay(1);
82
83 /* Restore the exception vector */
84 *vector = save_vector;
85 flush_icache_range((unsigned long) vector, (unsigned long) vector + 4);
86
87 local_irq_restore(flags);
88
89 pr_debug("wait CPU #%d for %d msecs.\n", nr, n);
90}
91
92
93static void __init
94smp_86xx_setup_cpu(int cpu_nr)
95{
96 mpic_setup_this_cpu();
97}
98
99
100struct smp_ops_t smp_86xx_ops = {
101 .message_pass = smp_mpic_message_pass,
102 .probe = smp_mpic_probe,
103 .kick_cpu = smp_86xx_kick_cpu,
104 .setup_cpu = smp_86xx_setup_cpu,
105 .take_timebase = smp_generic_take_timebase,
106 .give_timebase = smp_generic_give_timebase,
107};
108
109
110void __init
111mpc86xx_smp_init(void)
112{
113 smp_ops = &smp_86xx_ops;
114}