Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 1 | /* linux/arch/arm/mach-msm/devices.c |
| 2 | * |
| 3 | * Copyright (C) 2008 Google, Inc. |
| 4 | * |
| 5 | * This software is licensed under the terms of the GNU General Public |
| 6 | * License version 2, as published by the Free Software Foundation, and |
| 7 | * may be copied, distributed, and modified under those terms. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/platform_device.h> |
| 18 | |
Russell King | 80b02c1 | 2009-01-08 10:01:47 +0000 | [diff] [blame] | 19 | #include <mach/irqs.h> |
Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 20 | #include <mach/msm_iomap.h> |
| 21 | #include "devices.h" |
| 22 | |
| 23 | #include <asm/mach/flash.h> |
| 24 | #include <linux/mtd/nand.h> |
| 25 | #include <linux/mtd/partitions.h> |
| 26 | |
Daniel Walker | 5e96da5 | 2010-05-12 13:43:28 -0700 | [diff] [blame] | 27 | |
| 28 | #include "clock.h" |
San Mehat | 5d4f77f | 2008-11-10 16:30:27 -0800 | [diff] [blame] | 29 | #include <mach/mmc.h> |
| 30 | |
Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 31 | static struct resource resources_uart1[] = { |
| 32 | { |
| 33 | .start = INT_UART1, |
| 34 | .end = INT_UART1, |
| 35 | .flags = IORESOURCE_IRQ, |
| 36 | }, |
| 37 | { |
| 38 | .start = MSM_UART1_PHYS, |
| 39 | .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1, |
| 40 | .flags = IORESOURCE_MEM, |
Stepan Moskovchenko | d41cb8c | 2011-01-17 20:33:32 -0800 | [diff] [blame^] | 41 | .name = "uart_resource" |
Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 42 | }, |
| 43 | }; |
| 44 | |
| 45 | static struct resource resources_uart2[] = { |
| 46 | { |
| 47 | .start = INT_UART2, |
| 48 | .end = INT_UART2, |
| 49 | .flags = IORESOURCE_IRQ, |
| 50 | }, |
| 51 | { |
| 52 | .start = MSM_UART2_PHYS, |
| 53 | .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1, |
| 54 | .flags = IORESOURCE_MEM, |
Stepan Moskovchenko | d41cb8c | 2011-01-17 20:33:32 -0800 | [diff] [blame^] | 55 | .name = "uart_resource" |
Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 56 | }, |
| 57 | }; |
| 58 | |
| 59 | static struct resource resources_uart3[] = { |
| 60 | { |
| 61 | .start = INT_UART3, |
| 62 | .end = INT_UART3, |
| 63 | .flags = IORESOURCE_IRQ, |
| 64 | }, |
| 65 | { |
| 66 | .start = MSM_UART3_PHYS, |
| 67 | .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1, |
| 68 | .flags = IORESOURCE_MEM, |
Stepan Moskovchenko | d41cb8c | 2011-01-17 20:33:32 -0800 | [diff] [blame^] | 69 | .name = "uart_resource" |
Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 70 | }, |
| 71 | }; |
| 72 | |
| 73 | struct platform_device msm_device_uart1 = { |
| 74 | .name = "msm_serial", |
| 75 | .id = 0, |
| 76 | .num_resources = ARRAY_SIZE(resources_uart1), |
| 77 | .resource = resources_uart1, |
| 78 | }; |
| 79 | |
| 80 | struct platform_device msm_device_uart2 = { |
| 81 | .name = "msm_serial", |
| 82 | .id = 1, |
| 83 | .num_resources = ARRAY_SIZE(resources_uart2), |
| 84 | .resource = resources_uart2, |
| 85 | }; |
| 86 | |
| 87 | struct platform_device msm_device_uart3 = { |
| 88 | .name = "msm_serial", |
| 89 | .id = 2, |
| 90 | .num_resources = ARRAY_SIZE(resources_uart3), |
| 91 | .resource = resources_uart3, |
| 92 | }; |
| 93 | |
| 94 | static struct resource resources_i2c[] = { |
| 95 | { |
| 96 | .start = MSM_I2C_PHYS, |
| 97 | .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1, |
| 98 | .flags = IORESOURCE_MEM, |
| 99 | }, |
| 100 | { |
| 101 | .start = INT_PWB_I2C, |
| 102 | .end = INT_PWB_I2C, |
| 103 | .flags = IORESOURCE_IRQ, |
| 104 | }, |
| 105 | }; |
| 106 | |
| 107 | struct platform_device msm_device_i2c = { |
| 108 | .name = "msm_i2c", |
| 109 | .id = 0, |
| 110 | .num_resources = ARRAY_SIZE(resources_i2c), |
| 111 | .resource = resources_i2c, |
| 112 | }; |
| 113 | |
| 114 | static struct resource resources_hsusb[] = { |
| 115 | { |
| 116 | .start = MSM_HSUSB_PHYS, |
| 117 | .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, |
| 118 | .flags = IORESOURCE_MEM, |
| 119 | }, |
| 120 | { |
| 121 | .start = INT_USB_HS, |
| 122 | .end = INT_USB_HS, |
| 123 | .flags = IORESOURCE_IRQ, |
| 124 | }, |
| 125 | }; |
| 126 | |
| 127 | struct platform_device msm_device_hsusb = { |
| 128 | .name = "msm_hsusb", |
| 129 | .id = -1, |
| 130 | .num_resources = ARRAY_SIZE(resources_hsusb), |
| 131 | .resource = resources_hsusb, |
| 132 | .dev = { |
| 133 | .coherent_dma_mask = 0xffffffff, |
| 134 | }, |
| 135 | }; |
| 136 | |
| 137 | struct flash_platform_data msm_nand_data = { |
| 138 | .parts = NULL, |
| 139 | .nr_parts = 0, |
| 140 | }; |
| 141 | |
| 142 | static struct resource resources_nand[] = { |
| 143 | [0] = { |
| 144 | .start = 7, |
| 145 | .end = 7, |
| 146 | .flags = IORESOURCE_DMA, |
| 147 | }, |
| 148 | }; |
| 149 | |
| 150 | struct platform_device msm_device_nand = { |
| 151 | .name = "msm_nand", |
| 152 | .id = -1, |
| 153 | .num_resources = ARRAY_SIZE(resources_nand), |
| 154 | .resource = resources_nand, |
| 155 | .dev = { |
| 156 | .platform_data = &msm_nand_data, |
| 157 | }, |
| 158 | }; |
| 159 | |
| 160 | struct platform_device msm_device_smd = { |
| 161 | .name = "msm_smd", |
| 162 | .id = -1, |
| 163 | }; |
| 164 | |
| 165 | static struct resource resources_sdc1[] = { |
| 166 | { |
| 167 | .start = MSM_SDC1_PHYS, |
| 168 | .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1, |
| 169 | .flags = IORESOURCE_MEM, |
| 170 | }, |
| 171 | { |
| 172 | .start = INT_SDC1_0, |
Dima Zavin | 830d843 | 2009-05-22 20:21:50 -0700 | [diff] [blame] | 173 | .end = INT_SDC1_0, |
| 174 | .flags = IORESOURCE_IRQ, |
| 175 | .name = "cmd_irq", |
| 176 | }, |
| 177 | { |
| 178 | .start = INT_SDC1_1, |
Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 179 | .end = INT_SDC1_1, |
| 180 | .flags = IORESOURCE_IRQ, |
Dima Zavin | 830d843 | 2009-05-22 20:21:50 -0700 | [diff] [blame] | 181 | .name = "pio_irq", |
| 182 | }, |
| 183 | { |
| 184 | .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, |
| 185 | .name = "status_irq" |
Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 186 | }, |
| 187 | { |
| 188 | .start = 8, |
| 189 | .end = 8, |
| 190 | .flags = IORESOURCE_DMA, |
| 191 | }, |
| 192 | }; |
| 193 | |
| 194 | static struct resource resources_sdc2[] = { |
| 195 | { |
| 196 | .start = MSM_SDC2_PHYS, |
| 197 | .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1, |
| 198 | .flags = IORESOURCE_MEM, |
| 199 | }, |
| 200 | { |
| 201 | .start = INT_SDC2_0, |
Dima Zavin | 830d843 | 2009-05-22 20:21:50 -0700 | [diff] [blame] | 202 | .end = INT_SDC2_0, |
| 203 | .flags = IORESOURCE_IRQ, |
| 204 | .name = "cmd_irq", |
| 205 | }, |
| 206 | { |
| 207 | .start = INT_SDC2_1, |
Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 208 | .end = INT_SDC2_1, |
| 209 | .flags = IORESOURCE_IRQ, |
Dima Zavin | 830d843 | 2009-05-22 20:21:50 -0700 | [diff] [blame] | 210 | .name = "pio_irq", |
| 211 | }, |
| 212 | { |
| 213 | .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, |
| 214 | .name = "status_irq" |
Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 215 | }, |
| 216 | { |
| 217 | .start = 8, |
| 218 | .end = 8, |
| 219 | .flags = IORESOURCE_DMA, |
| 220 | }, |
| 221 | }; |
| 222 | |
| 223 | static struct resource resources_sdc3[] = { |
| 224 | { |
| 225 | .start = MSM_SDC3_PHYS, |
| 226 | .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1, |
| 227 | .flags = IORESOURCE_MEM, |
| 228 | }, |
| 229 | { |
| 230 | .start = INT_SDC3_0, |
Dima Zavin | 830d843 | 2009-05-22 20:21:50 -0700 | [diff] [blame] | 231 | .end = INT_SDC3_0, |
| 232 | .flags = IORESOURCE_IRQ, |
| 233 | .name = "cmd_irq", |
| 234 | }, |
| 235 | { |
| 236 | .start = INT_SDC3_1, |
Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 237 | .end = INT_SDC3_1, |
| 238 | .flags = IORESOURCE_IRQ, |
Dima Zavin | 830d843 | 2009-05-22 20:21:50 -0700 | [diff] [blame] | 239 | .name = "pio_irq", |
| 240 | }, |
| 241 | { |
| 242 | .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, |
| 243 | .name = "status_irq" |
Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 244 | }, |
| 245 | { |
| 246 | .start = 8, |
| 247 | .end = 8, |
| 248 | .flags = IORESOURCE_DMA, |
| 249 | }, |
| 250 | }; |
| 251 | |
| 252 | static struct resource resources_sdc4[] = { |
| 253 | { |
| 254 | .start = MSM_SDC4_PHYS, |
| 255 | .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1, |
| 256 | .flags = IORESOURCE_MEM, |
| 257 | }, |
| 258 | { |
| 259 | .start = INT_SDC4_0, |
Dima Zavin | 830d843 | 2009-05-22 20:21:50 -0700 | [diff] [blame] | 260 | .end = INT_SDC4_0, |
| 261 | .flags = IORESOURCE_IRQ, |
| 262 | .name = "cmd_irq", |
| 263 | }, |
| 264 | { |
| 265 | .start = INT_SDC4_1, |
Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 266 | .end = INT_SDC4_1, |
| 267 | .flags = IORESOURCE_IRQ, |
Dima Zavin | 830d843 | 2009-05-22 20:21:50 -0700 | [diff] [blame] | 268 | .name = "pio_irq", |
| 269 | }, |
| 270 | { |
| 271 | .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, |
| 272 | .name = "status_irq" |
Brian Swetland | bcc0f6a | 2008-09-10 14:00:53 -0700 | [diff] [blame] | 273 | }, |
| 274 | { |
| 275 | .start = 8, |
| 276 | .end = 8, |
| 277 | .flags = IORESOURCE_DMA, |
| 278 | }, |
| 279 | }; |
| 280 | |
| 281 | struct platform_device msm_device_sdc1 = { |
| 282 | .name = "msm_sdcc", |
| 283 | .id = 1, |
| 284 | .num_resources = ARRAY_SIZE(resources_sdc1), |
| 285 | .resource = resources_sdc1, |
| 286 | .dev = { |
| 287 | .coherent_dma_mask = 0xffffffff, |
| 288 | }, |
| 289 | }; |
| 290 | |
| 291 | struct platform_device msm_device_sdc2 = { |
| 292 | .name = "msm_sdcc", |
| 293 | .id = 2, |
| 294 | .num_resources = ARRAY_SIZE(resources_sdc2), |
| 295 | .resource = resources_sdc2, |
| 296 | .dev = { |
| 297 | .coherent_dma_mask = 0xffffffff, |
| 298 | }, |
| 299 | }; |
| 300 | |
| 301 | struct platform_device msm_device_sdc3 = { |
| 302 | .name = "msm_sdcc", |
| 303 | .id = 3, |
| 304 | .num_resources = ARRAY_SIZE(resources_sdc3), |
| 305 | .resource = resources_sdc3, |
| 306 | .dev = { |
| 307 | .coherent_dma_mask = 0xffffffff, |
| 308 | }, |
| 309 | }; |
| 310 | |
| 311 | struct platform_device msm_device_sdc4 = { |
| 312 | .name = "msm_sdcc", |
| 313 | .id = 4, |
| 314 | .num_resources = ARRAY_SIZE(resources_sdc4), |
| 315 | .resource = resources_sdc4, |
| 316 | .dev = { |
| 317 | .coherent_dma_mask = 0xffffffff, |
| 318 | }, |
| 319 | }; |
San Mehat | 5d4f77f | 2008-11-10 16:30:27 -0800 | [diff] [blame] | 320 | |
| 321 | static struct platform_device *msm_sdcc_devices[] __initdata = { |
| 322 | &msm_device_sdc1, |
| 323 | &msm_device_sdc2, |
| 324 | &msm_device_sdc3, |
| 325 | &msm_device_sdc4, |
| 326 | }; |
| 327 | |
Sahitya Tummala | b5d643d | 2010-07-29 16:55:34 +0530 | [diff] [blame] | 328 | int __init msm_add_sdcc(unsigned int controller, |
| 329 | struct msm_mmc_platform_data *plat, |
Dima Zavin | 830d843 | 2009-05-22 20:21:50 -0700 | [diff] [blame] | 330 | unsigned int stat_irq, unsigned long stat_irq_flags) |
San Mehat | 5d4f77f | 2008-11-10 16:30:27 -0800 | [diff] [blame] | 331 | { |
| 332 | struct platform_device *pdev; |
Dima Zavin | 830d843 | 2009-05-22 20:21:50 -0700 | [diff] [blame] | 333 | struct resource *res; |
San Mehat | 5d4f77f | 2008-11-10 16:30:27 -0800 | [diff] [blame] | 334 | |
| 335 | if (controller < 1 || controller > 4) |
| 336 | return -EINVAL; |
| 337 | |
| 338 | pdev = msm_sdcc_devices[controller-1]; |
| 339 | pdev->dev.platform_data = plat; |
Dima Zavin | 830d843 | 2009-05-22 20:21:50 -0700 | [diff] [blame] | 340 | |
| 341 | res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq"); |
| 342 | if (!res) |
| 343 | return -EINVAL; |
| 344 | else if (stat_irq) { |
| 345 | res->start = res->end = stat_irq; |
| 346 | res->flags &= ~IORESOURCE_DISABLED; |
| 347 | res->flags |= stat_irq_flags; |
| 348 | } |
| 349 | |
San Mehat | 5d4f77f | 2008-11-10 16:30:27 -0800 | [diff] [blame] | 350 | return platform_device_register(pdev); |
| 351 | } |
| 352 | |
Daniel Walker | 50bc0ef | 2010-12-13 14:35:11 -0800 | [diff] [blame] | 353 | static struct resource resources_mddi0[] = { |
| 354 | { |
| 355 | .start = MSM_PMDH_PHYS, |
| 356 | .end = MSM_PMDH_PHYS + MSM_PMDH_SIZE - 1, |
| 357 | .flags = IORESOURCE_MEM, |
| 358 | }, |
| 359 | { |
| 360 | .start = INT_MDDI_PRI, |
| 361 | .end = INT_MDDI_PRI, |
| 362 | .flags = IORESOURCE_IRQ, |
| 363 | }, |
| 364 | }; |
| 365 | |
| 366 | static struct resource resources_mddi1[] = { |
| 367 | { |
| 368 | .start = MSM_EMDH_PHYS, |
| 369 | .end = MSM_EMDH_PHYS + MSM_EMDH_SIZE - 1, |
| 370 | .flags = IORESOURCE_MEM, |
| 371 | }, |
| 372 | { |
| 373 | .start = INT_MDDI_EXT, |
| 374 | .end = INT_MDDI_EXT, |
| 375 | .flags = IORESOURCE_IRQ, |
| 376 | }, |
| 377 | }; |
| 378 | |
| 379 | struct platform_device msm_device_mddi0 = { |
| 380 | .name = "msm_mddi", |
| 381 | .id = 0, |
| 382 | .num_resources = ARRAY_SIZE(resources_mddi0), |
| 383 | .resource = resources_mddi0, |
| 384 | .dev = { |
| 385 | .coherent_dma_mask = 0xffffffff, |
| 386 | }, |
| 387 | }; |
| 388 | |
| 389 | struct platform_device msm_device_mddi1 = { |
| 390 | .name = "msm_mddi", |
| 391 | .id = 1, |
| 392 | .num_resources = ARRAY_SIZE(resources_mddi1), |
| 393 | .resource = resources_mddi1, |
| 394 | .dev = { |
| 395 | .coherent_dma_mask = 0xffffffff, |
| 396 | }, |
| 397 | }; |
| 398 | |
| 399 | static struct resource resources_mdp[] = { |
| 400 | { |
| 401 | .start = MSM_MDP_PHYS, |
| 402 | .end = MSM_MDP_PHYS + MSM_MDP_SIZE - 1, |
| 403 | .name = "mdp", |
| 404 | .flags = IORESOURCE_MEM |
| 405 | }, |
| 406 | { |
| 407 | .start = INT_MDP, |
| 408 | .end = INT_MDP, |
| 409 | .flags = IORESOURCE_IRQ, |
| 410 | }, |
| 411 | }; |
| 412 | |
| 413 | struct platform_device msm_device_mdp = { |
| 414 | .name = "msm_mdp", |
| 415 | .id = 0, |
| 416 | .num_resources = ARRAY_SIZE(resources_mdp), |
| 417 | .resource = resources_mdp, |
| 418 | }; |
| 419 | |
Daniel Walker | 5e96da5 | 2010-05-12 13:43:28 -0700 | [diff] [blame] | 420 | struct clk msm_clocks_7x01a[] = { |
| 421 | CLK_PCOM("adm_clk", ADM_CLK, NULL, 0), |
| 422 | CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0), |
| 423 | CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, 0), |
| 424 | CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0), |
| 425 | CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0), |
| 426 | CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF), |
| 427 | CLK_PCOM("gp_clk", GP_CLK, NULL, 0), |
| 428 | CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, OFF), |
| 429 | CLK_PCOM("i2c_clk", I2C_CLK, &msm_device_i2c.dev, 0), |
| 430 | CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0), |
| 431 | CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0), |
| 432 | CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF), |
| 433 | CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0), |
| 434 | CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF), |
| 435 | CLK_PCOM("pbus_clk", PBUS_CLK, NULL, 0), |
| 436 | CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0), |
Daniel Walker | 304a09c | 2010-12-13 14:35:09 -0800 | [diff] [blame] | 437 | CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX), |
Daniel Walker | 5e96da5 | 2010-05-12 13:43:28 -0700 | [diff] [blame] | 438 | CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF), |
| 439 | CLK_PCOM("sdc_clk", SDC1_CLK, &msm_device_sdc1.dev, OFF), |
| 440 | CLK_PCOM("sdc_pclk", SDC1_P_CLK, &msm_device_sdc1.dev, OFF), |
| 441 | CLK_PCOM("sdc_clk", SDC2_CLK, &msm_device_sdc2.dev, OFF), |
| 442 | CLK_PCOM("sdc_pclk", SDC2_P_CLK, &msm_device_sdc2.dev, OFF), |
| 443 | CLK_PCOM("sdc_clk", SDC3_CLK, &msm_device_sdc3.dev, OFF), |
| 444 | CLK_PCOM("sdc_pclk", SDC3_P_CLK, &msm_device_sdc3.dev, OFF), |
| 445 | CLK_PCOM("sdc_clk", SDC4_CLK, &msm_device_sdc4.dev, OFF), |
| 446 | CLK_PCOM("sdc_pclk", SDC4_P_CLK, &msm_device_sdc4.dev, OFF), |
| 447 | CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0), |
| 448 | CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0), |
| 449 | CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0), |
| 450 | CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0), |
| 451 | CLK_PCOM("uart_clk", UART1_CLK, &msm_device_uart1.dev, OFF), |
| 452 | CLK_PCOM("uart_clk", UART2_CLK, &msm_device_uart2.dev, 0), |
| 453 | CLK_PCOM("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF), |
| 454 | CLK_PCOM("uart1dm_clk", UART1DM_CLK, NULL, OFF), |
| 455 | CLK_PCOM("uart2dm_clk", UART2DM_CLK, NULL, 0), |
| 456 | CLK_PCOM("usb_hs_clk", USB_HS_CLK, &msm_device_hsusb.dev, OFF), |
| 457 | CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, &msm_device_hsusb.dev, OFF), |
| 458 | CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0), |
| 459 | CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF ), |
| 460 | CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF), |
| 461 | CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF), |
| 462 | }; |
| 463 | |
| 464 | unsigned msm_num_clocks_7x01a = ARRAY_SIZE(msm_clocks_7x01a); |