Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef _M68K_PGTABLE_H |
| 2 | #define _M68K_PGTABLE_H |
| 3 | |
| 4 | #include <asm-generic/4level-fixup.h> |
| 5 | |
| 6 | #include <linux/config.h> |
| 7 | #include <asm/setup.h> |
| 8 | |
| 9 | #ifndef __ASSEMBLY__ |
| 10 | #include <asm/processor.h> |
| 11 | #include <linux/sched.h> |
| 12 | #include <linux/threads.h> |
| 13 | |
| 14 | /* |
| 15 | * This file contains the functions and defines necessary to modify and use |
| 16 | * the m68k page table tree. |
| 17 | */ |
| 18 | |
| 19 | #include <asm/virtconvert.h> |
| 20 | |
| 21 | /* Certain architectures need to do special things when pte's |
| 22 | * within a page table are directly modified. Thus, the following |
| 23 | * hook is made available. |
| 24 | */ |
| 25 | #define set_pte(pteptr, pteval) \ |
| 26 | do{ \ |
| 27 | *(pteptr) = (pteval); \ |
| 28 | } while(0) |
| 29 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) |
| 30 | |
| 31 | |
| 32 | /* PMD_SHIFT determines the size of the area a second-level page table can map */ |
| 33 | #ifdef CONFIG_SUN3 |
| 34 | #define PMD_SHIFT 17 |
| 35 | #else |
| 36 | #define PMD_SHIFT 22 |
| 37 | #endif |
| 38 | #define PMD_SIZE (1UL << PMD_SHIFT) |
| 39 | #define PMD_MASK (~(PMD_SIZE-1)) |
| 40 | |
| 41 | /* PGDIR_SHIFT determines what a third-level page table entry can map */ |
| 42 | #ifdef CONFIG_SUN3 |
| 43 | #define PGDIR_SHIFT 17 |
| 44 | #else |
| 45 | #define PGDIR_SHIFT 25 |
| 46 | #endif |
| 47 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) |
| 48 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) |
| 49 | |
| 50 | /* |
| 51 | * entries per page directory level: the m68k is configured as three-level, |
| 52 | * so we do have PMD level physically. |
| 53 | */ |
| 54 | #ifdef CONFIG_SUN3 |
| 55 | #define PTRS_PER_PTE 16 |
| 56 | #define PTRS_PER_PMD 1 |
| 57 | #define PTRS_PER_PGD 2048 |
| 58 | #else |
| 59 | #define PTRS_PER_PTE 1024 |
| 60 | #define PTRS_PER_PMD 8 |
| 61 | #define PTRS_PER_PGD 128 |
| 62 | #endif |
| 63 | #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) |
Hugh Dickins | d455a36 | 2005-04-19 13:29:23 -0700 | [diff] [blame^] | 64 | #define FIRST_USER_ADDRESS 0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | |
| 66 | /* Virtual address region for use by kernel_map() */ |
| 67 | #ifdef CONFIG_SUN3 |
| 68 | #define KMAP_START 0x0DC00000 |
| 69 | #define KMAP_END 0x0E000000 |
| 70 | #else |
| 71 | #define KMAP_START 0xd0000000 |
| 72 | #define KMAP_END 0xf0000000 |
| 73 | #endif |
| 74 | |
| 75 | #ifndef CONFIG_SUN3 |
| 76 | /* Just any arbitrary offset to the start of the vmalloc VM area: the |
| 77 | * current 8MB value just means that there will be a 8MB "hole" after the |
| 78 | * physical memory until the kernel virtual memory starts. That means that |
| 79 | * any out-of-bounds memory accesses will hopefully be caught. |
| 80 | * The vmalloc() routines leaves a hole of 4kB between each vmalloced |
| 81 | * area for the same reason. ;) |
| 82 | */ |
| 83 | #define VMALLOC_OFFSET (8*1024*1024) |
| 84 | #define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) |
| 85 | #define VMALLOC_END KMAP_START |
| 86 | #else |
| 87 | extern unsigned long vmalloc_end; |
| 88 | #define VMALLOC_START 0x0f800000 |
| 89 | #define VMALLOC_END vmalloc_end |
| 90 | #endif /* CONFIG_SUN3 */ |
| 91 | |
| 92 | /* zero page used for uninitialized stuff */ |
| 93 | extern void *empty_zero_page; |
| 94 | |
| 95 | /* |
| 96 | * ZERO_PAGE is a global shared page that is always zero: used |
| 97 | * for zero-mapped memory areas etc.. |
| 98 | */ |
| 99 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) |
| 100 | |
| 101 | /* number of bits that fit into a memory pointer */ |
| 102 | #define BITS_PER_PTR (8*sizeof(unsigned long)) |
| 103 | |
| 104 | /* to align the pointer to a pointer address */ |
| 105 | #define PTR_MASK (~(sizeof(void*)-1)) |
| 106 | |
| 107 | /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */ |
| 108 | /* 64-bit machines, beware! SRB. */ |
| 109 | #define SIZEOF_PTR_LOG2 2 |
| 110 | |
| 111 | /* |
| 112 | * Check if the addr/len goes up to the end of a physical |
| 113 | * memory chunk. Used for DMA functions. |
| 114 | */ |
| 115 | #ifdef CONFIG_SINGLE_MEMORY_CHUNK |
| 116 | /* |
| 117 | * It makes no sense to consider whether we cross a memory boundary if |
| 118 | * we support just one physical chunk of memory. |
| 119 | */ |
| 120 | static inline int mm_end_of_chunk(unsigned long addr, int len) |
| 121 | { |
| 122 | return 0; |
| 123 | } |
| 124 | #else |
| 125 | int mm_end_of_chunk (unsigned long addr, int len); |
| 126 | #endif |
| 127 | |
| 128 | extern void kernel_set_cachemode(void *addr, unsigned long size, int cmode); |
| 129 | |
| 130 | /* |
| 131 | * The m68k doesn't have any external MMU info: the kernel page |
| 132 | * tables contain all the necessary information. The Sun3 does, but |
| 133 | * they are updated on demand. |
| 134 | */ |
| 135 | static inline void update_mmu_cache(struct vm_area_struct *vma, |
| 136 | unsigned long address, pte_t pte) |
| 137 | { |
| 138 | } |
| 139 | |
| 140 | #endif /* !__ASSEMBLY__ */ |
| 141 | |
| 142 | #define kern_addr_valid(addr) (1) |
| 143 | |
| 144 | #define io_remap_page_range(vma, vaddr, paddr, size, prot) \ |
| 145 | remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot) |
| 146 | |
| 147 | #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ |
| 148 | remap_pfn_range(vma, vaddr, pfn, size, prot) |
| 149 | |
| 150 | #define MK_IOSPACE_PFN(space, pfn) (pfn) |
| 151 | #define GET_IOSPACE(pfn) 0 |
| 152 | #define GET_PFN(pfn) (pfn) |
| 153 | |
| 154 | /* MMU-specific headers */ |
| 155 | |
| 156 | #ifdef CONFIG_SUN3 |
| 157 | #include <asm/sun3_pgtable.h> |
| 158 | #else |
| 159 | #include <asm/motorola_pgtable.h> |
| 160 | #endif |
| 161 | |
| 162 | #ifndef __ASSEMBLY__ |
| 163 | #include <asm-generic/pgtable.h> |
| 164 | |
| 165 | /* |
| 166 | * Macro to mark a page protection value as "uncacheable". |
| 167 | */ |
| 168 | #ifdef SUN3_PAGE_NOCACHE |
| 169 | # define __SUN3_PAGE_NOCACHE SUN3_PAGE_NOCACHE |
| 170 | #else |
| 171 | # define __SUN3_PAGE_NOCACHE 0 |
| 172 | #endif |
| 173 | #define pgprot_noncached(prot) \ |
| 174 | (MMU_IS_SUN3 \ |
| 175 | ? (__pgprot(pgprot_val(prot) | __SUN3_PAGE_NOCACHE)) \ |
| 176 | : ((MMU_IS_851 || MMU_IS_030) \ |
| 177 | ? (__pgprot(pgprot_val(prot) | _PAGE_NOCACHE030)) \ |
| 178 | : (MMU_IS_040 || MMU_IS_060) \ |
| 179 | ? (__pgprot((pgprot_val(prot) & _CACHEMASK040) | _PAGE_NOCACHE_S)) \ |
| 180 | : (prot))) |
| 181 | |
| 182 | #endif /* !__ASSEMBLY__ */ |
| 183 | |
| 184 | /* |
| 185 | * No page table caches to initialise |
| 186 | */ |
| 187 | #define pgtable_cache_init() do { } while (0) |
| 188 | |
| 189 | #define check_pgt_cache() do { } while (0) |
| 190 | |
| 191 | #endif /* _M68K_PGTABLE_H */ |