Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 13 | #include <linux/sort.h> |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 14 | #include <drm/drm_mode.h> |
| 15 | #include <drm/drm_crtc.h> |
| 16 | #include <drm/drm_crtc_helper.h> |
| 17 | #include <drm/drm_flip_work.h> |
| 18 | |
| 19 | #include "sde_kms.h" |
| 20 | #include "sde_hw_lm.h" |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 21 | #include "sde_hw_mdp_ctl.h" |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 22 | #include "sde_crtc.h" |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 23 | |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 24 | #define CTL(i) (CTL_0 + (i)) |
| 25 | #define LM(i) (LM_0 + (i)) |
| 26 | #define INTF(i) (INTF_0 + (i)) |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 27 | |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 28 | /* uncomment to enable higher level IRQ msg's */ |
| 29 | /*#define DBG_IRQ DBG*/ |
| 30 | #define DBG_IRQ(fmt, ...) |
| 31 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 32 | static struct sde_kms *get_kms(struct drm_crtc *crtc) |
| 33 | { |
| 34 | struct msm_drm_private *priv = crtc->dev->dev_private; |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 35 | |
Ben Chan | 78647cd | 2016-06-26 22:02:47 -0400 | [diff] [blame] | 36 | return to_sde_kms(priv->kms); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 37 | } |
| 38 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 39 | static int sde_crtc_reserve_hw_resources(struct drm_crtc *crtc, |
| 40 | struct drm_encoder *encoder) |
| 41 | { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 42 | struct sde_crtc *sde_crtc = to_sde_crtc(crtc); |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 43 | struct sde_kms *sde_kms = get_kms(crtc); |
| 44 | struct sde_encoder_hw_resources enc_hw_res; |
| 45 | const struct sde_hw_res_map *plat_hw_res_map; |
| 46 | enum sde_lm unused_lm_id[CRTC_DUAL_MIXERS] = {0}; |
| 47 | enum sde_lm lm_idx; |
| 48 | int i, count = 0; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 49 | |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 50 | if (!sde_kms) { |
| 51 | DBG("[%s] invalid kms", __func__); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 52 | return -EINVAL; |
| 53 | } |
| 54 | |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 55 | if (!sde_kms->mmio) |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 56 | return -EINVAL; |
| 57 | |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 58 | /* Get unused LMs */ |
| 59 | for (i = 0; i < sde_kms->catalog->mixer_count; i++) { |
| 60 | if (!sde_rm_get_mixer(sde_kms, LM(i))) { |
| 61 | unused_lm_id[count++] = LM(i); |
| 62 | if (count == CRTC_DUAL_MIXERS) |
| 63 | break; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 64 | } |
| 65 | } |
| 66 | |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 67 | /* query encoder resources */ |
| 68 | sde_encoder_get_hw_resources(sde_crtc->encoder, &enc_hw_res); |
| 69 | |
| 70 | /* parse encoder hw resources, find CTL paths */ |
| 71 | for (i = CTL_0; i <= sde_kms->catalog->ctl_count; i++) { |
| 72 | WARN_ON(sde_crtc->num_ctls > CRTC_DUAL_MIXERS); |
| 73 | if (enc_hw_res.ctls[i]) { |
| 74 | struct sde_crtc_mixer *mixer = |
| 75 | &sde_crtc->mixer[sde_crtc->num_ctls]; |
| 76 | mixer->hw_ctl = sde_rm_get_ctl_path(sde_kms, i); |
| 77 | if (IS_ERR_OR_NULL(mixer->hw_ctl)) { |
| 78 | DBG("[%s], Invalid ctl_path", __func__); |
| 79 | return -EACCES; |
| 80 | } |
| 81 | sde_crtc->num_ctls++; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 82 | } |
| 83 | } |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 84 | |
| 85 | /* shortcut this process if encoder has no ctl paths */ |
| 86 | if (!sde_crtc->num_ctls) |
| 87 | return 0; |
| 88 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 89 | /* |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 90 | * Get default LMs if specified in platform config |
| 91 | * other wise acquire the free LMs |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 92 | */ |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 93 | for (i = INTF_0; i <= sde_kms->catalog->intf_count; i++) { |
| 94 | if (enc_hw_res.intfs[i]) { |
| 95 | struct sde_crtc_mixer *mixer = |
| 96 | &sde_crtc->mixer[sde_crtc->num_mixers]; |
| 97 | plat_hw_res_map = sde_rm_get_res_map(sde_kms, i); |
| 98 | |
| 99 | lm_idx = plat_hw_res_map->lm; |
| 100 | if (!lm_idx) |
| 101 | lm_idx = unused_lm_id[sde_crtc->num_mixers]; |
| 102 | |
| 103 | DBG("Acquiring LM %d", lm_idx); |
| 104 | mixer->hw_lm = sde_rm_acquire_mixer(sde_kms, lm_idx); |
| 105 | if (IS_ERR_OR_NULL(mixer->hw_lm)) { |
| 106 | DBG("[%s], Invalid mixer", __func__); |
| 107 | return -EACCES; |
| 108 | } |
| 109 | /* interface info */ |
| 110 | mixer->intf_idx = i; |
| 111 | mixer->mode = enc_hw_res.intfs[i]; |
| 112 | sde_crtc->num_mixers++; |
| 113 | } |
| 114 | } |
| 115 | |
| 116 | DBG("control paths %d, num_mixers %d, lm[0] %d, ctl[0] %d ", |
| 117 | sde_crtc->num_ctls, sde_crtc->num_mixers, |
| 118 | sde_crtc->mixer[0].hw_lm->idx, |
| 119 | sde_crtc->mixer[0].hw_ctl->idx); |
| 120 | if (sde_crtc->num_mixers == CRTC_DUAL_MIXERS) |
| 121 | DBG("lm[1] %d, ctl[1], %d", |
| 122 | sde_crtc->mixer[1].hw_lm->idx, |
| 123 | sde_crtc->mixer[1].hw_ctl->idx); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 124 | return 0; |
| 125 | } |
| 126 | |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 127 | static void sde_crtc_destroy(struct drm_crtc *crtc) |
| 128 | { |
| 129 | struct sde_crtc *sde_crtc = to_sde_crtc(crtc); |
| 130 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 131 | DBG(""); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 132 | drm_crtc_cleanup(crtc); |
| 133 | kfree(sde_crtc); |
| 134 | } |
| 135 | |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 136 | static bool sde_crtc_mode_fixup(struct drm_crtc *crtc, |
| 137 | const struct drm_display_mode *mode, |
| 138 | struct drm_display_mode *adjusted_mode) |
| 139 | { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 140 | DBG(""); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 141 | return true; |
| 142 | } |
| 143 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 144 | static void sde_crtc_mode_set_nofb(struct drm_crtc *crtc) |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 145 | { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 146 | struct sde_crtc *sde_crtc = to_sde_crtc(crtc); |
| 147 | struct sde_crtc_mixer *mixer = sde_crtc->mixer; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 148 | struct sde_hw_mixer *lm; |
| 149 | unsigned long flags; |
| 150 | struct drm_display_mode *mode; |
| 151 | struct sde_hw_mixer_cfg cfg; |
| 152 | u32 mixer_width; |
| 153 | int i; |
| 154 | int rc; |
| 155 | |
| 156 | DBG(""); |
| 157 | if (WARN_ON(!crtc->state)) |
| 158 | return; |
| 159 | |
| 160 | mode = &crtc->state->adjusted_mode; |
| 161 | |
Abhijit Kulkarni | 71002ba | 2016-06-24 18:36:28 -0400 | [diff] [blame] | 162 | drm_mode_debug_printmodeline(mode); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 163 | |
| 164 | /* |
| 165 | * reserve mixer(s) if not already avaialable |
| 166 | * if dual mode, mixer_width = half mode width |
| 167 | * program mode configuration on mixer(s) |
| 168 | */ |
| 169 | if ((sde_crtc->num_ctls == 0) || |
| 170 | (sde_crtc->num_mixers == 0)) { |
| 171 | rc = sde_crtc_reserve_hw_resources(crtc, sde_crtc->encoder); |
| 172 | if (rc) { |
Lloyd Atkinson | d49de56 | 2016-05-30 13:23:48 -0400 | [diff] [blame^] | 173 | DRM_ERROR("error reserving HW resource for CRTC\n"); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 174 | return; |
| 175 | } |
| 176 | } |
| 177 | |
| 178 | if (sde_crtc->num_mixers == CRTC_DUAL_MIXERS) |
| 179 | mixer_width = mode->hdisplay >> 1; |
| 180 | else |
| 181 | mixer_width = mode->hdisplay; |
| 182 | |
| 183 | spin_lock_irqsave(&sde_crtc->lm_lock, flags); |
| 184 | |
| 185 | for (i = 0; i < sde_crtc->num_mixers; i++) { |
| 186 | lm = mixer[i].hw_lm; |
| 187 | cfg.out_width = mixer_width; |
| 188 | cfg.out_height = mode->vdisplay; |
| 189 | cfg.right_mixer = (i == 0) ? false : true; |
| 190 | cfg.flags = 0; |
| 191 | lm->ops.setup_mixer_out(lm, &cfg); |
| 192 | } |
| 193 | |
| 194 | spin_unlock_irqrestore(&sde_crtc->lm_lock, flags); |
| 195 | } |
| 196 | |
| 197 | static void sde_crtc_get_blend_cfg(struct sde_hw_blend_cfg *cfg, |
| 198 | struct sde_plane_state *pstate) |
| 199 | { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 200 | struct drm_plane *plane; |
Lloyd Atkinson | e5c2c0b | 2016-07-05 12:23:29 -0400 | [diff] [blame] | 201 | const struct mdp_format *format; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 202 | |
| 203 | format = to_mdp_format( |
| 204 | msm_framebuffer_format(pstate->base.fb)); |
| 205 | plane = pstate->base.plane; |
| 206 | |
Abhijit Kulkarni | 71002ba | 2016-06-24 18:36:28 -0400 | [diff] [blame] | 207 | memset(cfg, 0, sizeof(*cfg)); |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 208 | cfg->fg.const_alpha = pstate->property_values[PLANE_PROP_ALPHA]; |
| 209 | cfg->bg.const_alpha = 0xFF - cfg->fg.const_alpha; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 210 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 211 | if (format->alpha_enable && |
| 212 | pstate->property_values[PLANE_PROP_PREMULTIPLIED]) { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 213 | cfg->fg.alpha_sel = ALPHA_FG_CONST; |
| 214 | cfg->bg.alpha_sel = ALPHA_FG_PIXEL; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 215 | if (pstate->property_values[PLANE_PROP_ALPHA] != 0xff) { |
| 216 | cfg->bg.const_alpha = |
| 217 | (u32)pstate->property_values[PLANE_PROP_ALPHA]; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 218 | cfg->bg.inv_alpha_sel = 1; |
| 219 | cfg->bg.mod_alpha = 1; |
| 220 | } else { |
| 221 | cfg->bg.inv_mode_alpha = 1; |
| 222 | } |
| 223 | } else if (format->alpha_enable) { |
| 224 | cfg->fg.alpha_sel = ALPHA_FG_PIXEL; |
| 225 | cfg->bg.alpha_sel = ALPHA_FG_PIXEL; |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 226 | if (pstate->property_values[PLANE_PROP_ALPHA] != 0xff) { |
| 227 | cfg->bg.const_alpha = |
| 228 | (u32)pstate->property_values[PLANE_PROP_ALPHA]; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 229 | cfg->fg.mod_alpha = 1; |
| 230 | cfg->bg.inv_alpha_sel = 1; |
| 231 | cfg->bg.mod_alpha = 1; |
| 232 | cfg->bg.inv_mode_alpha = 1; |
| 233 | } else { |
| 234 | cfg->bg.inv_mode_alpha = 1; |
| 235 | } |
Abhijit Kulkarni | 71002ba | 2016-06-24 18:36:28 -0400 | [diff] [blame] | 236 | } else { |
| 237 | /* opaque blending */ |
| 238 | cfg->fg.alpha_sel = ALPHA_FG_CONST; |
| 239 | cfg->bg.alpha_sel = ALPHA_BG_CONST; |
| 240 | cfg->bg.inv_alpha_sel = 1; |
| 241 | cfg->fg.const_alpha = 0xFF; |
| 242 | cfg->bg.const_alpha = 0x00; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 243 | } |
Lloyd Atkinson | e5c2c0b | 2016-07-05 12:23:29 -0400 | [diff] [blame] | 244 | |
| 245 | DBG("format 0x%x, alpha_enable %u premultiplied %llu", |
| 246 | format->base.pixel_format, format->alpha_enable, |
| 247 | pstate->property_values[PLANE_PROP_PREMULTIPLIED]); |
| 248 | DBG("fg alpha config %d %d %d %d %d", |
| 249 | cfg->fg.alpha_sel, cfg->fg.const_alpha, cfg->fg.mod_alpha, |
| 250 | cfg->fg.inv_alpha_sel, cfg->fg.inv_mode_alpha); |
| 251 | DBG("bg alpha config %d %d %d %d %d", |
| 252 | cfg->bg.alpha_sel, cfg->bg.const_alpha, cfg->bg.mod_alpha, |
| 253 | cfg->bg.inv_alpha_sel, cfg->bg.inv_mode_alpha); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 254 | } |
| 255 | |
| 256 | static void blend_setup(struct drm_crtc *crtc) |
| 257 | { |
| 258 | struct sde_crtc *sde_crtc = to_sde_crtc(crtc); |
| 259 | struct sde_crtc_mixer *mixer = sde_crtc->mixer; |
| 260 | struct drm_plane *plane; |
Abhijit Kulkarni | 71002ba | 2016-06-24 18:36:28 -0400 | [diff] [blame] | 261 | struct sde_plane_state *pstate; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 262 | struct sde_hw_stage_cfg stage_cfg; |
| 263 | struct sde_hw_blend_cfg blend; |
| 264 | struct sde_hw_ctl *ctl; |
| 265 | struct sde_hw_mixer *lm; |
Abhijit Kulkarni | 71002ba | 2016-06-24 18:36:28 -0400 | [diff] [blame] | 266 | struct sde_hw_color3_cfg alpha_out; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 267 | u32 flush_mask = 0; |
| 268 | unsigned long flags; |
Abhijit Kulkarni | 71002ba | 2016-06-24 18:36:28 -0400 | [diff] [blame] | 269 | int i, plane_cnt = 0; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 270 | |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 271 | DBG(""); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 272 | spin_lock_irqsave(&sde_crtc->lm_lock, flags); |
| 273 | |
| 274 | /* ctl could be reserved already */ |
| 275 | if (!sde_crtc->num_ctls) |
| 276 | goto out; |
| 277 | |
| 278 | /* initialize stage cfg */ |
| 279 | memset(&stage_cfg, 0, sizeof(stage_cfg)); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 280 | |
Abhijit Kulkarni | 71002ba | 2016-06-24 18:36:28 -0400 | [diff] [blame] | 281 | for (i = 0; i < sde_crtc->num_mixers; i++) { |
| 282 | if ((!mixer[i].hw_lm) || (!mixer[i].hw_ctl)) |
| 283 | continue; |
| 284 | |
| 285 | ctl = mixer[i].hw_ctl; |
| 286 | lm = mixer[i].hw_lm; |
| 287 | memset(&alpha_out, 0, sizeof(alpha_out)); |
| 288 | |
| 289 | drm_atomic_crtc_for_each_plane(plane, crtc) { |
| 290 | pstate = to_sde_plane_state(plane->state); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 291 | stage_cfg.stage[pstate->stage][i] = |
| 292 | sde_plane_pipe(plane); |
Abhijit Kulkarni | 71002ba | 2016-06-24 18:36:28 -0400 | [diff] [blame] | 293 | DBG(" crtc_id %d, layer %d, at stage %d\n", |
| 294 | sde_crtc->id, |
| 295 | sde_plane_pipe(plane), |
| 296 | pstate->stage); |
| 297 | plane_cnt++; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 298 | |
| 299 | /* Cache the flushmask for this layer |
| 300 | * sourcesplit is always enabled, so this layer will |
| 301 | * be staged on both the mixers |
| 302 | */ |
| 303 | ctl = mixer[i].hw_ctl; |
| 304 | ctl->ops.get_bitmask_sspp(ctl, &flush_mask, |
| 305 | sde_plane_pipe(plane)); |
Abhijit Kulkarni | 71002ba | 2016-06-24 18:36:28 -0400 | [diff] [blame] | 306 | |
| 307 | /* blend config */ |
| 308 | sde_crtc_get_blend_cfg(&blend, pstate); |
| 309 | lm->ops.setup_blend_config(lm, pstate->stage, &blend); |
| 310 | alpha_out.keep_fg[pstate->stage] = 1; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 311 | } |
Abhijit Kulkarni | 71002ba | 2016-06-24 18:36:28 -0400 | [diff] [blame] | 312 | lm->ops.setup_alpha_out(lm, &alpha_out); |
| 313 | |
| 314 | /* stage config flush mask */ |
| 315 | mixer[i].flush_mask = flush_mask; |
| 316 | /* get the flush mask for mixer */ |
| 317 | ctl->ops.get_bitmask_mixer(ctl, &mixer[i].flush_mask, |
| 318 | mixer[i].hw_lm->idx); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 319 | } |
| 320 | |
| 321 | /* |
| 322 | * If there is no base layer, enable border color. |
| 323 | * currently border color is always black |
| 324 | */ |
Lloyd Atkinson | e5c2c0b | 2016-07-05 12:23:29 -0400 | [diff] [blame] | 325 | if ((stage_cfg.stage[SDE_STAGE_BASE][0] == SSPP_NONE) && plane_cnt) { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 326 | stage_cfg.border_enable = 1; |
Lloyd Atkinson | e5c2c0b | 2016-07-05 12:23:29 -0400 | [diff] [blame] | 327 | DBG("Border Color is enabled"); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 328 | } |
| 329 | |
Abhijit Kulkarni | 71002ba | 2016-06-24 18:36:28 -0400 | [diff] [blame] | 330 | /* Program ctl_paths */ |
| 331 | for (i = 0; i < sde_crtc->num_ctls; i++) { |
| 332 | if ((!mixer[i].hw_lm) || (!mixer[i].hw_ctl)) |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 333 | continue; |
| 334 | |
| 335 | ctl = mixer[i].hw_ctl; |
| 336 | lm = mixer[i].hw_lm; |
| 337 | |
| 338 | /* stage config */ |
| 339 | ctl->ops.setup_blendstage(ctl, mixer[i].hw_lm->idx, |
| 340 | &stage_cfg); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 341 | } |
| 342 | out: |
| 343 | spin_unlock_irqrestore(&sde_crtc->lm_lock, flags); |
| 344 | } |
| 345 | |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 346 | /* if file!=NULL, this is preclose potential cancel-flip path */ |
| 347 | static void complete_flip(struct drm_crtc *crtc, struct drm_file *file) |
| 348 | { |
| 349 | struct sde_crtc *sde_crtc = to_sde_crtc(crtc); |
| 350 | struct drm_device *dev = crtc->dev; |
| 351 | struct drm_pending_vblank_event *event; |
| 352 | unsigned long flags; |
| 353 | |
| 354 | spin_lock_irqsave(&dev->event_lock, flags); |
| 355 | event = sde_crtc->event; |
| 356 | if (event) { |
| 357 | /* if regular vblank case (!file) or if cancel-flip from |
| 358 | * preclose on file that requested flip, then send the |
| 359 | * event: |
| 360 | */ |
| 361 | if (!file || (event->base.file_priv == file)) { |
| 362 | sde_crtc->event = NULL; |
| 363 | DBG("%s: send event: %pK", sde_crtc->name, event); |
| 364 | drm_send_vblank_event(dev, sde_crtc->id, event); |
| 365 | } |
| 366 | } |
| 367 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 368 | } |
| 369 | |
| 370 | static void sde_crtc_vblank_cb(void *data) |
| 371 | { |
| 372 | struct drm_crtc *crtc = (struct drm_crtc *)data; |
| 373 | struct sde_crtc *sde_crtc = to_sde_crtc(crtc); |
Abhijit Kulkarni | 7acb326 | 2016-07-05 15:27:25 -0400 | [diff] [blame] | 374 | struct sde_kms *sde_kms = get_kms(crtc); |
| 375 | struct drm_device *dev = sde_kms->dev; |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 376 | unsigned int pending; |
| 377 | |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 378 | pending = atomic_xchg(&sde_crtc->pending, 0); |
| 379 | |
| 380 | if (pending & PENDING_FLIP) |
| 381 | complete_flip(crtc, NULL); |
Abhijit Kulkarni | 7acb326 | 2016-07-05 15:27:25 -0400 | [diff] [blame] | 382 | |
Lloyd Atkinson | e5c2c0b | 2016-07-05 12:23:29 -0400 | [diff] [blame] | 383 | if (sde_crtc->drm_requested_vblank) { |
Abhijit Kulkarni | 7acb326 | 2016-07-05 15:27:25 -0400 | [diff] [blame] | 384 | drm_handle_vblank(dev, sde_crtc->id); |
Clarence Ip | 4ce5932 | 2016-06-26 22:27:51 -0400 | [diff] [blame] | 385 | DBG_IRQ(""); |
Abhijit Kulkarni | 7acb326 | 2016-07-05 15:27:25 -0400 | [diff] [blame] | 386 | } |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 387 | } |
| 388 | |
Abhijit Kulkarni | 7acb326 | 2016-07-05 15:27:25 -0400 | [diff] [blame] | 389 | static bool frame_flushed(struct sde_crtc *sde_crtc) |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 390 | { |
| 391 | struct vsync_info vsync; |
| 392 | |
Lloyd Atkinson | e5c2c0b | 2016-07-05 12:23:29 -0400 | [diff] [blame] | 393 | /* |
| 394 | * encoder get vsync_info |
| 395 | * if frame_count does not match |
| 396 | * frame is flushed |
| 397 | */ |
| 398 | sde_encoder_get_vblank_status(sde_crtc->encoder, &vsync); |
| 399 | |
Abhijit Kulkarni | 7acb326 | 2016-07-05 15:27:25 -0400 | [diff] [blame] | 400 | return (vsync.frame_count != sde_crtc->vsync_count) ? true : false; |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 401 | } |
| 402 | |
| 403 | void sde_crtc_wait_for_commit_done(struct drm_crtc *crtc) |
| 404 | { |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 405 | struct sde_crtc *sde_crtc = to_sde_crtc(crtc); |
Abhijit Kulkarni | 7acb326 | 2016-07-05 15:27:25 -0400 | [diff] [blame] | 406 | struct drm_device *dev = crtc->dev; |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 407 | int i, ret; |
| 408 | |
Abhijit Kulkarni | 7acb326 | 2016-07-05 15:27:25 -0400 | [diff] [blame] | 409 | if (!sde_crtc->num_ctls) |
| 410 | return; |
| 411 | |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 412 | /* ref count the vblank event */ |
| 413 | ret = drm_crtc_vblank_get(crtc); |
| 414 | if (ret) |
| 415 | return; |
| 416 | |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 417 | /* wait */ |
Abhijit Kulkarni | 7acb326 | 2016-07-05 15:27:25 -0400 | [diff] [blame] | 418 | wait_event_timeout(dev->vblank[drm_crtc_index(crtc)].queue, |
| 419 | frame_flushed(sde_crtc), |
| 420 | msecs_to_jiffies(50)); |
| 421 | if (ret <= 0) |
| 422 | dev_warn(dev->dev, "vblank time out, crtc=%d, ret %u\n", |
| 423 | sde_crtc->id, ret); |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 424 | |
| 425 | for (i = 0; i < sde_crtc->num_ctls; i++) |
| 426 | sde_crtc->mixer[i].flush_mask = 0; |
| 427 | |
| 428 | /* release */ |
| 429 | drm_crtc_vblank_put(crtc); |
| 430 | } |
| 431 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 432 | static void request_pending(struct drm_crtc *crtc, u32 pending) |
| 433 | { |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 434 | struct sde_crtc *sde_crtc = to_sde_crtc(crtc); |
| 435 | struct vsync_info vsync; |
| 436 | |
| 437 | /* request vsync info, cache the current frame count */ |
Lloyd Atkinson | e5c2c0b | 2016-07-05 12:23:29 -0400 | [diff] [blame] | 438 | sde_encoder_get_vblank_status(sde_crtc->encoder, &vsync); |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 439 | sde_crtc->vsync_count = vsync.frame_count; |
| 440 | |
| 441 | atomic_or(pending, &sde_crtc->pending); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 442 | } |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 443 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 444 | /** |
| 445 | * Flush the CTL PATH |
| 446 | */ |
| 447 | static u32 crtc_flush_all(struct drm_crtc *crtc) |
| 448 | { |
| 449 | struct sde_crtc *sde_crtc = to_sde_crtc(crtc); |
| 450 | struct sde_hw_ctl *ctl; |
| 451 | int i; |
| 452 | |
| 453 | DBG(""); |
| 454 | |
| 455 | for (i = 0; i < sde_crtc->num_ctls; i++) { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 456 | ctl = sde_crtc->mixer[i].hw_ctl; |
| 457 | ctl->ops.get_bitmask_intf(ctl, |
| 458 | &(sde_crtc->mixer[i].flush_mask), |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 459 | sde_crtc->mixer[i].intf_idx); |
| 460 | DBG("Flushing CTL_ID %d, flush_mask %x", ctl->idx, |
| 461 | sde_crtc->mixer[i].flush_mask); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 462 | ctl->ops.setup_flush(ctl, |
| 463 | sde_crtc->mixer[i].flush_mask); |
| 464 | } |
| 465 | |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 466 | return 0; |
| 467 | } |
| 468 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 469 | static void sde_crtc_atomic_begin(struct drm_crtc *crtc, |
| 470 | struct drm_crtc_state *old_crtc_state) |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 471 | { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 472 | struct sde_crtc *sde_crtc = to_sde_crtc(crtc); |
| 473 | struct drm_device *dev = crtc->dev; |
| 474 | unsigned long flags; |
| 475 | |
| 476 | DBG(""); |
| 477 | |
| 478 | WARN_ON(sde_crtc->event); |
| 479 | |
| 480 | spin_lock_irqsave(&dev->event_lock, flags); |
| 481 | sde_crtc->event = crtc->state->event; |
| 482 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 483 | |
| 484 | /* |
| 485 | * If no CTL has been allocated in sde_crtc_atomic_check(), |
| 486 | * it means we are trying to flush a CRTC whose state is disabled: |
| 487 | * nothing else needs to be done. |
| 488 | */ |
| 489 | if (unlikely(!sde_crtc->num_ctls)) |
| 490 | return; |
| 491 | |
| 492 | blend_setup(crtc); |
| 493 | |
| 494 | /* |
| 495 | * PP_DONE irq is only used by command mode for now. |
| 496 | * It is better to request pending before FLUSH and START trigger |
| 497 | * to make sure no pp_done irq missed. |
| 498 | * This is safe because no pp_done will happen before SW trigger |
| 499 | * in command mode. |
| 500 | */ |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 501 | } |
| 502 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 503 | static void sde_crtc_atomic_flush(struct drm_crtc *crtc, |
| 504 | struct drm_crtc_state *old_crtc_state) |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 505 | { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 506 | struct sde_crtc *sde_crtc = to_sde_crtc(crtc); |
| 507 | struct drm_device *dev = crtc->dev; |
| 508 | unsigned long flags; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 509 | |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 510 | DBG("%s: event: %pK", sde_crtc->name, crtc->state->event); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 511 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 512 | WARN_ON(sde_crtc->event); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 513 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 514 | spin_lock_irqsave(&dev->event_lock, flags); |
| 515 | sde_crtc->event = crtc->state->event; |
| 516 | spin_unlock_irqrestore(&dev->event_lock, flags); |
| 517 | |
| 518 | /* |
| 519 | * If no CTL has been allocated in sde_crtc_atomic_check(), |
| 520 | * it means we are trying to flush a CRTC whose state is disabled: |
| 521 | * nothing else needs to be done. |
| 522 | */ |
| 523 | if (unlikely(!sde_crtc->num_ctls)) |
| 524 | return; |
| 525 | |
| 526 | crtc_flush_all(crtc); |
| 527 | |
| 528 | request_pending(crtc, PENDING_FLIP); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 529 | } |
| 530 | |
| 531 | static int sde_crtc_set_property(struct drm_crtc *crtc, |
| 532 | struct drm_property *property, uint64_t val) |
| 533 | { |
| 534 | return -EINVAL; |
| 535 | } |
| 536 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 537 | static int sde_crtc_cursor_set(struct drm_crtc *crtc, |
| 538 | struct drm_file *file, uint32_t handle, |
| 539 | uint32_t width, uint32_t height) |
| 540 | { |
| 541 | return 0; |
| 542 | } |
| 543 | |
| 544 | static int sde_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) |
| 545 | { |
| 546 | return 0; |
| 547 | } |
| 548 | |
| 549 | static void sde_crtc_disable(struct drm_crtc *crtc) |
| 550 | { |
| 551 | DBG(""); |
| 552 | } |
| 553 | |
| 554 | static void sde_crtc_enable(struct drm_crtc *crtc) |
| 555 | { |
| 556 | DBG(""); |
| 557 | } |
| 558 | |
| 559 | struct plane_state { |
| 560 | struct drm_plane *plane; |
| 561 | struct sde_plane_state *state; |
| 562 | }; |
| 563 | |
| 564 | static int pstate_cmp(const void *a, const void *b) |
| 565 | { |
| 566 | struct plane_state *pa = (struct plane_state *)a; |
| 567 | struct plane_state *pb = (struct plane_state *)b; |
| 568 | |
Clarence Ip | e78efb7 | 2016-06-24 18:35:21 -0400 | [diff] [blame] | 569 | return (int)pa->state->property_values[PLANE_PROP_ZPOS] - |
| 570 | (int)pb->state->property_values[PLANE_PROP_ZPOS]; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 571 | } |
| 572 | |
| 573 | static int sde_crtc_atomic_check(struct drm_crtc *crtc, |
| 574 | struct drm_crtc_state *state) |
| 575 | { |
| 576 | struct sde_crtc *sde_crtc = to_sde_crtc(crtc); |
| 577 | struct sde_kms *sde_kms = get_kms(crtc); |
| 578 | struct drm_plane *plane; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 579 | struct plane_state pstates[SDE_STAGE_MAX]; |
| 580 | int max_stages = CRTC_HW_MIXER_MAXSTAGES(sde_kms->catalog, 0); |
| 581 | int cnt = 0, i; |
| 582 | |
| 583 | DBG("%s: check", sde_crtc->name); |
| 584 | |
| 585 | /* verify that there are not too many planes attached to crtc |
| 586 | * and that we don't have conflicting mixer stages: |
| 587 | */ |
| 588 | drm_atomic_crtc_state_for_each_plane(plane, state) { |
| 589 | struct drm_plane_state *pstate; |
| 590 | |
| 591 | if (cnt >= (max_stages)) { |
Lloyd Atkinson | d49de56 | 2016-05-30 13:23:48 -0400 | [diff] [blame^] | 592 | DRM_ERROR("too many planes!\n"); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 593 | return -EINVAL; |
| 594 | } |
| 595 | |
| 596 | pstate = state->state->plane_states[drm_plane_index(plane)]; |
| 597 | |
| 598 | /* plane might not have changed, in which case take |
| 599 | * current state: |
| 600 | */ |
| 601 | if (!pstate) |
| 602 | pstate = plane->state; |
| 603 | pstates[cnt].plane = plane; |
| 604 | pstates[cnt].state = to_sde_plane_state(pstate); |
| 605 | |
| 606 | cnt++; |
| 607 | } |
| 608 | |
| 609 | /* assign a stage based on sorted zpos property */ |
| 610 | sort(pstates, cnt, sizeof(pstates[0]), pstate_cmp, NULL); |
| 611 | |
| 612 | for (i = 0; i < cnt; i++) { |
| 613 | pstates[i].state->stage = SDE_STAGE_0 + i; |
| 614 | DBG("%s: assign pipe %d on stage=%d", sde_crtc->name, |
| 615 | sde_plane_pipe(pstates[i].plane), |
| 616 | pstates[i].state->stage); |
| 617 | } |
| 618 | |
| 619 | return 0; |
| 620 | } |
| 621 | |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 622 | static const struct drm_crtc_funcs sde_crtc_funcs = { |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 623 | .set_config = drm_atomic_helper_set_config, |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 624 | .destroy = sde_crtc_destroy, |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 625 | .page_flip = drm_atomic_helper_page_flip, |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 626 | .set_property = sde_crtc_set_property, |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 627 | .reset = drm_atomic_helper_crtc_reset, |
| 628 | .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, |
| 629 | .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, |
| 630 | .cursor_set = sde_crtc_cursor_set, |
| 631 | .cursor_move = sde_crtc_cursor_move, |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 632 | }; |
| 633 | |
| 634 | static const struct drm_crtc_helper_funcs sde_crtc_helper_funcs = { |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 635 | .mode_fixup = sde_crtc_mode_fixup, |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 636 | .mode_set_nofb = sde_crtc_mode_set_nofb, |
| 637 | .disable = sde_crtc_disable, |
| 638 | .enable = sde_crtc_enable, |
| 639 | .atomic_check = sde_crtc_atomic_check, |
| 640 | .atomic_begin = sde_crtc_atomic_begin, |
| 641 | .atomic_flush = sde_crtc_atomic_flush, |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 642 | }; |
| 643 | |
Abhijit Kulkarni | 7acb326 | 2016-07-05 15:27:25 -0400 | [diff] [blame] | 644 | int sde_crtc_vblank(struct drm_crtc *crtc, bool en) |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 645 | { |
Abhijit Kulkarni | 7acb326 | 2016-07-05 15:27:25 -0400 | [diff] [blame] | 646 | struct sde_crtc *sde_crtc = to_sde_crtc(crtc); |
| 647 | |
| 648 | DBG("%d", en); |
Lloyd Atkinson | e5c2c0b | 2016-07-05 12:23:29 -0400 | [diff] [blame] | 649 | |
| 650 | /* |
| 651 | * Mark that framework requested vblank, |
| 652 | * as opposed to enabling vblank only for our internal purposes |
| 653 | * Currently this variable isn't required, but may be useful for future |
| 654 | * features |
| 655 | */ |
| 656 | sde_crtc->drm_requested_vblank = en; |
| 657 | |
Abhijit Kulkarni | 7acb326 | 2016-07-05 15:27:25 -0400 | [diff] [blame] | 658 | if (en) |
| 659 | sde_encoder_register_vblank_callback(sde_crtc->encoder, |
| 660 | sde_crtc_vblank_cb, (void *)crtc); |
| 661 | else |
| 662 | sde_encoder_register_vblank_callback(sde_crtc->encoder, |
| 663 | NULL, NULL); |
| 664 | |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 665 | return 0; |
| 666 | } |
| 667 | |
| 668 | void sde_crtc_cancel_pending_flip(struct drm_crtc *crtc, struct drm_file *file) |
| 669 | { |
| 670 | } |
| 671 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 672 | static void sde_crtc_install_properties(struct drm_crtc *crtc, |
| 673 | struct drm_mode_object *obj) |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 674 | { |
| 675 | } |
| 676 | |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 677 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 678 | /* initialize crtc */ |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 679 | struct drm_crtc *sde_crtc_init(struct drm_device *dev, |
| 680 | struct drm_encoder *encoder, |
| 681 | struct drm_plane *plane, int id) |
| 682 | { |
| 683 | struct drm_crtc *crtc = NULL; |
| 684 | struct sde_crtc *sde_crtc; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 685 | int rc; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 686 | |
| 687 | sde_crtc = kzalloc(sizeof(*sde_crtc), GFP_KERNEL); |
| 688 | if (!sde_crtc) |
| 689 | return ERR_PTR(-ENOMEM); |
| 690 | |
| 691 | crtc = &sde_crtc->base; |
| 692 | |
| 693 | sde_crtc->id = id; |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 694 | sde_crtc->encoder = encoder; |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 695 | |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 696 | sde_crtc_install_properties(crtc, &crtc->base); |
| 697 | |
| 698 | drm_crtc_init_with_planes(dev, crtc, plane, NULL, &sde_crtc_funcs); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 699 | |
| 700 | drm_crtc_helper_add(crtc, &sde_crtc_helper_funcs); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 701 | plane->crtc = crtc; |
| 702 | |
| 703 | rc = sde_crtc_reserve_hw_resources(crtc, encoder); |
| 704 | if (rc) { |
Lloyd Atkinson | d49de56 | 2016-05-30 13:23:48 -0400 | [diff] [blame^] | 705 | DRM_ERROR(" error reserving HW resource for this CRTC\n"); |
Abhijit Kulkarni | 3e3e0d2 | 2016-06-24 17:56:13 -0400 | [diff] [blame] | 706 | return ERR_PTR(-EINVAL); |
| 707 | } |
| 708 | |
Abhijit Kulkarni | 40e3816 | 2016-06-26 22:12:09 -0400 | [diff] [blame] | 709 | DBG("%s: Successfully initialized crtc", __func__); |
Narendra Muppalla | 1b0b335 | 2015-09-29 10:16:51 -0700 | [diff] [blame] | 710 | return crtc; |
| 711 | } |