blob: 0d21407ccfc2657bf59df44c9f4dd8f210cf4c71 [file] [log] [blame]
Olav Kongas4808a1c2005-04-09 22:57:39 +03001
2/*
3 * Board initialization code should put one of these into dev->platform_data
4 * and place the isp116x onto platform_bus.
5 */
6
7struct isp116x_platform_data {
8 /* Enable internal resistors on downstream ports */
9 unsigned sel15Kres:1;
Olav Kongas4808a1c2005-04-09 22:57:39 +030010 /* On-chip overcurrent protection */
11 unsigned oc_enable:1;
12 /* INT output polarity */
13 unsigned int_act_high:1;
14 /* INT edge or level triggered */
15 unsigned int_edge_triggered:1;
Olav Kongasd4d62862005-08-04 16:48:19 +030016 /* Enable wakeup by devices on usb bus (e.g. wakeup
17 by attachment/detachment or by device activity
18 such as moving a mouse). When chosen, this option
19 prevents stopping internal clock, increasing
20 thereby power consumption in suspended state. */
Olav Kongas4808a1c2005-04-09 22:57:39 +030021 unsigned remote_wakeup_enable:1;
22 /* Switch or not to switch (keep always powered) */
23 unsigned no_power_switching:1;
24 /* Ganged port power switching (0) or individual port
25 power switching (1) */
26 unsigned power_switching_mode:1;
Olav Kongas4808a1c2005-04-09 22:57:39 +030027 /* Hardware reset set/clear. If implemented, this function must:
28 if set == 0, deassert chip's HW reset pin
29 otherwise, assert chip's HW reset pin */
30 void (*reset) (struct device * dev, int set);
31 /* Hardware clock start/stop. If implemented, this function must:
32 if start == 0, stop the external clock
33 otherwise, start the external clock
34 */
35 void (*clock) (struct device * dev, int start);
36 /* Inter-io delay (ns). The chip is picky about access timings; it
37 expects at least:
38 150ns delay between consecutive accesses to DATA_REG,
39 300ns delay between access to ADDR_REG and DATA_REG
40 OE, WE MUST NOT be changed during these intervals
41 */
42 void (*delay) (struct device * dev, int delay);
43};