Chris Ball | b650352 | 2012-04-10 22:34:33 -0400 | [diff] [blame] | 1 | * Marvell sdhci-pxa v2/v3 controller |
| 2 | |
| 3 | This file documents differences between the core properties in mmc.txt |
| 4 | and the properties used by the sdhci-pxav2 and sdhci-pxav3 drivers. |
| 5 | |
| 6 | Required properties: |
Marcin Wojtas | 5491ce3 | 2014-02-18 16:08:29 +0100 | [diff] [blame] | 7 | - compatible: Should be "mrvl,pxav2-mmc", "mrvl,pxav3-mmc" or |
| 8 | "marvell,armada-380-sdhci". |
| 9 | - reg: |
| 10 | * for "mrvl,pxav2-mmc" and "mrvl,pxav3-mmc", one register area for |
| 11 | the SDHCI registers. |
Gregory CLEMENT | d58a2ea5 | 2015-01-29 12:36:26 +0100 | [diff] [blame^] | 12 | |
| 13 | * for "marvell,armada-380-sdhci", three register areas. The first |
| 14 | one for the SDHCI registers themselves, the second one for the |
| 15 | AXI/Mbus bridge registers of the SDHCI unit, the third one for the |
| 16 | SDIO3 Configuration register |
| 17 | - reg names: should be "sdhci", "mbus", "conf-sdio3". only mandatory |
| 18 | for "marvell,armada-380-sdhci" |
Sebastian Hesselbarth | 0654bb3 | 2014-10-21 11:22:41 +0200 | [diff] [blame] | 19 | - clocks: Array of clocks required for SDHCI; requires at least one for |
| 20 | I/O clock. |
| 21 | - clock-names: Array of names corresponding to clocks property; shall be |
| 22 | "io" for I/O clock and "core" for optional core clock. |
Chris Ball | b650352 | 2012-04-10 22:34:33 -0400 | [diff] [blame] | 23 | |
| 24 | Optional properties: |
| 25 | - mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning. |
| 26 | |
| 27 | Example: |
| 28 | |
| 29 | sdhci@d4280800 { |
| 30 | compatible = "mrvl,pxav3-mmc"; |
| 31 | reg = <0xd4280800 0x800>; |
| 32 | bus-width = <8>; |
| 33 | interrupts = <27>; |
Sebastian Hesselbarth | 0654bb3 | 2014-10-21 11:22:41 +0200 | [diff] [blame] | 34 | clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>; |
| 35 | clock-names = "io", "core"; |
Chris Ball | b650352 | 2012-04-10 22:34:33 -0400 | [diff] [blame] | 36 | non-removable; |
| 37 | mrvl,clk-delay-cycles = <31>; |
| 38 | }; |
Marcin Wojtas | 5491ce3 | 2014-02-18 16:08:29 +0100 | [diff] [blame] | 39 | |
| 40 | sdhci@d8000 { |
| 41 | compatible = "marvell,armada-380-sdhci"; |
Gregory CLEMENT | d58a2ea5 | 2015-01-29 12:36:26 +0100 | [diff] [blame^] | 42 | reg-names = "sdhci", "mbus", "conf-sdio3"; |
| 43 | reg = <0xd8000 0x1000>, |
| 44 | <0xdc000 0x100>; |
| 45 | <0x18454 0x4>; |
Marcin Wojtas | 5491ce3 | 2014-02-18 16:08:29 +0100 | [diff] [blame] | 46 | interrupts = <0 25 0x4>; |
| 47 | clocks = <&gateclk 17>; |
Sebastian Hesselbarth | 0654bb3 | 2014-10-21 11:22:41 +0200 | [diff] [blame] | 48 | clock-names = "io"; |
Marcin Wojtas | 5491ce3 | 2014-02-18 16:08:29 +0100 | [diff] [blame] | 49 | mrvl,clk-delay-cycles = <0x1F>; |
| 50 | }; |