Hiroshi Doyu | 4e0ee78 | 2012-06-25 14:23:54 +0300 | [diff] [blame] | 1 | /* |
| 2 | * OF helpers for IOMMU |
| 3 | * |
| 4 | * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms and conditions of the GNU General Public License, |
| 8 | * version 2, as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | * more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License along with |
| 16 | * this program; if not, write to the Free Software Foundation, Inc., |
| 17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/export.h> |
Will Deacon | 7eba1d5 | 2014-08-27 16:20:32 +0100 | [diff] [blame] | 21 | #include <linux/iommu.h> |
Hiroshi Doyu | 4e0ee78 | 2012-06-25 14:23:54 +0300 | [diff] [blame] | 22 | #include <linux/limits.h> |
| 23 | #include <linux/of.h> |
Brian Norris | cbff563 | 2013-12-04 17:22:53 -0800 | [diff] [blame] | 24 | #include <linux/of_iommu.h> |
Robin Murphy | b996444 | 2016-09-12 17:13:41 +0100 | [diff] [blame] | 25 | #include <linux/of_pci.h> |
Robin Murphy | a42a7a1 | 2014-12-05 13:41:02 +0000 | [diff] [blame] | 26 | #include <linux/slab.h> |
Hiroshi Doyu | 4e0ee78 | 2012-06-25 14:23:54 +0300 | [diff] [blame] | 27 | |
Will Deacon | 1cd076b | 2014-08-27 14:40:58 +0100 | [diff] [blame] | 28 | static const struct of_device_id __iommu_of_table_sentinel |
| 29 | __used __section(__iommu_of_table_end); |
| 30 | |
Hiroshi Doyu | 4e0ee78 | 2012-06-25 14:23:54 +0300 | [diff] [blame] | 31 | /** |
| 32 | * of_get_dma_window - Parse *dma-window property and returns 0 if found. |
| 33 | * |
| 34 | * @dn: device node |
| 35 | * @prefix: prefix for property name if any |
| 36 | * @index: index to start to parse |
| 37 | * @busno: Returns busno if supported. Otherwise pass NULL |
| 38 | * @addr: Returns address that DMA starts |
| 39 | * @size: Returns the range that DMA can handle |
| 40 | * |
| 41 | * This supports different formats flexibly. "prefix" can be |
| 42 | * configured if any. "busno" and "index" are optionally |
| 43 | * specified. Set 0(or NULL) if not used. |
| 44 | */ |
| 45 | int of_get_dma_window(struct device_node *dn, const char *prefix, int index, |
| 46 | unsigned long *busno, dma_addr_t *addr, size_t *size) |
| 47 | { |
| 48 | const __be32 *dma_window, *end; |
| 49 | int bytes, cur_index = 0; |
| 50 | char propname[NAME_MAX], addrname[NAME_MAX], sizename[NAME_MAX]; |
| 51 | |
| 52 | if (!dn || !addr || !size) |
| 53 | return -EINVAL; |
| 54 | |
| 55 | if (!prefix) |
| 56 | prefix = ""; |
| 57 | |
| 58 | snprintf(propname, sizeof(propname), "%sdma-window", prefix); |
| 59 | snprintf(addrname, sizeof(addrname), "%s#dma-address-cells", prefix); |
| 60 | snprintf(sizename, sizeof(sizename), "%s#dma-size-cells", prefix); |
| 61 | |
| 62 | dma_window = of_get_property(dn, propname, &bytes); |
| 63 | if (!dma_window) |
| 64 | return -ENODEV; |
| 65 | end = dma_window + bytes / sizeof(*dma_window); |
| 66 | |
| 67 | while (dma_window < end) { |
| 68 | u32 cells; |
| 69 | const void *prop; |
| 70 | |
| 71 | /* busno is one cell if supported */ |
| 72 | if (busno) |
| 73 | *busno = be32_to_cpup(dma_window++); |
| 74 | |
| 75 | prop = of_get_property(dn, addrname, NULL); |
| 76 | if (!prop) |
| 77 | prop = of_get_property(dn, "#address-cells", NULL); |
| 78 | |
| 79 | cells = prop ? be32_to_cpup(prop) : of_n_addr_cells(dn); |
| 80 | if (!cells) |
| 81 | return -EINVAL; |
| 82 | *addr = of_read_number(dma_window, cells); |
| 83 | dma_window += cells; |
| 84 | |
| 85 | prop = of_get_property(dn, sizename, NULL); |
| 86 | cells = prop ? be32_to_cpup(prop) : of_n_size_cells(dn); |
| 87 | if (!cells) |
| 88 | return -EINVAL; |
| 89 | *size = of_read_number(dma_window, cells); |
| 90 | dma_window += cells; |
| 91 | |
| 92 | if (cur_index++ == index) |
| 93 | break; |
| 94 | } |
| 95 | return 0; |
| 96 | } |
| 97 | EXPORT_SYMBOL_GPL(of_get_dma_window); |
Will Deacon | 1cd076b | 2014-08-27 14:40:58 +0100 | [diff] [blame] | 98 | |
Robin Murphy | a42a7a1 | 2014-12-05 13:41:02 +0000 | [diff] [blame] | 99 | struct of_iommu_node { |
| 100 | struct list_head list; |
| 101 | struct device_node *np; |
Robin Murphy | 53c92d7 | 2016-04-07 18:42:05 +0100 | [diff] [blame] | 102 | const struct iommu_ops *ops; |
Robin Murphy | a42a7a1 | 2014-12-05 13:41:02 +0000 | [diff] [blame] | 103 | }; |
| 104 | static LIST_HEAD(of_iommu_list); |
| 105 | static DEFINE_SPINLOCK(of_iommu_lock); |
| 106 | |
Robin Murphy | 53c92d7 | 2016-04-07 18:42:05 +0100 | [diff] [blame] | 107 | void of_iommu_set_ops(struct device_node *np, const struct iommu_ops *ops) |
Robin Murphy | a42a7a1 | 2014-12-05 13:41:02 +0000 | [diff] [blame] | 108 | { |
| 109 | struct of_iommu_node *iommu = kzalloc(sizeof(*iommu), GFP_KERNEL); |
| 110 | |
| 111 | if (WARN_ON(!iommu)) |
| 112 | return; |
| 113 | |
Anup Patel | 45bb966 | 2016-01-27 10:51:16 +0530 | [diff] [blame] | 114 | of_node_get(np); |
Robin Murphy | a42a7a1 | 2014-12-05 13:41:02 +0000 | [diff] [blame] | 115 | INIT_LIST_HEAD(&iommu->list); |
| 116 | iommu->np = np; |
| 117 | iommu->ops = ops; |
| 118 | spin_lock(&of_iommu_lock); |
| 119 | list_add_tail(&iommu->list, &of_iommu_list); |
| 120 | spin_unlock(&of_iommu_lock); |
| 121 | } |
| 122 | |
Robin Murphy | 53c92d7 | 2016-04-07 18:42:05 +0100 | [diff] [blame] | 123 | const struct iommu_ops *of_iommu_get_ops(struct device_node *np) |
Robin Murphy | a42a7a1 | 2014-12-05 13:41:02 +0000 | [diff] [blame] | 124 | { |
| 125 | struct of_iommu_node *node; |
Robin Murphy | 53c92d7 | 2016-04-07 18:42:05 +0100 | [diff] [blame] | 126 | const struct iommu_ops *ops = NULL; |
Robin Murphy | a42a7a1 | 2014-12-05 13:41:02 +0000 | [diff] [blame] | 127 | |
| 128 | spin_lock(&of_iommu_lock); |
| 129 | list_for_each_entry(node, &of_iommu_list, list) |
| 130 | if (node->np == np) { |
| 131 | ops = node->ops; |
| 132 | break; |
| 133 | } |
| 134 | spin_unlock(&of_iommu_lock); |
| 135 | return ops; |
| 136 | } |
| 137 | |
Robin Murphy | b996444 | 2016-09-12 17:13:41 +0100 | [diff] [blame] | 138 | static int __get_pci_rid(struct pci_dev *pdev, u16 alias, void *data) |
| 139 | { |
| 140 | struct of_phandle_args *iommu_spec = data; |
| 141 | |
| 142 | iommu_spec->args[0] = alias; |
| 143 | return iommu_spec->np == pdev->bus->dev.of_node; |
| 144 | } |
| 145 | |
| 146 | static const struct iommu_ops |
| 147 | *of_pci_iommu_configure(struct pci_dev *pdev, struct device_node *bridge_np) |
| 148 | { |
| 149 | const struct iommu_ops *ops; |
| 150 | struct of_phandle_args iommu_spec; |
| 151 | |
| 152 | /* |
| 153 | * Start by tracing the RID alias down the PCI topology as |
| 154 | * far as the host bridge whose OF node we have... |
| 155 | * (we're not even attempting to handle multi-alias devices yet) |
| 156 | */ |
| 157 | iommu_spec.args_count = 1; |
| 158 | iommu_spec.np = bridge_np; |
| 159 | pci_for_each_dma_alias(pdev, __get_pci_rid, &iommu_spec); |
| 160 | /* |
| 161 | * ...then find out what that becomes once it escapes the PCI |
| 162 | * bus into the system beyond, and which IOMMU it ends up at. |
| 163 | */ |
| 164 | iommu_spec.np = NULL; |
| 165 | if (of_pci_map_rid(bridge_np, iommu_spec.args[0], "iommu-map", |
| 166 | "iommu-map-mask", &iommu_spec.np, iommu_spec.args)) |
| 167 | return NULL; |
| 168 | |
| 169 | ops = of_iommu_get_ops(iommu_spec.np); |
Robin Murphy | 57f98d2 | 2016-09-13 10:54:14 +0100 | [diff] [blame] | 170 | if (!ops || !ops->of_xlate || |
| 171 | iommu_fwspec_init(&pdev->dev, &iommu_spec.np->fwnode, ops) || |
| 172 | ops->of_xlate(&pdev->dev, &iommu_spec)) |
Robin Murphy | b996444 | 2016-09-12 17:13:41 +0100 | [diff] [blame] | 173 | ops = NULL; |
| 174 | |
| 175 | of_node_put(iommu_spec.np); |
| 176 | return ops; |
| 177 | } |
| 178 | |
Robin Murphy | 53c92d7 | 2016-04-07 18:42:05 +0100 | [diff] [blame] | 179 | const struct iommu_ops *of_iommu_configure(struct device *dev, |
| 180 | struct device_node *master_np) |
Will Deacon | 7eba1d5 | 2014-08-27 16:20:32 +0100 | [diff] [blame] | 181 | { |
| 182 | struct of_phandle_args iommu_spec; |
| 183 | struct device_node *np; |
Robin Murphy | 53c92d7 | 2016-04-07 18:42:05 +0100 | [diff] [blame] | 184 | const struct iommu_ops *ops = NULL; |
Will Deacon | 7eba1d5 | 2014-08-27 16:20:32 +0100 | [diff] [blame] | 185 | int idx = 0; |
| 186 | |
Robin Murphy | 7b0ce72 | 2015-07-22 18:47:00 +0100 | [diff] [blame] | 187 | if (dev_is_pci(dev)) |
Robin Murphy | b996444 | 2016-09-12 17:13:41 +0100 | [diff] [blame] | 188 | return of_pci_iommu_configure(to_pci_dev(dev), master_np); |
Murali Karicheri | ed74862 | 2015-03-03 12:52:08 -0500 | [diff] [blame] | 189 | |
Will Deacon | 7eba1d5 | 2014-08-27 16:20:32 +0100 | [diff] [blame] | 190 | /* |
| 191 | * We don't currently walk up the tree looking for a parent IOMMU. |
| 192 | * See the `Notes:' section of |
| 193 | * Documentation/devicetree/bindings/iommu/iommu.txt |
| 194 | */ |
Murali Karicheri | ed74862 | 2015-03-03 12:52:08 -0500 | [diff] [blame] | 195 | while (!of_parse_phandle_with_args(master_np, "iommus", |
Will Deacon | 7eba1d5 | 2014-08-27 16:20:32 +0100 | [diff] [blame] | 196 | "#iommu-cells", idx, |
| 197 | &iommu_spec)) { |
| 198 | np = iommu_spec.np; |
| 199 | ops = of_iommu_get_ops(np); |
| 200 | |
Robin Murphy | 57f98d2 | 2016-09-13 10:54:14 +0100 | [diff] [blame] | 201 | if (!ops || !ops->of_xlate || |
| 202 | iommu_fwspec_init(dev, &np->fwnode, ops) || |
| 203 | ops->of_xlate(dev, &iommu_spec)) |
Will Deacon | 7eba1d5 | 2014-08-27 16:20:32 +0100 | [diff] [blame] | 204 | goto err_put_node; |
| 205 | |
| 206 | of_node_put(np); |
| 207 | idx++; |
| 208 | } |
| 209 | |
| 210 | return ops; |
| 211 | |
| 212 | err_put_node: |
| 213 | of_node_put(np); |
| 214 | return NULL; |
| 215 | } |
| 216 | |
Kefeng Wang | bb8e15d | 2016-06-01 14:06:15 +0800 | [diff] [blame] | 217 | static int __init of_iommu_init(void) |
Will Deacon | 1cd076b | 2014-08-27 14:40:58 +0100 | [diff] [blame] | 218 | { |
| 219 | struct device_node *np; |
| 220 | const struct of_device_id *match, *matches = &__iommu_of_table; |
| 221 | |
| 222 | for_each_matching_node_and_match(np, matches, &match) { |
| 223 | const of_iommu_init_fn init_fn = match->data; |
| 224 | |
| 225 | if (init_fn(np)) |
| 226 | pr_err("Failed to initialise IOMMU %s\n", |
| 227 | of_node_full_name(np)); |
| 228 | } |
Kefeng Wang | bb8e15d | 2016-06-01 14:06:15 +0800 | [diff] [blame] | 229 | |
| 230 | return 0; |
Will Deacon | 1cd076b | 2014-08-27 14:40:58 +0100 | [diff] [blame] | 231 | } |
Kefeng Wang | bb8e15d | 2016-06-01 14:06:15 +0800 | [diff] [blame] | 232 | postcore_initcall_sync(of_iommu_init); |