blob: 14bc307050999d278cda3684b98da6577e6d6371 [file] [log] [blame]
Arnd Bergmann5d0769f2012-03-02 23:07:21 +00001/*
2 * Copyright 2012 Linaro Ltd
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 soc-u9500 {
16 #address-cells = <1>;
17 #size-cells = <1>;
Lee Jones7e0ce272012-03-15 16:46:17 +000018 compatible = "stericsson,db8500";
Lee Jonesdab64872012-03-07 17:22:30 +000019 interrupt-parent = <&intc>;
Arnd Bergmann5d0769f2012-03-02 23:07:21 +000020 ranges;
Lee Jones7e0ce272012-03-15 16:46:17 +000021
Lee Jonesdab64872012-03-07 17:22:30 +000022 intc: interrupt-controller@a0411000 {
23 compatible = "arm,cortex-a9-gic";
24 #interrupt-cells = <3>;
25 #address-cells = <1>;
26 interrupt-controller;
Lee Jonesdab64872012-03-07 17:22:30 +000027 reg = <0xa0411000 0x1000>,
28 <0xa0410100 0x100>;
29 };
30
Lee Jonesf1949ea2012-03-08 09:02:02 +000031 L2: l2-cache {
32 compatible = "arm,pl310-cache";
33 reg = <0xa0412000 0x1000>;
34 interrupts = <0 13 4>;
35 cache-unified;
36 cache-level = <2>;
37 };
38
Lee Jones7e0ce272012-03-15 16:46:17 +000039 pmu {
40 compatible = "arm,cortex-a9-pmu";
41 interrupts = <0 7 0x4>;
42 };
43
Lee Jones71de5c42012-03-16 09:53:24 +000044 timer@a0410600 {
45 compatible = "arm,cortex-a9-twd-timer";
46 reg = <0xa0410600 0x20>;
47 interrupts = <1 13 0x304>;
48 };
49
Lee Jones7e0ce272012-03-15 16:46:17 +000050 rtc@80154000 {
51 compatible = "stericsson,db8500-rtc";
52 reg = <0x80154000 0x1000>;
53 interrupts = <0 18 0x4>;
54 };
55
56 gpio0: gpio@8012e000 {
57 compatible = "stericsson,db8500-gpio",
58 "stmicroelectronics,nomadik-gpio";
59 reg = <0x8012e000 0x80>;
60 interrupts = <0 119 0x4>;
61 supports-sleepmode;
62 gpio-controller;
63 };
64
65 gpio1: gpio@8012e080 {
66 compatible = "stericsson,db8500-gpio",
67 "stmicroelectronics,nomadik-gpio";
68 reg = <0x8012e080 0x80>;
69 interrupts = <0 120 0x4>;
70 supports-sleepmode;
71 gpio-controller;
72 };
73
74 gpio2: gpio@8000e000 {
75 compatible = "stericsson,db8500-gpio",
76 "stmicroelectronics,nomadik-gpio";
77 reg = <0x8000e000 0x80>;
78 interrupts = <0 121 0x4>;
79 supports-sleepmode;
80 gpio-controller;
81 };
82
83 gpio3: gpio@8000e080 {
84 compatible = "stericsson,db8500-gpio",
85 "stmicroelectronics,nomadik-gpio";
86 reg = <0x8000e080 0x80>;
87 interrupts = <0 122 0x4>;
88 supports-sleepmode;
89 gpio-controller;
90 };
91
92 gpio4: gpio@8000e100 {
93 compatible = "stericsson,db8500-gpio",
94 "stmicroelectronics,nomadik-gpio";
95 reg = <0x8000e100 0x80>;
96 interrupts = <0 123 0x4>;
97 supports-sleepmode;
98 gpio-controller;
99 };
100
101 gpio5: gpio@8000e180 {
102 compatible = "stericsson,db8500-gpio",
103 "stmicroelectronics,nomadik-gpio";
104 reg = <0x8000e180 0x80>;
105 interrupts = <0 124 0x4>;
106 supports-sleepmode;
107 gpio-controller;
108 };
109
110 gpio6: gpio@8011e000 {
111 compatible = "stericsson,db8500-gpio",
112 "stmicroelectronics,nomadik-gpio";
113 reg = <0x8011e000 0x80>;
114 interrupts = <0 125 0x4>;
115 supports-sleepmode;
116 gpio-controller;
117 };
118
119 gpio7: gpio@8011e080 {
120 compatible = "stericsson,db8500-gpio",
121 "stmicroelectronics,nomadik-gpio";
122 reg = <0x8011e080 0x80>;
123 interrupts = <0 126 0x4>;
124 supports-sleepmode;
125 gpio-controller;
126 };
127
128 gpio8: gpio@a03fe000 {
129 compatible = "stericsson,db8500-gpio",
130 "stmicroelectronics,nomadik-gpio";
131 reg = <0xa03fe000 0x80>;
132 interrupts = <0 127 0x4>;
133 supports-sleepmode;
134 gpio-controller;
135 };
136
137 usb@a03e0000 {
138 compatible = "stericsson,db8500-musb",
139 "mentor,musb";
140 reg = <0xa03e0000 0x10000>;
141 interrupts = <0 23 0x4>;
142 };
143
144 dma-controller@801C0000 {
145 compatible = "stericsson,db8500-dma40",
146 "stericsson,dma40";
147 reg = <0x801C0000 0x1000 0x40010000 0x800>;
148 interrupts = <0 25 0x4>;
149 };
150
151 prcmu@80157000 {
152 compatible = "stericsson,db8500-prcmu";
153 reg = <0x80157000 0x1000>;
154 interrupts = <46 47>;
155 #address-cells = <1>;
156 #size-cells = <0>;
157
158 ab8500@5 {
159 compatible = "stericsson,ab8500";
160 reg = <5>; /* mailbox 5 is i2c */
161 interrupts = <0 40 0x4>;
162 };
163 };
164
165 i2c@80004000 {
166 compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
167 reg = <0x80004000 0x1000>;
168 interrupts = <0 21 0x4>;
169 #address-cells = <1>;
170 #size-cells = <0>;
171 };
172
173 i2c@80122000 {
174 compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
175 reg = <0x80122000 0x1000>;
176 interrupts = <0 22 0x4>;
177 #address-cells = <1>;
178 #size-cells = <0>;
179 };
180
181 i2c@80128000 {
182 compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
183 reg = <0x80128000 0x1000>;
184 interrupts = <0 55 0x4>;
185 #address-cells = <1>;
186 #size-cells = <0>;
187 };
188
189 i2c@80110000 {
190 compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
191 reg = <0x80110000 0x1000>;
192 interrupts = <0 12 0x4>;
193 #address-cells = <1>;
194 #size-cells = <0>;
195 };
196
197 i2c@8012a000 {
198 compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
199 reg = <0x8012a000 0x1000>;
200 interrupts = <0 51 0x4>;
201 #address-cells = <1>;
202 #size-cells = <0>;
203 };
204
205 ssp@80002000 {
206 compatible = "arm,pl022", "arm,primecell";
207 reg = <80002000 0x1000>;
208 interrupts = <0 14 0x4>;
209 #address-cells = <1>;
210 #size-cells = <0>;
211 status = "disabled";
Lee Jones15daf692012-03-15 16:47:11 +0000212
213 // Add one of these for each child device
Lee Jones7e0ce272012-03-15 16:46:17 +0000214 cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
Lee Jones15daf692012-03-15 16:47:11 +0000215
Lee Jones7e0ce272012-03-15 16:46:17 +0000216 };
217
218 uart@80120000 {
219 compatible = "arm,pl011", "arm,primecell";
220 reg = <0x80120000 0x1000>;
221 interrupts = <0 11 0x4>;
222 status = "disabled";
223 };
224 uart@80121000 {
225 compatible = "arm,pl011", "arm,primecell";
226 reg = <0x80121000 0x1000>;
227 interrupts = <0 19 0x4>;
228 status = "disabled";
229 };
230 uart@80007000 {
231 compatible = "arm,pl011", "arm,primecell";
232 reg = <0x80007000 0x1000>;
233 interrupts = <0 26 0x4>;
234 status = "disabled";
235 };
236
237 sdi@80126000 {
238 compatible = "arm,pl18x", "arm,primecell";
239 reg = <0x80126000 0x1000>;
240 interrupts = <0 60 0x4>;
241 status = "disabled";
242 };
243 sdi@80118000 {
244 compatible = "arm,pl18x", "arm,primecell";
245 reg = <0x80118000 0x1000>;
246 interrupts = <0 50 0x4>;
247 status = "disabled";
248 };
249 sdi@80005000 {
250 compatible = "arm,pl18x", "arm,primecell";
251 reg = <0x80005000 0x1000>;
252 interrupts = <0 41 0x4>;
253 status = "disabled";
254 };
255 sdi@80119000 {
256 compatible = "arm,pl18x", "arm,primecell";
257 reg = <0x80119000 0x1000>;
258 interrupts = <0 59 0x4>;
259 status = "disabled";
260 };
261 sdi@80114000 {
262 compatible = "arm,pl18x", "arm,primecell";
263 reg = <0x80114000 0x1000>;
264 interrupts = <0 99 0x4>;
265 status = "disabled";
266 };
267 sdi@80008000 {
268 compatible = "arm,pl18x", "arm,primecell";
269 reg = <0x80114000 0x1000>;
270 interrupts = <0 100 0x4>;
271 status = "disabled";
272 };
Arnd Bergmann5d0769f2012-03-02 23:07:21 +0000273 };
274};