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Boojin Kimdafc9542011-09-02 09:44:37 +09001/* linux/arch/arm/mach-s5pv210/dma.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
Jassi Brar7d1a2072010-05-18 11:59:34 +09006 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
7 * Jaswinder Singh <jassi.brar@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
Jassi Brar7d1a2072010-05-18 11:59:34 +090024#include <linux/dma-mapping.h>
Boojin Kimdafc9542011-09-02 09:44:37 +090025#include <linux/amba/bus.h>
26#include <linux/amba/pl330.h>
Jassi Brar7d1a2072010-05-18 11:59:34 +090027
Boojin Kimdafc9542011-09-02 09:44:37 +090028#include <asm/irq.h>
Jassi Brar7d1a2072010-05-18 11:59:34 +090029#include <plat/devs.h>
30#include <plat/irqs.h>
31
32#include <mach/map.h>
33#include <mach/irqs.h>
Boojin Kimdafc9542011-09-02 09:44:37 +090034#include <mach/dma.h>
Jassi Brar7d1a2072010-05-18 11:59:34 +090035
Kukjin Kim85fd1782012-01-21 11:10:31 +090036static u8 pdma0_peri[] = {
Thomas Abraham8742e042011-10-24 11:45:14 +020037 DMACH_UART0_RX,
38 DMACH_UART0_TX,
39 DMACH_UART1_RX,
40 DMACH_UART1_TX,
41 DMACH_UART2_RX,
42 DMACH_UART2_TX,
43 DMACH_UART3_RX,
44 DMACH_UART3_TX,
45 DMACH_MAX,
46 DMACH_I2S0_RX,
47 DMACH_I2S0_TX,
48 DMACH_I2S0S_TX,
49 DMACH_I2S1_RX,
50 DMACH_I2S1_TX,
51 DMACH_MAX,
52 DMACH_MAX,
53 DMACH_SPI0_RX,
54 DMACH_SPI0_TX,
55 DMACH_SPI1_RX,
56 DMACH_SPI1_TX,
57 DMACH_MAX,
58 DMACH_MAX,
59 DMACH_AC97_MICIN,
60 DMACH_AC97_PCMIN,
61 DMACH_AC97_PCMOUT,
62 DMACH_MAX,
63 DMACH_PWM,
64 DMACH_SPDIF,
Jassi Brar7d1a2072010-05-18 11:59:34 +090065};
66
Kukjin Kim85fd1782012-01-21 11:10:31 +090067static struct dma_pl330_platdata s5pv210_pdma0_pdata = {
Boojin Kimdafc9542011-09-02 09:44:37 +090068 .nr_valid_peri = ARRAY_SIZE(pdma0_peri),
Thomas Abraham8742e042011-10-24 11:45:14 +020069 .peri_id = pdma0_peri,
Jassi Brar7d1a2072010-05-18 11:59:34 +090070};
71
Kukjin Kim60571f92012-03-07 03:34:41 -080072static AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330,
73 S5PV210_PA_PDMA0, {IRQ_PDMA0}, &s5pv210_pdma0_pdata);
Boojin Kimdafc9542011-09-02 09:44:37 +090074
Kukjin Kim85fd1782012-01-21 11:10:31 +090075static u8 pdma1_peri[] = {
Thomas Abraham8742e042011-10-24 11:45:14 +020076 DMACH_UART0_RX,
77 DMACH_UART0_TX,
78 DMACH_UART1_RX,
79 DMACH_UART1_TX,
80 DMACH_UART2_RX,
81 DMACH_UART2_TX,
82 DMACH_UART3_RX,
83 DMACH_UART3_TX,
84 DMACH_MAX,
85 DMACH_I2S0_RX,
86 DMACH_I2S0_TX,
87 DMACH_I2S0S_TX,
88 DMACH_I2S1_RX,
89 DMACH_I2S1_TX,
90 DMACH_I2S2_RX,
91 DMACH_I2S2_TX,
92 DMACH_SPI0_RX,
93 DMACH_SPI0_TX,
94 DMACH_SPI1_RX,
95 DMACH_SPI1_TX,
96 DMACH_MAX,
97 DMACH_MAX,
98 DMACH_PCM0_RX,
99 DMACH_PCM0_TX,
100 DMACH_PCM1_RX,
101 DMACH_PCM1_TX,
102 DMACH_MSM_REQ0,
103 DMACH_MSM_REQ1,
104 DMACH_MSM_REQ2,
105 DMACH_MSM_REQ3,
106 DMACH_PCM2_RX,
107 DMACH_PCM2_TX,
Jassi Brar7d1a2072010-05-18 11:59:34 +0900108};
109
Kukjin Kim85fd1782012-01-21 11:10:31 +0900110static struct dma_pl330_platdata s5pv210_pdma1_pdata = {
Boojin Kimdafc9542011-09-02 09:44:37 +0900111 .nr_valid_peri = ARRAY_SIZE(pdma1_peri),
Thomas Abraham8742e042011-10-24 11:45:14 +0200112 .peri_id = pdma1_peri,
Jassi Brar7d1a2072010-05-18 11:59:34 +0900113};
114
Kukjin Kim60571f92012-03-07 03:34:41 -0800115static AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330,
116 S5PV210_PA_PDMA1, {IRQ_PDMA1}, &s5pv210_pdma1_pdata);
Jassi Brar7d1a2072010-05-18 11:59:34 +0900117
118static int __init s5pv210_dma_init(void)
119{
Thomas Abraham8742e042011-10-24 11:45:14 +0200120 dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask);
121 dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask);
Russell King75c06962012-01-20 09:14:40 +0000122 amba_device_register(&s5pv210_pdma0_device, &iomem_resource);
Thomas Abraham8742e042011-10-24 11:45:14 +0200123
124 dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask);
125 dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask);
Russell King75c06962012-01-20 09:14:40 +0000126 amba_device_register(&s5pv210_pdma1_device, &iomem_resource);
Jassi Brar7d1a2072010-05-18 11:59:34 +0900127
128 return 0;
129}
130arch_initcall(s5pv210_dma_init);