David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 1 | /* |
Grant Likely | c103de2 | 2011-06-04 18:38:28 -0600 | [diff] [blame] | 2 | * MCP23S08 SPI gpio expander driver |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 3 | */ |
| 4 | |
| 5 | #include <linux/kernel.h> |
| 6 | #include <linux/device.h> |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 7 | #include <linux/mutex.h> |
H Hartley Sweeten | d120c17 | 2009-09-22 16:46:37 -0700 | [diff] [blame] | 8 | #include <linux/gpio.h> |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 9 | #include <linux/spi/spi.h> |
| 10 | #include <linux/spi/mcp23s08.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 11 | #include <linux/slab.h> |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 12 | #include <asm/byteorder.h> |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 13 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 14 | /** |
| 15 | * MCP types supported by driver |
| 16 | */ |
| 17 | #define MCP_TYPE_S08 0 |
| 18 | #define MCP_TYPE_S17 1 |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 19 | |
| 20 | /* Registers are all 8 bits wide. |
| 21 | * |
| 22 | * The mcp23s17 has twice as many bits, and can be configured to work |
| 23 | * with either 16 bit registers or with two adjacent 8 bit banks. |
| 24 | * |
| 25 | * Also, there are I2C versions of both chips. |
| 26 | */ |
| 27 | #define MCP_IODIR 0x00 /* init/reset: all ones */ |
| 28 | #define MCP_IPOL 0x01 |
| 29 | #define MCP_GPINTEN 0x02 |
| 30 | #define MCP_DEFVAL 0x03 |
| 31 | #define MCP_INTCON 0x04 |
| 32 | #define MCP_IOCON 0x05 |
| 33 | # define IOCON_SEQOP (1 << 5) |
| 34 | # define IOCON_HAEN (1 << 3) |
| 35 | # define IOCON_ODR (1 << 2) |
| 36 | # define IOCON_INTPOL (1 << 1) |
| 37 | #define MCP_GPPU 0x06 |
| 38 | #define MCP_INTF 0x07 |
| 39 | #define MCP_INTCAP 0x08 |
| 40 | #define MCP_GPIO 0x09 |
| 41 | #define MCP_OLAT 0x0a |
| 42 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 43 | struct mcp23s08; |
| 44 | |
| 45 | struct mcp23s08_ops { |
| 46 | int (*read)(struct mcp23s08 *mcp, unsigned reg); |
| 47 | int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val); |
| 48 | int (*read_regs)(struct mcp23s08 *mcp, unsigned reg, |
| 49 | u16 *vals, unsigned n); |
| 50 | }; |
| 51 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 52 | struct mcp23s08 { |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 53 | u8 addr; |
| 54 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 55 | u16 cache[11]; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 56 | /* lock protects the cached values */ |
| 57 | struct mutex lock; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 58 | |
| 59 | struct gpio_chip chip; |
| 60 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 61 | const struct mcp23s08_ops *ops; |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 62 | void *data; /* ops specific data */ |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 63 | }; |
| 64 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 65 | /* A given spi_device can represent up to eight mcp23sxx chips |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 66 | * sharing the same chipselect but using different addresses |
| 67 | * (e.g. chips #0 and #3 might be populated, but not #1 or $2). |
| 68 | * Driver data holds all the per-chip data. |
| 69 | */ |
| 70 | struct mcp23s08_driver_data { |
| 71 | unsigned ngpio; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 72 | struct mcp23s08 *mcp[8]; |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 73 | struct mcp23s08 chip[]; |
| 74 | }; |
| 75 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 76 | #ifdef CONFIG_SPI_MASTER |
| 77 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 78 | static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg) |
| 79 | { |
| 80 | u8 tx[2], rx[1]; |
| 81 | int status; |
| 82 | |
| 83 | tx[0] = mcp->addr | 0x01; |
| 84 | tx[1] = reg; |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 85 | status = spi_write_then_read(mcp->data, tx, sizeof tx, rx, sizeof rx); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 86 | return (status < 0) ? status : rx[0]; |
| 87 | } |
| 88 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 89 | static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 90 | { |
| 91 | u8 tx[3]; |
| 92 | |
| 93 | tx[0] = mcp->addr; |
| 94 | tx[1] = reg; |
| 95 | tx[2] = val; |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 96 | return spi_write_then_read(mcp->data, tx, sizeof tx, NULL, 0); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 97 | } |
| 98 | |
| 99 | static int |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 100 | mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n) |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 101 | { |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 102 | u8 tx[2], *tmp; |
| 103 | int status; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 104 | |
| 105 | if ((n + reg) > sizeof mcp->cache) |
| 106 | return -EINVAL; |
| 107 | tx[0] = mcp->addr | 0x01; |
| 108 | tx[1] = reg; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 109 | |
| 110 | tmp = (u8 *)vals; |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 111 | status = spi_write_then_read(mcp->data, tx, sizeof tx, tmp, n); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 112 | if (status >= 0) { |
| 113 | while (n--) |
| 114 | vals[n] = tmp[n]; /* expand to 16bit */ |
| 115 | } |
| 116 | return status; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 117 | } |
| 118 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 119 | static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg) |
| 120 | { |
| 121 | u8 tx[2], rx[2]; |
| 122 | int status; |
| 123 | |
| 124 | tx[0] = mcp->addr | 0x01; |
| 125 | tx[1] = reg << 1; |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 126 | status = spi_write_then_read(mcp->data, tx, sizeof tx, rx, sizeof rx); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 127 | return (status < 0) ? status : (rx[0] | (rx[1] << 8)); |
| 128 | } |
| 129 | |
| 130 | static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val) |
| 131 | { |
| 132 | u8 tx[4]; |
| 133 | |
| 134 | tx[0] = mcp->addr; |
| 135 | tx[1] = reg << 1; |
| 136 | tx[2] = val; |
| 137 | tx[3] = val >> 8; |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 138 | return spi_write_then_read(mcp->data, tx, sizeof tx, NULL, 0); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 139 | } |
| 140 | |
| 141 | static int |
| 142 | mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n) |
| 143 | { |
| 144 | u8 tx[2]; |
| 145 | int status; |
| 146 | |
| 147 | if ((n + reg) > sizeof mcp->cache) |
| 148 | return -EINVAL; |
| 149 | tx[0] = mcp->addr | 0x01; |
| 150 | tx[1] = reg << 1; |
| 151 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 152 | status = spi_write_then_read(mcp->data, tx, sizeof tx, |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 153 | (u8 *)vals, n * 2); |
| 154 | if (status >= 0) { |
| 155 | while (n--) |
| 156 | vals[n] = __le16_to_cpu((__le16)vals[n]); |
| 157 | } |
| 158 | |
| 159 | return status; |
| 160 | } |
| 161 | |
| 162 | static const struct mcp23s08_ops mcp23s08_ops = { |
| 163 | .read = mcp23s08_read, |
| 164 | .write = mcp23s08_write, |
| 165 | .read_regs = mcp23s08_read_regs, |
| 166 | }; |
| 167 | |
| 168 | static const struct mcp23s08_ops mcp23s17_ops = { |
| 169 | .read = mcp23s17_read, |
| 170 | .write = mcp23s17_write, |
| 171 | .read_regs = mcp23s17_read_regs, |
| 172 | }; |
| 173 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 174 | #endif /* CONFIG_SPI_MASTER */ |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 175 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 176 | /*----------------------------------------------------------------------*/ |
| 177 | |
| 178 | static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset) |
| 179 | { |
| 180 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); |
| 181 | int status; |
| 182 | |
| 183 | mutex_lock(&mcp->lock); |
| 184 | mcp->cache[MCP_IODIR] |= (1 << offset); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 185 | status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 186 | mutex_unlock(&mcp->lock); |
| 187 | return status; |
| 188 | } |
| 189 | |
| 190 | static int mcp23s08_get(struct gpio_chip *chip, unsigned offset) |
| 191 | { |
| 192 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); |
| 193 | int status; |
| 194 | |
| 195 | mutex_lock(&mcp->lock); |
| 196 | |
| 197 | /* REVISIT reading this clears any IRQ ... */ |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 198 | status = mcp->ops->read(mcp, MCP_GPIO); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 199 | if (status < 0) |
| 200 | status = 0; |
| 201 | else { |
| 202 | mcp->cache[MCP_GPIO] = status; |
| 203 | status = !!(status & (1 << offset)); |
| 204 | } |
| 205 | mutex_unlock(&mcp->lock); |
| 206 | return status; |
| 207 | } |
| 208 | |
| 209 | static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value) |
| 210 | { |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 211 | unsigned olat = mcp->cache[MCP_OLAT]; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 212 | |
| 213 | if (value) |
| 214 | olat |= mask; |
| 215 | else |
| 216 | olat &= ~mask; |
| 217 | mcp->cache[MCP_OLAT] = olat; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 218 | return mcp->ops->write(mcp, MCP_OLAT, olat); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 219 | } |
| 220 | |
| 221 | static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value) |
| 222 | { |
| 223 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 224 | unsigned mask = 1 << offset; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 225 | |
| 226 | mutex_lock(&mcp->lock); |
| 227 | __mcp23s08_set(mcp, mask, value); |
| 228 | mutex_unlock(&mcp->lock); |
| 229 | } |
| 230 | |
| 231 | static int |
| 232 | mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value) |
| 233 | { |
| 234 | struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 235 | unsigned mask = 1 << offset; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 236 | int status; |
| 237 | |
| 238 | mutex_lock(&mcp->lock); |
| 239 | status = __mcp23s08_set(mcp, mask, value); |
| 240 | if (status == 0) { |
| 241 | mcp->cache[MCP_IODIR] &= ~mask; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 242 | status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 243 | } |
| 244 | mutex_unlock(&mcp->lock); |
| 245 | return status; |
| 246 | } |
| 247 | |
| 248 | /*----------------------------------------------------------------------*/ |
| 249 | |
| 250 | #ifdef CONFIG_DEBUG_FS |
| 251 | |
| 252 | #include <linux/seq_file.h> |
| 253 | |
| 254 | /* |
| 255 | * This shows more info than the generic gpio dump code: |
| 256 | * pullups, deglitching, open drain drive. |
| 257 | */ |
| 258 | static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip) |
| 259 | { |
| 260 | struct mcp23s08 *mcp; |
| 261 | char bank; |
Roel Kluin | 1d1c1d9 | 2008-05-23 13:04:43 -0700 | [diff] [blame] | 262 | int t; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 263 | unsigned mask; |
| 264 | |
| 265 | mcp = container_of(chip, struct mcp23s08, chip); |
| 266 | |
| 267 | /* NOTE: we only handle one bank for now ... */ |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 268 | bank = '0' + ((mcp->addr >> 1) & 0x7); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 269 | |
| 270 | mutex_lock(&mcp->lock); |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 271 | t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache)); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 272 | if (t < 0) { |
| 273 | seq_printf(s, " I/O ERROR %d\n", t); |
| 274 | goto done; |
| 275 | } |
| 276 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 277 | for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) { |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 278 | const char *label; |
| 279 | |
| 280 | label = gpiochip_is_requested(chip, t); |
| 281 | if (!label) |
| 282 | continue; |
| 283 | |
| 284 | seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s", |
| 285 | chip->base + t, bank, t, label, |
| 286 | (mcp->cache[MCP_IODIR] & mask) ? "in " : "out", |
| 287 | (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo", |
| 288 | (mcp->cache[MCP_GPPU] & mask) ? " " : "up"); |
| 289 | /* NOTE: ignoring the irq-related registers */ |
| 290 | seq_printf(s, "\n"); |
| 291 | } |
| 292 | done: |
| 293 | mutex_unlock(&mcp->lock); |
| 294 | } |
| 295 | |
| 296 | #else |
| 297 | #define mcp23s08_dbg_show NULL |
| 298 | #endif |
| 299 | |
| 300 | /*----------------------------------------------------------------------*/ |
| 301 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 302 | static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, |
| 303 | void *data, unsigned addr, |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 304 | unsigned type, unsigned base, unsigned pullups) |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 305 | { |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 306 | int status; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 307 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 308 | mutex_init(&mcp->lock); |
| 309 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 310 | mcp->data = data; |
| 311 | mcp->addr = addr; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 312 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 313 | mcp->chip.direction_input = mcp23s08_direction_input; |
| 314 | mcp->chip.get = mcp23s08_get; |
| 315 | mcp->chip.direction_output = mcp23s08_direction_output; |
| 316 | mcp->chip.set = mcp23s08_set; |
| 317 | mcp->chip.dbg_show = mcp23s08_dbg_show; |
| 318 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 319 | switch (type) { |
| 320 | #ifdef CONFIG_SPI_MASTER |
| 321 | case MCP_TYPE_S08: |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 322 | mcp->ops = &mcp23s08_ops; |
| 323 | mcp->chip.ngpio = 8; |
| 324 | mcp->chip.label = "mcp23s08"; |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 325 | break; |
| 326 | |
| 327 | case MCP_TYPE_S17: |
| 328 | mcp->ops = &mcp23s17_ops; |
| 329 | mcp->chip.ngpio = 16; |
| 330 | mcp->chip.label = "mcp23s17"; |
| 331 | break; |
| 332 | #endif /* CONFIG_SPI_MASTER */ |
| 333 | |
| 334 | default: |
| 335 | dev_err(dev, "invalid device type (%d)\n", type); |
| 336 | return -EINVAL; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 337 | } |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 338 | |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 339 | mcp->chip.base = base; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 340 | mcp->chip.can_sleep = 1; |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 341 | mcp->chip.dev = dev; |
Guennadi Liakhovetski | d72cbed | 2008-04-28 02:14:45 -0700 | [diff] [blame] | 342 | mcp->chip.owner = THIS_MODULE; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 343 | |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 344 | /* verify MCP_IOCON.SEQOP = 0, so sequential reads work, |
| 345 | * and MCP_IOCON.HAEN = 1, so we work with all chips. |
| 346 | */ |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 347 | status = mcp->ops->read(mcp, MCP_IOCON); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 348 | if (status < 0) |
| 349 | goto fail; |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 350 | if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN)) { |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 351 | /* mcp23s17 has IOCON twice, make sure they are in sync */ |
| 352 | status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8)); |
| 353 | status |= IOCON_HAEN | (IOCON_HAEN << 8); |
| 354 | status = mcp->ops->write(mcp, MCP_IOCON, status); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 355 | if (status < 0) |
| 356 | goto fail; |
| 357 | } |
| 358 | |
| 359 | /* configure ~100K pullups */ |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 360 | status = mcp->ops->write(mcp, MCP_GPPU, pullups); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 361 | if (status < 0) |
| 362 | goto fail; |
| 363 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 364 | status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache)); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 365 | if (status < 0) |
| 366 | goto fail; |
| 367 | |
| 368 | /* disable inverter on input */ |
| 369 | if (mcp->cache[MCP_IPOL] != 0) { |
| 370 | mcp->cache[MCP_IPOL] = 0; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 371 | status = mcp->ops->write(mcp, MCP_IPOL, 0); |
| 372 | if (status < 0) |
| 373 | goto fail; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 374 | } |
| 375 | |
| 376 | /* disable irqs */ |
| 377 | if (mcp->cache[MCP_GPINTEN] != 0) { |
| 378 | mcp->cache[MCP_GPINTEN] = 0; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 379 | status = mcp->ops->write(mcp, MCP_GPINTEN, 0); |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 380 | if (status < 0) |
| 381 | goto fail; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 382 | } |
| 383 | |
| 384 | status = gpiochip_add(&mcp->chip); |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 385 | fail: |
| 386 | if (status < 0) |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 387 | dev_dbg(dev, "can't setup chip %d, --> %d\n", |
| 388 | addr, status); |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 389 | return status; |
| 390 | } |
| 391 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 392 | #ifdef CONFIG_SPI_MASTER |
| 393 | |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 394 | static int mcp23s08_probe(struct spi_device *spi) |
| 395 | { |
| 396 | struct mcp23s08_platform_data *pdata; |
| 397 | unsigned addr; |
| 398 | unsigned chips = 0; |
| 399 | struct mcp23s08_driver_data *data; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 400 | int status, type; |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 401 | unsigned base; |
| 402 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 403 | type = spi_get_device_id(spi)->driver_data; |
| 404 | |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 405 | pdata = spi->dev.platform_data; |
Ben Dooks | a342d21 | 2009-01-15 13:50:45 -0800 | [diff] [blame] | 406 | if (!pdata || !gpio_is_valid(pdata->base)) { |
| 407 | dev_dbg(&spi->dev, "invalid or missing platform data\n"); |
| 408 | return -EINVAL; |
| 409 | } |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 410 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 411 | for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) { |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 412 | if (!pdata->chip[addr].is_present) |
| 413 | continue; |
| 414 | chips++; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 415 | if ((type == MCP_TYPE_S08) && (addr > 3)) { |
| 416 | dev_err(&spi->dev, |
| 417 | "mcp23s08 only supports address 0..3\n"); |
| 418 | return -EINVAL; |
| 419 | } |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 420 | } |
| 421 | if (!chips) |
| 422 | return -ENODEV; |
| 423 | |
| 424 | data = kzalloc(sizeof *data + chips * sizeof(struct mcp23s08), |
| 425 | GFP_KERNEL); |
| 426 | if (!data) |
| 427 | return -ENOMEM; |
| 428 | spi_set_drvdata(spi, data); |
| 429 | |
| 430 | base = pdata->base; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 431 | for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) { |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 432 | if (!pdata->chip[addr].is_present) |
| 433 | continue; |
| 434 | chips--; |
| 435 | data->mcp[addr] = &data->chip[chips]; |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 436 | status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi, |
| 437 | 0x40 | (addr << 1), type, base, |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 438 | pdata->chip[addr].pullups); |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 439 | if (status < 0) |
| 440 | goto fail; |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 441 | |
| 442 | base += (type == MCP_TYPE_S17) ? 16 : 8; |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 443 | } |
| 444 | data->ngpio = base - pdata->base; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 445 | |
| 446 | /* NOTE: these chips have a relatively sane IRQ framework, with |
| 447 | * per-signal masking and level/edge triggering. It's not yet |
| 448 | * handled here... |
| 449 | */ |
| 450 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 451 | return 0; |
| 452 | |
| 453 | fail: |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 454 | for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 455 | int tmp; |
| 456 | |
| 457 | if (!data->mcp[addr]) |
| 458 | continue; |
| 459 | tmp = gpiochip_remove(&data->mcp[addr]->chip); |
| 460 | if (tmp < 0) |
| 461 | dev_err(&spi->dev, "%s --> %d\n", "remove", tmp); |
| 462 | } |
| 463 | kfree(data); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 464 | return status; |
| 465 | } |
| 466 | |
| 467 | static int mcp23s08_remove(struct spi_device *spi) |
| 468 | { |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 469 | struct mcp23s08_driver_data *data = spi_get_drvdata(spi); |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 470 | unsigned addr; |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 471 | int status = 0; |
| 472 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 473 | for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) { |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 474 | int tmp; |
| 475 | |
| 476 | if (!data->mcp[addr]) |
| 477 | continue; |
| 478 | |
| 479 | tmp = gpiochip_remove(&data->mcp[addr]->chip); |
| 480 | if (tmp < 0) { |
| 481 | dev_err(&spi->dev, "%s --> %d\n", "remove", tmp); |
| 482 | status = tmp; |
| 483 | } |
| 484 | } |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 485 | if (status == 0) |
David Brownell | 8f1cc3b | 2008-07-25 01:46:09 -0700 | [diff] [blame] | 486 | kfree(data); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 487 | return status; |
| 488 | } |
| 489 | |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 490 | static const struct spi_device_id mcp23s08_ids[] = { |
| 491 | { "mcp23s08", MCP_TYPE_S08 }, |
| 492 | { "mcp23s17", MCP_TYPE_S17 }, |
| 493 | { }, |
| 494 | }; |
| 495 | MODULE_DEVICE_TABLE(spi, mcp23s08_ids); |
| 496 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 497 | static struct spi_driver mcp23s08_driver = { |
| 498 | .probe = mcp23s08_probe, |
| 499 | .remove = mcp23s08_remove, |
Peter Korsgaard | 0b7bb77 | 2011-03-09 17:56:30 +0100 | [diff] [blame] | 500 | .id_table = mcp23s08_ids, |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 501 | .driver = { |
| 502 | .name = "mcp23s08", |
| 503 | .owner = THIS_MODULE, |
| 504 | }, |
| 505 | }; |
| 506 | |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 507 | static int __init mcp23s08_spi_init(void) |
| 508 | { |
| 509 | return spi_register_driver(&mcp23s08_driver); |
| 510 | } |
| 511 | |
| 512 | static void mcp23s08_spi_exit(void) |
| 513 | { |
| 514 | spi_unregister_driver(&mcp23s08_driver); |
| 515 | } |
| 516 | |
| 517 | #else |
| 518 | |
| 519 | static int __init mcp23s08_spi_init(void) { return 0; } |
| 520 | static void mcp23s08_spi_exit(void) { } |
| 521 | |
| 522 | #endif /* CONFIG_SPI_MASTER */ |
| 523 | |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 524 | /*----------------------------------------------------------------------*/ |
| 525 | |
| 526 | static int __init mcp23s08_init(void) |
| 527 | { |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 528 | return mcp23s08_spi_init(); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 529 | } |
David Brownell | 673c0c0 | 2008-10-15 22:02:46 -0700 | [diff] [blame] | 530 | /* register after spi postcore initcall and before |
| 531 | * subsys initcalls that may rely on these GPIOs |
| 532 | */ |
| 533 | subsys_initcall(mcp23s08_init); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 534 | |
| 535 | static void __exit mcp23s08_exit(void) |
| 536 | { |
Peter Korsgaard | d62b98f | 2011-07-15 10:25:31 +0200 | [diff] [blame^] | 537 | mcp23s08_spi_exit(); |
David Brownell | e58b9e2 | 2008-02-04 22:28:25 -0800 | [diff] [blame] | 538 | } |
| 539 | module_exit(mcp23s08_exit); |
| 540 | |
| 541 | MODULE_LICENSE("GPL"); |