| Maxime COQUELIN | 63f3171 | 2015-01-09 16:11:00 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This header provides constants clk index STMicroelectronics |
| 3 | * STiH418 SoC. |
| 4 | */ |
| 5 | #ifndef _DT_BINDINGS_CLK_STIH418 |
| 6 | #define _DT_BINDINGS_CLK_STIH418 |
| 7 | |
| 8 | #include "stih410-clks.h" |
| 9 | |
| 10 | /* STiH418 introduces new clock outputs compared to STiH410 */ |
| 11 | |
| 12 | /* CLOCKGEN C0 */ |
| 13 | #define CLK_PROC_BDISP_0 14 |
| 14 | #define CLK_PROC_BDISP_1 15 |
| 15 | #define CLK_TX_ICN_1 23 |
| 16 | #define CLK_ETH_PHYREF 27 |
| 17 | #define CLK_PP_HEVC 35 |
| 18 | #define CLK_CLUST_HEVC 36 |
| 19 | #define CLK_HWPE_HEVC 37 |
| 20 | #define CLK_FC_HEVC 38 |
| 21 | #define CLK_PROC_MIXER 39 |
| 22 | #define CLK_PROC_SC 40 |
| 23 | #define CLK_AVSP_HEVC 41 |
| 24 | |
| 25 | /* CLOCKGEN D2 */ |
| 26 | #undef CLK_PIX_PIP |
| 27 | #undef CLK_PIX_GDP1 |
| 28 | #undef CLK_PIX_GDP2 |
| 29 | #undef CLK_PIX_GDP3 |
| 30 | #undef CLK_PIX_GDP4 |
| 31 | |
| 32 | #define CLK_TMDS_HDMI_DIV2 5 |
| 33 | #define CLK_VP9 47 |
| 34 | #endif |