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Ian Molton4a489982008-07-15 16:02:21 +01001/*
2 * linux/drivers/mmc/tmio_mmc.c
3 *
4 * Copyright (C) 2004 Ian Molton
5 * Copyright (C) 2007 Ian Molton
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Driver for the MMC / SD / SDIO cell found in:
12 *
13 * TC6393XB TC6391XB TC6387XB T7L66XB
14 *
15 * This driver draws mainly on scattered spec sheets, Reverse engineering
16 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
17 * support). (Further 4 bit support from a later datasheet).
18 *
19 * TODO:
20 * Investigate using a workqueue for PIO transfers
21 * Eliminate FIXMEs
22 * SDIO support
23 * Better Power management
24 * Handle MMC errors better
25 * double buffer support
26 *
27 */
28#include <linux/module.h>
29#include <linux/irq.h>
30#include <linux/device.h>
31#include <linux/delay.h>
32#include <linux/mmc/host.h>
33#include <linux/mfd/core.h>
34#include <linux/mfd/tmio.h>
35
36#include "tmio_mmc.h"
37
Ian Molton4a489982008-07-15 16:02:21 +010038static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
39{
Philipp Zabelf0e46cc2009-06-04 20:12:31 +020040 u32 clk = 0, clock, f_min = host->mmc->f_min;
Ian Molton4a489982008-07-15 16:02:21 +010041
42 if (new_clock) {
Philipp Zabelf0e46cc2009-06-04 20:12:31 +020043 for (clock = f_min, clk = 0x100; new_clock >= (clock<<1); ) {
Ian Molton4a489982008-07-15 16:02:21 +010044 clock <<= 1;
45 clk >>= 1;
46 }
47 if (clk & 0x1)
48 clk = 0x20000;
49
50 clk >>= 2;
Philipp Zabel5e746722009-06-04 20:12:32 +020051 sd_config_write8(host, CNF_SD_CLK_MODE, (clk & 0x8000) ? 0 : 1);
Ian Molton4a489982008-07-15 16:02:21 +010052 clk |= 0x100;
53 }
54
Philipp Zabel5e746722009-06-04 20:12:32 +020055 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk);
Ian Molton4a489982008-07-15 16:02:21 +010056}
57
58static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
59{
Philipp Zabel5e746722009-06-04 20:12:32 +020060 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
Ian Molton4a489982008-07-15 16:02:21 +010061 msleep(10);
Philipp Zabel5e746722009-06-04 20:12:32 +020062 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
63 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
Ian Molton4a489982008-07-15 16:02:21 +010064 msleep(10);
65}
66
67static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
68{
Philipp Zabel5e746722009-06-04 20:12:32 +020069 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
70 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
Ian Molton4a489982008-07-15 16:02:21 +010071 msleep(10);
Philipp Zabel5e746722009-06-04 20:12:32 +020072 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
Ian Molton4a489982008-07-15 16:02:21 +010073 msleep(10);
74}
75
76static void reset(struct tmio_mmc_host *host)
77{
Ian Molton4a489982008-07-15 16:02:21 +010078 /* FIXME - should we set stop clock reg here */
Philipp Zabel5e746722009-06-04 20:12:32 +020079 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
80 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
Ian Molton4a489982008-07-15 16:02:21 +010081 msleep(10);
Philipp Zabel5e746722009-06-04 20:12:32 +020082 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
83 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
Ian Molton4a489982008-07-15 16:02:21 +010084 msleep(10);
85}
86
87static void
88tmio_mmc_finish_request(struct tmio_mmc_host *host)
89{
90 struct mmc_request *mrq = host->mrq;
91
92 host->mrq = NULL;
93 host->cmd = NULL;
94 host->data = NULL;
95
96 mmc_request_done(host->mmc, mrq);
97}
98
99/* These are the bitmasks the tmio chip requires to implement the MMC response
100 * types. Note that R1 and R6 are the same in this scheme. */
101#define APP_CMD 0x0040
102#define RESP_NONE 0x0300
103#define RESP_R1 0x0400
104#define RESP_R1B 0x0500
105#define RESP_R2 0x0600
106#define RESP_R3 0x0700
107#define DATA_PRESENT 0x0800
108#define TRANSFER_READ 0x1000
109#define TRANSFER_MULTI 0x2000
110#define SECURITY_CMD 0x4000
111
112static int
113tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
114{
Ian Molton4a489982008-07-15 16:02:21 +0100115 struct mmc_data *data = host->data;
116 int c = cmd->opcode;
117
118 /* Command 12 is handled by hardware */
119 if (cmd->opcode == 12 && !cmd->arg) {
Philipp Zabel5e746722009-06-04 20:12:32 +0200120 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
Ian Molton4a489982008-07-15 16:02:21 +0100121 return 0;
122 }
123
124 switch (mmc_resp_type(cmd)) {
125 case MMC_RSP_NONE: c |= RESP_NONE; break;
126 case MMC_RSP_R1: c |= RESP_R1; break;
127 case MMC_RSP_R1B: c |= RESP_R1B; break;
128 case MMC_RSP_R2: c |= RESP_R2; break;
129 case MMC_RSP_R3: c |= RESP_R3; break;
130 default:
131 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
132 return -EINVAL;
133 }
134
135 host->cmd = cmd;
136
137/* FIXME - this seems to be ok comented out but the spec suggest this bit should
138 * be set when issuing app commands.
139 * if(cmd->flags & MMC_FLAG_ACMD)
140 * c |= APP_CMD;
141 */
142 if (data) {
143 c |= DATA_PRESENT;
144 if (data->blocks > 1) {
Philipp Zabel5e746722009-06-04 20:12:32 +0200145 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
Ian Molton4a489982008-07-15 16:02:21 +0100146 c |= TRANSFER_MULTI;
147 }
148 if (data->flags & MMC_DATA_READ)
149 c |= TRANSFER_READ;
150 }
151
Philipp Zabel5e746722009-06-04 20:12:32 +0200152 enable_mmc_irqs(host, TMIO_MASK_CMD);
Ian Molton4a489982008-07-15 16:02:21 +0100153
154 /* Fire off the command */
Philipp Zabel5e746722009-06-04 20:12:32 +0200155 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
156 sd_ctrl_write16(host, CTL_SD_CMD, c);
Ian Molton4a489982008-07-15 16:02:21 +0100157
158 return 0;
159}
160
161/* This chip always returns (at least?) as much data as you ask for.
162 * I'm unsure what happens if you ask for less than a block. This should be
163 * looked into to ensure that a funny length read doesnt hose the controller.
164 *
165 */
166static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
167{
Ian Molton4a489982008-07-15 16:02:21 +0100168 struct mmc_data *data = host->data;
169 unsigned short *buf;
170 unsigned int count;
171 unsigned long flags;
172
173 if (!data) {
174 pr_debug("Spurious PIO IRQ\n");
175 return;
176 }
177
178 buf = (unsigned short *)(tmio_mmc_kmap_atomic(host, &flags) +
179 host->sg_off);
180
181 count = host->sg_ptr->length - host->sg_off;
182 if (count > data->blksz)
183 count = data->blksz;
184
185 pr_debug("count: %08x offset: %08x flags %08x\n",
186 count, host->sg_off, data->flags);
187
188 /* Transfer the data */
189 if (data->flags & MMC_DATA_READ)
Philipp Zabel5e746722009-06-04 20:12:32 +0200190 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
Ian Molton4a489982008-07-15 16:02:21 +0100191 else
Philipp Zabel5e746722009-06-04 20:12:32 +0200192 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
Ian Molton4a489982008-07-15 16:02:21 +0100193
194 host->sg_off += count;
195
196 tmio_mmc_kunmap_atomic(host, &flags);
197
198 if (host->sg_off == host->sg_ptr->length)
199 tmio_mmc_next_sg(host);
200
201 return;
202}
203
204static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
205{
Ian Molton4a489982008-07-15 16:02:21 +0100206 struct mmc_data *data = host->data;
Julia Lawalla0d045c2008-12-16 16:13:09 +0100207 struct mmc_command *stop;
Ian Molton4a489982008-07-15 16:02:21 +0100208
209 host->data = NULL;
210
211 if (!data) {
212 pr_debug("Spurious data end IRQ\n");
213 return;
214 }
Julia Lawalla0d045c2008-12-16 16:13:09 +0100215 stop = data->stop;
Ian Molton4a489982008-07-15 16:02:21 +0100216
217 /* FIXME - return correct transfer count on errors */
218 if (!data->error)
219 data->bytes_xfered = data->blocks * data->blksz;
220 else
221 data->bytes_xfered = 0;
222
223 pr_debug("Completed data request\n");
224
225 /*FIXME - other drivers allow an optional stop command of any given type
226 * which we dont do, as the chip can auto generate them.
227 * Perhaps we can be smarter about when to use auto CMD12 and
228 * only issue the auto request when we know this is the desired
229 * stop command, allowing fallback to the stop command the
230 * upper layers expect. For now, we do what works.
231 */
232
233 if (data->flags & MMC_DATA_READ)
Philipp Zabel5e746722009-06-04 20:12:32 +0200234 disable_mmc_irqs(host, TMIO_MASK_READOP);
Ian Molton4a489982008-07-15 16:02:21 +0100235 else
Philipp Zabel5e746722009-06-04 20:12:32 +0200236 disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
Ian Molton4a489982008-07-15 16:02:21 +0100237
238 if (stop) {
239 if (stop->opcode == 12 && !stop->arg)
Philipp Zabel5e746722009-06-04 20:12:32 +0200240 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
Ian Molton4a489982008-07-15 16:02:21 +0100241 else
242 BUG();
243 }
244
245 tmio_mmc_finish_request(host);
246}
247
248static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
249 unsigned int stat)
250{
Ian Molton4a489982008-07-15 16:02:21 +0100251 struct mmc_command *cmd = host->cmd;
Philipp Zabel5e746722009-06-04 20:12:32 +0200252 int i, addr;
Ian Molton4a489982008-07-15 16:02:21 +0100253
254 if (!host->cmd) {
255 pr_debug("Spurious CMD irq\n");
256 return;
257 }
258
259 host->cmd = NULL;
260
261 /* This controller is sicker than the PXA one. Not only do we need to
262 * drop the top 8 bits of the first response word, we also need to
263 * modify the order of the response for short response command types.
264 */
265
Philipp Zabel5e746722009-06-04 20:12:32 +0200266 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
267 cmd->resp[i] = sd_ctrl_read32(host, addr);
Ian Molton4a489982008-07-15 16:02:21 +0100268
269 if (cmd->flags & MMC_RSP_136) {
270 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
271 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
272 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
273 cmd->resp[3] <<= 8;
274 } else if (cmd->flags & MMC_RSP_R3) {
275 cmd->resp[0] = cmd->resp[3];
276 }
277
278 if (stat & TMIO_STAT_CMDTIMEOUT)
279 cmd->error = -ETIMEDOUT;
280 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
281 cmd->error = -EILSEQ;
282
283 /* If there is data to handle we enable data IRQs here, and
284 * we will ultimatley finish the request in the data_end handler.
285 * If theres no data or we encountered an error, finish now.
286 */
287 if (host->data && !cmd->error) {
288 if (host->data->flags & MMC_DATA_READ)
Philipp Zabel5e746722009-06-04 20:12:32 +0200289 enable_mmc_irqs(host, TMIO_MASK_READOP);
Ian Molton4a489982008-07-15 16:02:21 +0100290 else
Philipp Zabel5e746722009-06-04 20:12:32 +0200291 enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
Ian Molton4a489982008-07-15 16:02:21 +0100292 } else {
293 tmio_mmc_finish_request(host);
294 }
295
296 return;
297}
298
299
300static irqreturn_t tmio_mmc_irq(int irq, void *devid)
301{
302 struct tmio_mmc_host *host = devid;
Ian Molton4a489982008-07-15 16:02:21 +0100303 unsigned int ireg, irq_mask, status;
304
305 pr_debug("MMC IRQ begin\n");
306
Philipp Zabel5e746722009-06-04 20:12:32 +0200307 status = sd_ctrl_read32(host, CTL_STATUS);
308 irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
Ian Molton4a489982008-07-15 16:02:21 +0100309 ireg = status & TMIO_MASK_IRQ & ~irq_mask;
310
311 pr_debug_status(status);
312 pr_debug_status(ireg);
313
314 if (!ireg) {
Philipp Zabel5e746722009-06-04 20:12:32 +0200315 disable_mmc_irqs(host, status & ~irq_mask);
Ian Molton4a489982008-07-15 16:02:21 +0100316
317 pr_debug("tmio_mmc: Spurious irq, disabling! "
318 "0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
319 pr_debug_status(status);
320
321 goto out;
322 }
323
324 while (ireg) {
325 /* Card insert / remove attempts */
326 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
Philipp Zabel5e746722009-06-04 20:12:32 +0200327 ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
Ian Molton4a489982008-07-15 16:02:21 +0100328 TMIO_STAT_CARD_REMOVE);
329 mmc_detect_change(host->mmc, 0);
330 }
331
332 /* CRC and other errors */
333/* if (ireg & TMIO_STAT_ERR_IRQ)
334 * handled |= tmio_error_irq(host, irq, stat);
335 */
336
337 /* Command completion */
338 if (ireg & TMIO_MASK_CMD) {
Philipp Zabel5e746722009-06-04 20:12:32 +0200339 ack_mmc_irqs(host, TMIO_MASK_CMD);
Ian Molton4a489982008-07-15 16:02:21 +0100340 tmio_mmc_cmd_irq(host, status);
341 }
342
343 /* Data transfer */
344 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
Philipp Zabel5e746722009-06-04 20:12:32 +0200345 ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
Ian Molton4a489982008-07-15 16:02:21 +0100346 tmio_mmc_pio_irq(host);
347 }
348
349 /* Data transfer completion */
350 if (ireg & TMIO_STAT_DATAEND) {
Philipp Zabel5e746722009-06-04 20:12:32 +0200351 ack_mmc_irqs(host, TMIO_STAT_DATAEND);
Ian Molton4a489982008-07-15 16:02:21 +0100352 tmio_mmc_data_irq(host);
353 }
354
355 /* Check status - keep going until we've handled it all */
Philipp Zabel5e746722009-06-04 20:12:32 +0200356 status = sd_ctrl_read32(host, CTL_STATUS);
357 irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
Ian Molton4a489982008-07-15 16:02:21 +0100358 ireg = status & TMIO_MASK_IRQ & ~irq_mask;
359
360 pr_debug("Status at end of loop: %08x\n", status);
361 pr_debug_status(status);
362 }
363 pr_debug("MMC IRQ end\n");
364
365out:
366 return IRQ_HANDLED;
367}
368
369static int tmio_mmc_start_data(struct tmio_mmc_host *host,
370 struct mmc_data *data)
371{
Ian Molton4a489982008-07-15 16:02:21 +0100372 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
373 data->blksz, data->blocks);
374
375 /* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
376 if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
377 printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
378 mmc_hostname(host->mmc), data->blksz);
379 return -EINVAL;
380 }
381
382 tmio_mmc_init_sg(host, data);
383 host->data = data;
384
385 /* Set transfer length / blocksize */
Philipp Zabel5e746722009-06-04 20:12:32 +0200386 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
387 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
Ian Molton4a489982008-07-15 16:02:21 +0100388
389 return 0;
390}
391
392/* Process requests from the MMC layer */
393static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
394{
395 struct tmio_mmc_host *host = mmc_priv(mmc);
396 int ret;
397
398 if (host->mrq)
399 pr_debug("request not null\n");
400
401 host->mrq = mrq;
402
403 if (mrq->data) {
404 ret = tmio_mmc_start_data(host, mrq->data);
405 if (ret)
406 goto fail;
407 }
408
409 ret = tmio_mmc_start_command(host, mrq->cmd);
410
411 if (!ret)
412 return;
413
414fail:
415 mrq->cmd->error = ret;
416 mmc_request_done(mmc, mrq);
417}
418
419/* Set MMC clock / power.
420 * Note: This controller uses a simple divider scheme therefore it cannot
421 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
422 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
423 * slowest setting.
424 */
425static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
426{
427 struct tmio_mmc_host *host = mmc_priv(mmc);
Ian Molton4a489982008-07-15 16:02:21 +0100428
429 if (ios->clock)
430 tmio_mmc_set_clock(host, ios->clock);
431
432 /* Power sequence - OFF -> ON -> UP */
433 switch (ios->power_mode) {
434 case MMC_POWER_OFF: /* power down SD bus */
Philipp Zabel5e746722009-06-04 20:12:32 +0200435 sd_config_write8(host, CNF_PWR_CTL_2, 0x00);
Ian Molton4a489982008-07-15 16:02:21 +0100436 tmio_mmc_clk_stop(host);
437 break;
438 case MMC_POWER_ON: /* power up SD bus */
439
Philipp Zabel5e746722009-06-04 20:12:32 +0200440 sd_config_write8(host, CNF_PWR_CTL_2, 0x02);
Ian Molton4a489982008-07-15 16:02:21 +0100441 break;
442 case MMC_POWER_UP: /* start bus clock */
443 tmio_mmc_clk_start(host);
444 break;
445 }
446
447 switch (ios->bus_width) {
448 case MMC_BUS_WIDTH_1:
Philipp Zabel5e746722009-06-04 20:12:32 +0200449 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
Ian Molton4a489982008-07-15 16:02:21 +0100450 break;
451 case MMC_BUS_WIDTH_4:
Philipp Zabel5e746722009-06-04 20:12:32 +0200452 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
Ian Molton4a489982008-07-15 16:02:21 +0100453 break;
454 }
455
456 /* Let things settle. delay taken from winCE driver */
457 udelay(140);
458}
459
460static int tmio_mmc_get_ro(struct mmc_host *mmc)
461{
462 struct tmio_mmc_host *host = mmc_priv(mmc);
Ian Molton4a489982008-07-15 16:02:21 +0100463
Philipp Zabel5e746722009-06-04 20:12:32 +0200464 return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
Ian Molton4a489982008-07-15 16:02:21 +0100465}
466
467static struct mmc_host_ops tmio_mmc_ops = {
468 .request = tmio_mmc_request,
469 .set_ios = tmio_mmc_set_ios,
470 .get_ro = tmio_mmc_get_ro,
471};
472
473#ifdef CONFIG_PM
474static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state)
475{
476 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
477 struct mmc_host *mmc = platform_get_drvdata(dev);
478 int ret;
479
480 ret = mmc_suspend_host(mmc, state);
481
482 /* Tell MFD core it can disable us now.*/
483 if (!ret && cell->disable)
484 cell->disable(dev);
485
486 return ret;
487}
488
489static int tmio_mmc_resume(struct platform_device *dev)
490{
491 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
492 struct mmc_host *mmc = platform_get_drvdata(dev);
493 struct tmio_mmc_host *host = mmc_priv(mmc);
Ian Molton4a489982008-07-15 16:02:21 +0100494 int ret = 0;
495
496 /* Enable the MMC/SD Control registers */
Philipp Zabel5e746722009-06-04 20:12:32 +0200497 sd_config_write16(host, CNF_CMD, SDCREN);
498 sd_config_write32(host, CNF_CTL_BASE,
499 (dev->resource[0].start >> host->bus_shift) & 0xfffe);
Ian Molton4a489982008-07-15 16:02:21 +0100500
501 /* Tell the MFD core we are ready to be enabled */
502 if (cell->enable) {
503 ret = cell->enable(dev);
504 if (ret)
505 goto out;
506 }
507
508 mmc_resume_host(mmc);
509
510out:
511 return ret;
512}
513#else
514#define tmio_mmc_suspend NULL
515#define tmio_mmc_resume NULL
516#endif
517
518static int __devinit tmio_mmc_probe(struct platform_device *dev)
519{
520 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
Philipp Zabelf0e46cc2009-06-04 20:12:31 +0200521 struct tmio_mmc_data *pdata;
Ian Molton4a489982008-07-15 16:02:21 +0100522 struct resource *res_ctl, *res_cnf;
523 struct tmio_mmc_host *host;
524 struct mmc_host *mmc;
Philipp Zabeld6c9b5e2009-06-04 20:12:34 +0200525 int ret = -EINVAL;
Ian Molton4a489982008-07-15 16:02:21 +0100526
527 if (dev->num_resources != 3)
528 goto out;
529
530 res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0);
531 res_cnf = platform_get_resource(dev, IORESOURCE_MEM, 1);
Philipp Zabeld6c9b5e2009-06-04 20:12:34 +0200532 if (!res_ctl || !res_cnf)
Ian Molton4a489982008-07-15 16:02:21 +0100533 goto out;
Ian Molton4a489982008-07-15 16:02:21 +0100534
Philipp Zabelf0e46cc2009-06-04 20:12:31 +0200535 pdata = cell->driver_data;
Philipp Zabeld6c9b5e2009-06-04 20:12:34 +0200536 if (!pdata || !pdata->hclk)
Philipp Zabelf0e46cc2009-06-04 20:12:31 +0200537 goto out;
Philipp Zabeld6c9b5e2009-06-04 20:12:34 +0200538
539 ret = -ENOMEM;
Philipp Zabelf0e46cc2009-06-04 20:12:31 +0200540
Ian Molton4a489982008-07-15 16:02:21 +0100541 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev);
542 if (!mmc)
543 goto out;
544
545 host = mmc_priv(mmc);
546 host->mmc = mmc;
547 platform_set_drvdata(dev, mmc);
548
Philipp Zabel5e746722009-06-04 20:12:32 +0200549 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
550 host->bus_shift = resource_size(res_ctl) >> 10;
551
Magnus Dammbc6772a2009-03-11 21:58:54 +0900552 host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
Ian Molton4a489982008-07-15 16:02:21 +0100553 if (!host->ctl)
554 goto host_free;
555
Magnus Dammbc6772a2009-03-11 21:58:54 +0900556 host->cnf = ioremap(res_cnf->start, resource_size(res_cnf));
Ian Molton4a489982008-07-15 16:02:21 +0100557 if (!host->cnf)
558 goto unmap_ctl;
559
560 mmc->ops = &tmio_mmc_ops;
561 mmc->caps = MMC_CAP_4_BIT_DATA;
Philipp Zabelf0e46cc2009-06-04 20:12:31 +0200562 mmc->f_max = pdata->hclk;
563 mmc->f_min = mmc->f_max / 512;
Ian Molton4a489982008-07-15 16:02:21 +0100564 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
565
566 /* Enable the MMC/SD Control registers */
Philipp Zabel5e746722009-06-04 20:12:32 +0200567 sd_config_write16(host, CNF_CMD, SDCREN);
568 sd_config_write32(host, CNF_CTL_BASE,
569 (dev->resource[0].start >> host->bus_shift) & 0xfffe);
Ian Molton4a489982008-07-15 16:02:21 +0100570
571 /* Tell the MFD core we are ready to be enabled */
572 if (cell->enable) {
573 ret = cell->enable(dev);
574 if (ret)
575 goto unmap_cnf;
576 }
577
578 /* Disable SD power during suspend */
Philipp Zabel5e746722009-06-04 20:12:32 +0200579 sd_config_write8(host, CNF_PWR_CTL_3, 0x01);
Ian Molton4a489982008-07-15 16:02:21 +0100580
581 /* The below is required but why? FIXME */
Philipp Zabel5e746722009-06-04 20:12:32 +0200582 sd_config_write8(host, CNF_STOP_CLK_CTL, 0x1f);
Ian Molton4a489982008-07-15 16:02:21 +0100583
584 /* Power down SD bus*/
Philipp Zabel5e746722009-06-04 20:12:32 +0200585 sd_config_write8(host, CNF_PWR_CTL_2, 0x00);
Ian Molton4a489982008-07-15 16:02:21 +0100586
587 tmio_mmc_clk_stop(host);
588 reset(host);
589
590 ret = platform_get_irq(dev, 0);
591 if (ret >= 0)
592 host->irq = ret;
593 else
594 goto unmap_cnf;
595
Philipp Zabel5e746722009-06-04 20:12:32 +0200596 disable_mmc_irqs(host, TMIO_MASK_ALL);
Ian Molton4a489982008-07-15 16:02:21 +0100597
Philipp Zabel6c413cc2009-06-04 20:12:33 +0200598 ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED |
599 IRQF_TRIGGER_FALLING, "tmio-mmc", host);
Ian Molton4a489982008-07-15 16:02:21 +0100600 if (ret)
601 goto unmap_cnf;
602
Ian Molton4a489982008-07-15 16:02:21 +0100603 mmc_add_host(mmc);
604
605 printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
606 (unsigned long)host->ctl, host->irq);
607
608 /* Unmask the IRQs we want to know about */
Philipp Zabel5e746722009-06-04 20:12:32 +0200609 enable_mmc_irqs(host, TMIO_MASK_IRQ);
Ian Molton4a489982008-07-15 16:02:21 +0100610
611 return 0;
612
613unmap_cnf:
614 iounmap(host->cnf);
615unmap_ctl:
616 iounmap(host->ctl);
617host_free:
618 mmc_free_host(mmc);
619out:
620 return ret;
621}
622
623static int __devexit tmio_mmc_remove(struct platform_device *dev)
624{
625 struct mmc_host *mmc = platform_get_drvdata(dev);
626
627 platform_set_drvdata(dev, NULL);
628
629 if (mmc) {
630 struct tmio_mmc_host *host = mmc_priv(mmc);
631 mmc_remove_host(mmc);
Ian Molton4a489982008-07-15 16:02:21 +0100632 free_irq(host->irq, host);
633 iounmap(host->ctl);
634 iounmap(host->cnf);
Magnus Dammbedcc452009-03-11 21:59:03 +0900635 mmc_free_host(mmc);
Ian Molton4a489982008-07-15 16:02:21 +0100636 }
637
638 return 0;
639}
640
641/* ------------------- device registration ----------------------- */
642
643static struct platform_driver tmio_mmc_driver = {
644 .driver = {
645 .name = "tmio-mmc",
646 .owner = THIS_MODULE,
647 },
648 .probe = tmio_mmc_probe,
649 .remove = __devexit_p(tmio_mmc_remove),
650 .suspend = tmio_mmc_suspend,
651 .resume = tmio_mmc_resume,
652};
653
654
655static int __init tmio_mmc_init(void)
656{
657 return platform_driver_register(&tmio_mmc_driver);
658}
659
660static void __exit tmio_mmc_exit(void)
661{
662 platform_driver_unregister(&tmio_mmc_driver);
663}
664
665module_init(tmio_mmc_init);
666module_exit(tmio_mmc_exit);
667
668MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver");
669MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
670MODULE_LICENSE("GPL v2");
671MODULE_ALIAS("platform:tmio-mmc");