Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-at91/board-yl-9200.c |
| 3 | * |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 4 | * Adapted from various board files in arch/arm/mach-at91 |
| 5 | * |
| 6 | * Modifications for YL-9200 platform: |
| 7 | * Copyright (C) 2007 S. Birtles |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <linux/types.h> |
Russell King | 2f8163b | 2011-07-26 10:53:52 +0100 | [diff] [blame] | 25 | #include <linux/gpio.h> |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 26 | #include <linux/init.h> |
| 27 | #include <linux/mm.h> |
| 28 | #include <linux/module.h> |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 29 | #include <linux/dma-mapping.h> |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 30 | #include <linux/platform_device.h> |
| 31 | #include <linux/spi/spi.h> |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 32 | #include <linux/spi/ads7846.h> |
| 33 | #include <linux/mtd/physmap.h> |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 34 | #include <linux/gpio_keys.h> |
| 35 | #include <linux/input.h> |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 36 | |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 37 | #include <asm/setup.h> |
| 38 | #include <asm/mach-types.h> |
| 39 | #include <asm/irq.h> |
| 40 | |
| 41 | #include <asm/mach/arch.h> |
| 42 | #include <asm/mach/map.h> |
| 43 | #include <asm/mach/irq.h> |
| 44 | |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 45 | #include <mach/hardware.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 46 | #include <mach/at91rm9200_mc.h> |
Jean-Christophe PLAGNIOL-VILLARD | f363c40 | 2012-02-13 12:58:53 +0800 | [diff] [blame] | 47 | #include <mach/at91_ramc.h> |
Jean-Christophe PLAGNIOL-VILLARD | e57556e3 | 2011-04-24 11:40:22 +0800 | [diff] [blame] | 48 | #include <mach/cpu.h> |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 49 | |
Jean-Christophe PLAGNIOL-VILLARD | a510b9b | 2012-10-30 06:41:28 +0800 | [diff] [blame] | 50 | #include "at91_aic.h" |
Jean-Christophe PLAGNIOL-VILLARD | 43d2f53 | 2012-10-30 05:14:17 +0800 | [diff] [blame] | 51 | #include "board.h" |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 52 | #include "generic.h" |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 53 | |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 54 | |
Jean-Christophe PLAGNIOL-VILLARD | 1b021a3 | 2011-04-28 20:19:32 +0800 | [diff] [blame] | 55 | static void __init yl9200_init_early(void) |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 56 | { |
Jean-Christophe PLAGNIOL-VILLARD | e57556e3 | 2011-04-24 11:40:22 +0800 | [diff] [blame] | 57 | /* Set cpu type: PQFP */ |
| 58 | at91rm9200_set_type(ARCH_REVISON_9200_PQFP); |
| 59 | |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 60 | /* Initialize processor: 18.432 MHz crystal */ |
Jean-Christophe PLAGNIOL-VILLARD | 21d08b9 | 2011-04-23 15:28:34 +0800 | [diff] [blame] | 61 | at91_initialize(18432000); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 62 | } |
| 63 | |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 64 | /* |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 65 | * LEDs |
| 66 | */ |
| 67 | static struct gpio_led yl9200_leds[] = { |
| 68 | { /* D2 */ |
| 69 | .name = "led2", |
| 70 | .gpio = AT91_PIN_PB17, |
| 71 | .active_low = 1, |
| 72 | .default_trigger = "timer", |
| 73 | }, |
| 74 | { /* D3 */ |
| 75 | .name = "led3", |
| 76 | .gpio = AT91_PIN_PB16, |
| 77 | .active_low = 1, |
| 78 | .default_trigger = "heartbeat", |
| 79 | }, |
| 80 | { /* D4 */ |
| 81 | .name = "led4", |
| 82 | .gpio = AT91_PIN_PB15, |
| 83 | .active_low = 1, |
| 84 | }, |
| 85 | { /* D5 */ |
| 86 | .name = "led5", |
| 87 | .gpio = AT91_PIN_PB8, |
| 88 | .active_low = 1, |
| 89 | } |
| 90 | }; |
| 91 | |
| 92 | /* |
| 93 | * Ethernet |
| 94 | */ |
Jamie Iles | 84e0cdb | 2011-03-08 20:17:06 +0000 | [diff] [blame] | 95 | static struct macb_platform_data __initdata yl9200_eth_data = { |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 96 | .phy_irq_pin = AT91_PIN_PB28, |
| 97 | .is_rmii = 1, |
| 98 | }; |
| 99 | |
| 100 | /* |
| 101 | * USB Host |
| 102 | */ |
| 103 | static struct at91_usbh_data __initdata yl9200_usbh_data = { |
| 104 | .ports = 1, /* PQFP version of AT91RM9200 */ |
Jean-Christophe PLAGNIOL-VILLARD | 63b4c29 | 2011-11-25 01:51:06 +0800 | [diff] [blame] | 105 | .vbus_pin = {-EINVAL, -EINVAL}, |
| 106 | .overcurrent_pin= {-EINVAL, -EINVAL}, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 107 | }; |
| 108 | |
| 109 | /* |
| 110 | * USB Device |
| 111 | */ |
| 112 | static struct at91_udc_data __initdata yl9200_udc_data = { |
| 113 | .pullup_pin = AT91_PIN_PC4, |
| 114 | .vbus_pin = AT91_PIN_PC5, |
| 115 | .pullup_active_low = 1, /* Active Low due to PNP transistor (pg 7) */ |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 116 | |
| 117 | }; |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 118 | |
| 119 | /* |
| 120 | * MMC |
| 121 | */ |
Ludovic Desroches | 4cf3326 | 2012-05-21 12:23:27 +0200 | [diff] [blame] | 122 | static struct mci_platform_data __initdata yl9200_mci0_data = { |
| 123 | .slot[0] = { |
| 124 | .bus_width = 4, |
| 125 | .detect_pin = AT91_PIN_PB9, |
| 126 | .wp_pin = -EINVAL, |
| 127 | }, |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 128 | }; |
| 129 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 130 | /* |
| 131 | * NAND Flash |
| 132 | */ |
| 133 | static struct mtd_partition __initdata yl9200_nand_partition[] = { |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 134 | { |
| 135 | .name = "AT91 NAND partition 1, boot", |
| 136 | .offset = 0, |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 137 | .size = SZ_256K |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 138 | }, |
| 139 | { |
| 140 | .name = "AT91 NAND partition 2, kernel", |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 141 | .offset = MTDPART_OFS_NXTBLK, |
| 142 | .size = (2 * SZ_1M) - SZ_256K |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 143 | }, |
| 144 | { |
| 145 | .name = "AT91 NAND partition 3, filesystem", |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 146 | .offset = MTDPART_OFS_NXTBLK, |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 147 | .size = 14 * SZ_1M |
| 148 | }, |
| 149 | { |
| 150 | .name = "AT91 NAND partition 4, storage", |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 151 | .offset = MTDPART_OFS_NXTBLK, |
| 152 | .size = SZ_16M |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 153 | }, |
| 154 | { |
| 155 | .name = "AT91 NAND partition 5, ext-fs", |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 156 | .offset = MTDPART_OFS_NXTBLK, |
| 157 | .size = SZ_32M |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 158 | } |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 159 | }; |
| 160 | |
David Woodhouse | ff877ea | 2008-07-25 10:40:14 -0400 | [diff] [blame] | 161 | static struct atmel_nand_data __initdata yl9200_nand_data = { |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 162 | .ale = 6, |
| 163 | .cle = 7, |
Jean-Christophe PLAGNIOL-VILLARD | 63b4c29 | 2011-11-25 01:51:06 +0800 | [diff] [blame] | 164 | .det_pin = -EINVAL, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 165 | .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */ |
| 166 | .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */ |
Jean-Christophe PLAGNIOL-VILLARD | bf4289c | 2011-12-29 14:43:24 +0800 | [diff] [blame] | 167 | .ecc_mode = NAND_ECC_SOFT, |
Dmitry Eremin-Solenikov | 1754aab | 2011-05-29 17:49:22 +0400 | [diff] [blame] | 168 | .parts = yl9200_nand_partition, |
| 169 | .num_parts = ARRAY_SIZE(yl9200_nand_partition), |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 170 | }; |
| 171 | |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 172 | /* |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 173 | * NOR Flash |
| 174 | */ |
| 175 | #define YL9200_FLASH_BASE AT91_CHIPSELECT_0 |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 176 | #define YL9200_FLASH_SIZE SZ_16M |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 177 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 178 | static struct mtd_partition yl9200_flash_partitions[] = { |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 179 | { |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 180 | .name = "Bootloader", |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 181 | .offset = 0, |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 182 | .size = SZ_256K, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 183 | .mask_flags = MTD_WRITEABLE, /* force read-only */ |
| 184 | }, |
| 185 | { |
| 186 | .name = "Kernel", |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 187 | .offset = MTDPART_OFS_NXTBLK, |
| 188 | .size = (2 * SZ_1M) - SZ_256K |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 189 | }, |
| 190 | { |
| 191 | .name = "Filesystem", |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 192 | .offset = MTDPART_OFS_NXTBLK, |
| 193 | .size = MTDPART_SIZ_FULL |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 194 | } |
| 195 | }; |
| 196 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 197 | static struct physmap_flash_data yl9200_flash_data = { |
| 198 | .width = 2, |
| 199 | .parts = yl9200_flash_partitions, |
| 200 | .nr_parts = ARRAY_SIZE(yl9200_flash_partitions), |
| 201 | }; |
| 202 | |
| 203 | static struct resource yl9200_flash_resources[] = { |
| 204 | { |
| 205 | .start = YL9200_FLASH_BASE, |
| 206 | .end = YL9200_FLASH_BASE + YL9200_FLASH_SIZE - 1, |
| 207 | .flags = IORESOURCE_MEM, |
| 208 | } |
| 209 | }; |
| 210 | |
| 211 | static struct platform_device yl9200_flash = { |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 212 | .name = "physmap-flash", |
| 213 | .id = 0, |
| 214 | .dev = { |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 215 | .platform_data = &yl9200_flash_data, |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 216 | }, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 217 | .resource = yl9200_flash_resources, |
| 218 | .num_resources = ARRAY_SIZE(yl9200_flash_resources), |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 219 | }; |
| 220 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 221 | /* |
| 222 | * I2C (TWI) |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 223 | */ |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 224 | static struct i2c_board_info __initdata yl9200_i2c_devices[] = { |
| 225 | { /* EEPROM */ |
| 226 | I2C_BOARD_INFO("24c128", 0x50), |
| 227 | } |
| 228 | }; |
| 229 | |
| 230 | /* |
| 231 | * GPIO Buttons |
| 232 | */ |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 233 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 234 | static struct gpio_keys_button yl9200_buttons[] = { |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 235 | { |
| 236 | .gpio = AT91_PIN_PA24, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 237 | .code = BTN_2, |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 238 | .desc = "SW2", |
| 239 | .active_low = 1, |
| 240 | .wakeup = 1, |
| 241 | }, |
| 242 | { |
| 243 | .gpio = AT91_PIN_PB1, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 244 | .code = BTN_3, |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 245 | .desc = "SW3", |
| 246 | .active_low = 1, |
| 247 | .wakeup = 1, |
| 248 | }, |
| 249 | { |
| 250 | .gpio = AT91_PIN_PB2, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 251 | .code = BTN_4, |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 252 | .desc = "SW4", |
| 253 | .active_low = 1, |
| 254 | .wakeup = 1, |
| 255 | }, |
| 256 | { |
| 257 | .gpio = AT91_PIN_PB6, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 258 | .code = BTN_5, |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 259 | .desc = "SW5", |
| 260 | .active_low = 1, |
| 261 | .wakeup = 1, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 262 | } |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 263 | }; |
| 264 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 265 | static struct gpio_keys_platform_data yl9200_button_data = { |
| 266 | .buttons = yl9200_buttons, |
| 267 | .nbuttons = ARRAY_SIZE(yl9200_buttons), |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 268 | }; |
| 269 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 270 | static struct platform_device yl9200_button_device = { |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 271 | .name = "gpio-keys", |
| 272 | .id = -1, |
| 273 | .num_resources = 0, |
| 274 | .dev = { |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 275 | .platform_data = &yl9200_button_data, |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 276 | } |
| 277 | }; |
| 278 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 279 | static void __init yl9200_add_device_buttons(void) |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 280 | { |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 281 | at91_set_gpio_input(AT91_PIN_PA24, 1); /* SW2 */ |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 282 | at91_set_deglitch(AT91_PIN_PA24, 1); |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 283 | at91_set_gpio_input(AT91_PIN_PB1, 1); /* SW3 */ |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 284 | at91_set_deglitch(AT91_PIN_PB1, 1); |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 285 | at91_set_gpio_input(AT91_PIN_PB2, 1); /* SW4 */ |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 286 | at91_set_deglitch(AT91_PIN_PB2, 1); |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 287 | at91_set_gpio_input(AT91_PIN_PB6, 1); /* SW5 */ |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 288 | at91_set_deglitch(AT91_PIN_PB6, 1); |
| 289 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 290 | /* Enable buttons (Sheet 5) */ |
| 291 | at91_set_gpio_output(AT91_PIN_PB7, 1); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 292 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 293 | platform_device_register(&yl9200_button_device); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 294 | } |
| 295 | #else |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 296 | static void __init yl9200_add_device_buttons(void) {} |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 297 | #endif |
| 298 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 299 | /* |
| 300 | * Touchscreen |
| 301 | */ |
| 302 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) |
| 303 | static int ads7843_pendown_state(void) |
| 304 | { |
| 305 | return !at91_get_gpio_value(AT91_PIN_PB11); /* Touchscreen PENIRQ */ |
| 306 | } |
| 307 | |
| 308 | static struct ads7846_platform_data ads_info = { |
| 309 | .model = 7843, |
| 310 | .x_min = 150, |
| 311 | .x_max = 3830, |
| 312 | .y_min = 190, |
| 313 | .y_max = 3830, |
| 314 | .vref_delay_usecs = 100, |
| 315 | |
| 316 | /* For a 8" touch-screen */ |
| 317 | // .x_plate_ohms = 603, |
| 318 | // .y_plate_ohms = 332, |
| 319 | |
| 320 | /* For a 10.4" touch-screen */ |
| 321 | // .x_plate_ohms = 611, |
| 322 | // .y_plate_ohms = 325, |
| 323 | |
| 324 | .x_plate_ohms = 576, |
| 325 | .y_plate_ohms = 366, |
| 326 | |
| 327 | .pressure_max = 15000, /* generally nonsense on the 7843 */ |
| 328 | .debounce_max = 1, |
| 329 | .debounce_rep = 0, |
| 330 | .debounce_tol = (~0), |
| 331 | .get_pendown_state = ads7843_pendown_state, |
| 332 | }; |
| 333 | |
| 334 | static void __init yl9200_add_device_ts(void) |
| 335 | { |
| 336 | at91_set_gpio_input(AT91_PIN_PB11, 1); /* Touchscreen interrupt pin */ |
| 337 | at91_set_gpio_input(AT91_PIN_PB10, 1); /* Touchscreen BUSY signal - not used! */ |
| 338 | } |
| 339 | #else |
| 340 | static void __init yl9200_add_device_ts(void) {} |
| 341 | #endif |
| 342 | |
| 343 | /* |
| 344 | * SPI devices |
| 345 | */ |
| 346 | static struct spi_board_info yl9200_spi_devices[] = { |
| 347 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) |
| 348 | { /* Touchscreen */ |
| 349 | .modalias = "ads7846", |
| 350 | .chip_select = 0, |
| 351 | .max_speed_hz = 5000 * 26, |
| 352 | .platform_data = &ads_info, |
| 353 | .irq = AT91_PIN_PB11, |
| 354 | }, |
| 355 | #endif |
| 356 | { /* CAN */ |
| 357 | .modalias = "mcp2510", |
| 358 | .chip_select = 1, |
| 359 | .max_speed_hz = 25000 * 26, |
| 360 | .irq = AT91_PIN_PC0, |
| 361 | } |
| 362 | }; |
| 363 | |
| 364 | /* |
| 365 | * LCD / VGA |
| 366 | * |
| 367 | * EPSON S1D13806 FB (discontinued chip) |
| 368 | * EPSON S1D13506 FB |
| 369 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 3b24f09 | 2010-11-21 11:24:07 +0800 | [diff] [blame] | 370 | #if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE) |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 371 | #include <video/s1d13xxxfb.h> |
| 372 | |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 373 | |
Jean-Christophe PLAGNIOL-VILLARD | b2eb530 | 2011-09-19 19:26:52 +0800 | [diff] [blame] | 374 | static void yl9200_init_video(void) |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 375 | { |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 376 | /* NWAIT Signal */ |
| 377 | at91_set_A_periph(AT91_PIN_PC6, 0); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 378 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 379 | /* Initialization of the Static Memory Controller for Chip Select 2 */ |
Jean-Christophe PLAGNIOL-VILLARD | f363c40 | 2012-02-13 12:58:53 +0800 | [diff] [blame] | 380 | at91_ramc_write(0, AT91_SMC_CSR(2), AT91_SMC_DBW_16 /* 16 bit */ |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 381 | | AT91_SMC_WSEN | AT91_SMC_NWS_(0x4) /* wait states */ |
| 382 | | AT91_SMC_TDF_(0x100) /* float time */ |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 383 | ); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 384 | } |
| 385 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 386 | static struct s1d13xxxfb_regval yl9200_s1dfb_initregs[] = |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 387 | { |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 388 | {S1DREG_MISC, 0x00}, /* Miscellaneous Register*/ |
| 389 | {S1DREG_COM_DISP_MODE, 0x01}, /* Display Mode Register, LCD only*/ |
| 390 | {S1DREG_GPIO_CNF0, 0x00}, /* General IO Pins Configuration Register*/ |
| 391 | {S1DREG_GPIO_CTL0, 0x00}, /* General IO Pins Control Register*/ |
| 392 | {S1DREG_CLK_CNF, 0x11}, /* Memory Clock Configuration Register*/ |
| 393 | {S1DREG_LCD_CLK_CNF, 0x10}, /* LCD Pixel Clock Configuration Register*/ |
| 394 | {S1DREG_CRT_CLK_CNF, 0x12}, /* CRT/TV Pixel Clock Configuration Register*/ |
| 395 | {S1DREG_MPLUG_CLK_CNF, 0x01}, /* MediaPlug Clock Configuration Register*/ |
| 396 | {S1DREG_CPU2MEM_WST_SEL, 0x02}, /* CPU To Memory Wait State Select Register*/ |
| 397 | {S1DREG_MEM_CNF, 0x00}, /* Memory Configuration Register*/ |
| 398 | {S1DREG_SDRAM_REF_RATE, 0x04}, /* DRAM Refresh Rate Register, MCLK source*/ |
| 399 | {S1DREG_SDRAM_TC0, 0x12}, /* DRAM Timings Control Register 0*/ |
| 400 | {S1DREG_SDRAM_TC1, 0x02}, /* DRAM Timings Control Register 1*/ |
| 401 | {S1DREG_PANEL_TYPE, 0x25}, /* Panel Type Register*/ |
| 402 | {S1DREG_MOD_RATE, 0x00}, /* MOD Rate Register*/ |
| 403 | {S1DREG_LCD_DISP_HWIDTH, 0x4F}, /* LCD Horizontal Display Width Register*/ |
| 404 | {S1DREG_LCD_NDISP_HPER, 0x13}, /* LCD Horizontal Non-Display Period Register*/ |
| 405 | {S1DREG_TFT_FPLINE_START, 0x01}, /* TFT FPLINE Start Position Register*/ |
| 406 | {S1DREG_TFT_FPLINE_PWIDTH, 0x0c}, /* TFT FPLINE Pulse Width Register*/ |
| 407 | {S1DREG_LCD_DISP_VHEIGHT0, 0xDF}, /* LCD Vertical Display Height Register 0*/ |
| 408 | {S1DREG_LCD_DISP_VHEIGHT1, 0x01}, /* LCD Vertical Display Height Register 1*/ |
| 409 | {S1DREG_LCD_NDISP_VPER, 0x2c}, /* LCD Vertical Non-Display Period Register*/ |
| 410 | {S1DREG_TFT_FPFRAME_START, 0x0a}, /* TFT FPFRAME Start Position Register*/ |
| 411 | {S1DREG_TFT_FPFRAME_PWIDTH, 0x02}, /* TFT FPFRAME Pulse Width Register*/ |
| 412 | {S1DREG_LCD_DISP_MODE, 0x05}, /* LCD Display Mode Register*/ |
| 413 | {S1DREG_LCD_MISC, 0x01}, /* LCD Miscellaneous Register*/ |
| 414 | {S1DREG_LCD_DISP_START0, 0x00}, /* LCD Display Start Address Register 0*/ |
| 415 | {S1DREG_LCD_DISP_START1, 0x00}, /* LCD Display Start Address Register 1*/ |
| 416 | {S1DREG_LCD_DISP_START2, 0x00}, /* LCD Display Start Address Register 2*/ |
| 417 | {S1DREG_LCD_MEM_OFF0, 0x80}, /* LCD Memory Address Offset Register 0*/ |
| 418 | {S1DREG_LCD_MEM_OFF1, 0x02}, /* LCD Memory Address Offset Register 1*/ |
| 419 | {S1DREG_LCD_PIX_PAN, 0x03}, /* LCD Pixel Panning Register*/ |
| 420 | {S1DREG_LCD_DISP_FIFO_HTC, 0x00}, /* LCD Display FIFO High Threshold Control Register*/ |
| 421 | {S1DREG_LCD_DISP_FIFO_LTC, 0x00}, /* LCD Display FIFO Low Threshold Control Register*/ |
| 422 | {S1DREG_CRT_DISP_HWIDTH, 0x4F}, /* CRT/TV Horizontal Display Width Register*/ |
| 423 | {S1DREG_CRT_NDISP_HPER, 0x13}, /* CRT/TV Horizontal Non-Display Period Register*/ |
| 424 | {S1DREG_CRT_HRTC_START, 0x01}, /* CRT/TV HRTC Start Position Register*/ |
| 425 | {S1DREG_CRT_HRTC_PWIDTH, 0x0B}, /* CRT/TV HRTC Pulse Width Register*/ |
| 426 | {S1DREG_CRT_DISP_VHEIGHT0, 0xDF}, /* CRT/TV Vertical Display Height Register 0*/ |
| 427 | {S1DREG_CRT_DISP_VHEIGHT1, 0x01}, /* CRT/TV Vertical Display Height Register 1*/ |
| 428 | {S1DREG_CRT_NDISP_VPER, 0x2B}, /* CRT/TV Vertical Non-Display Period Register*/ |
| 429 | {S1DREG_CRT_VRTC_START, 0x09}, /* CRT/TV VRTC Start Position Register*/ |
| 430 | {S1DREG_CRT_VRTC_PWIDTH, 0x01}, /* CRT/TV VRTC Pulse Width Register*/ |
| 431 | {S1DREG_TV_OUT_CTL, 0x18}, /* TV Output Control Register */ |
| 432 | {S1DREG_CRT_DISP_MODE, 0x05}, /* CRT/TV Display Mode Register, 16BPP*/ |
| 433 | {S1DREG_CRT_DISP_START0, 0x00}, /* CRT/TV Display Start Address Register 0*/ |
| 434 | {S1DREG_CRT_DISP_START1, 0x00}, /* CRT/TV Display Start Address Register 1*/ |
| 435 | {S1DREG_CRT_DISP_START2, 0x00}, /* CRT/TV Display Start Address Register 2*/ |
| 436 | {S1DREG_CRT_MEM_OFF0, 0x80}, /* CRT/TV Memory Address Offset Register 0*/ |
| 437 | {S1DREG_CRT_MEM_OFF1, 0x02}, /* CRT/TV Memory Address Offset Register 1*/ |
| 438 | {S1DREG_CRT_PIX_PAN, 0x00}, /* CRT/TV Pixel Panning Register*/ |
| 439 | {S1DREG_CRT_DISP_FIFO_HTC, 0x00}, /* CRT/TV Display FIFO High Threshold Control Register*/ |
| 440 | {S1DREG_CRT_DISP_FIFO_LTC, 0x00}, /* CRT/TV Display FIFO Low Threshold Control Register*/ |
| 441 | {S1DREG_LCD_CUR_CTL, 0x00}, /* LCD Ink/Cursor Control Register*/ |
| 442 | {S1DREG_LCD_CUR_START, 0x01}, /* LCD Ink/Cursor Start Address Register*/ |
| 443 | {S1DREG_LCD_CUR_XPOS0, 0x00}, /* LCD Cursor X Position Register 0*/ |
| 444 | {S1DREG_LCD_CUR_XPOS1, 0x00}, /* LCD Cursor X Position Register 1*/ |
| 445 | {S1DREG_LCD_CUR_YPOS0, 0x00}, /* LCD Cursor Y Position Register 0*/ |
| 446 | {S1DREG_LCD_CUR_YPOS1, 0x00}, /* LCD Cursor Y Position Register 1*/ |
| 447 | {S1DREG_LCD_CUR_BCTL0, 0x00}, /* LCD Ink/Cursor Blue Color 0 Register*/ |
| 448 | {S1DREG_LCD_CUR_GCTL0, 0x00}, /* LCD Ink/Cursor Green Color 0 Register*/ |
| 449 | {S1DREG_LCD_CUR_RCTL0, 0x00}, /* LCD Ink/Cursor Red Color 0 Register*/ |
| 450 | {S1DREG_LCD_CUR_BCTL1, 0x1F}, /* LCD Ink/Cursor Blue Color 1 Register*/ |
| 451 | {S1DREG_LCD_CUR_GCTL1, 0x3F}, /* LCD Ink/Cursor Green Color 1 Register*/ |
| 452 | {S1DREG_LCD_CUR_RCTL1, 0x1F}, /* LCD Ink/Cursor Red Color 1 Register*/ |
| 453 | {S1DREG_LCD_CUR_FIFO_HTC, 0x00}, /* LCD Ink/Cursor FIFO Threshold Register*/ |
| 454 | {S1DREG_CRT_CUR_CTL, 0x00}, /* CRT/TV Ink/Cursor Control Register*/ |
| 455 | {S1DREG_CRT_CUR_START, 0x01}, /* CRT/TV Ink/Cursor Start Address Register*/ |
| 456 | {S1DREG_CRT_CUR_XPOS0, 0x00}, /* CRT/TV Cursor X Position Register 0*/ |
| 457 | {S1DREG_CRT_CUR_XPOS1, 0x00}, /* CRT/TV Cursor X Position Register 1*/ |
| 458 | {S1DREG_CRT_CUR_YPOS0, 0x00}, /* CRT/TV Cursor Y Position Register 0*/ |
| 459 | {S1DREG_CRT_CUR_YPOS1, 0x00}, /* CRT/TV Cursor Y Position Register 1*/ |
| 460 | {S1DREG_CRT_CUR_BCTL0, 0x00}, /* CRT/TV Ink/Cursor Blue Color 0 Register*/ |
| 461 | {S1DREG_CRT_CUR_GCTL0, 0x00}, /* CRT/TV Ink/Cursor Green Color 0 Register*/ |
| 462 | {S1DREG_CRT_CUR_RCTL0, 0x00}, /* CRT/TV Ink/Cursor Red Color 0 Register*/ |
| 463 | {S1DREG_CRT_CUR_BCTL1, 0x1F}, /* CRT/TV Ink/Cursor Blue Color 1 Register*/ |
| 464 | {S1DREG_CRT_CUR_GCTL1, 0x3F}, /* CRT/TV Ink/Cursor Green Color 1 Register*/ |
| 465 | {S1DREG_CRT_CUR_RCTL1, 0x1F}, /* CRT/TV Ink/Cursor Red Color 1 Register*/ |
| 466 | {S1DREG_CRT_CUR_FIFO_HTC, 0x00}, /* CRT/TV Ink/Cursor FIFO Threshold Register*/ |
| 467 | {S1DREG_BBLT_CTL0, 0x00}, /* BitBlt Control Register 0*/ |
| 468 | {S1DREG_BBLT_CTL1, 0x01}, /* BitBlt Control Register 1*/ |
| 469 | {S1DREG_BBLT_CC_EXP, 0x00}, /* BitBlt ROP Code/Color Expansion Register*/ |
| 470 | {S1DREG_BBLT_OP, 0x00}, /* BitBlt Operation Register*/ |
| 471 | {S1DREG_BBLT_SRC_START0, 0x00}, /* BitBlt Source Start Address Register 0*/ |
| 472 | {S1DREG_BBLT_SRC_START1, 0x00}, /* BitBlt Source Start Address Register 1*/ |
| 473 | {S1DREG_BBLT_SRC_START2, 0x00}, /* BitBlt Source Start Address Register 2*/ |
| 474 | {S1DREG_BBLT_DST_START0, 0x00}, /* BitBlt Destination Start Address Register 0*/ |
| 475 | {S1DREG_BBLT_DST_START1, 0x00}, /* BitBlt Destination Start Address Register 1*/ |
| 476 | {S1DREG_BBLT_DST_START2, 0x00}, /* BitBlt Destination Start Address Register 2*/ |
| 477 | {S1DREG_BBLT_MEM_OFF0, 0x00}, /* BitBlt Memory Address Offset Register 0*/ |
| 478 | {S1DREG_BBLT_MEM_OFF1, 0x00}, /* BitBlt Memory Address Offset Register 1*/ |
| 479 | {S1DREG_BBLT_WIDTH0, 0x00}, /* BitBlt Width Register 0*/ |
| 480 | {S1DREG_BBLT_WIDTH1, 0x00}, /* BitBlt Width Register 1*/ |
| 481 | {S1DREG_BBLT_HEIGHT0, 0x00}, /* BitBlt Height Register 0*/ |
| 482 | {S1DREG_BBLT_HEIGHT1, 0x00}, /* BitBlt Height Register 1*/ |
| 483 | {S1DREG_BBLT_BGC0, 0x00}, /* BitBlt Background Color Register 0*/ |
| 484 | {S1DREG_BBLT_BGC1, 0x00}, /* BitBlt Background Color Register 1*/ |
| 485 | {S1DREG_BBLT_FGC0, 0x00}, /* BitBlt Foreground Color Register 0*/ |
| 486 | {S1DREG_BBLT_FGC1, 0x00}, /* BitBlt Foreground Color Register 1*/ |
| 487 | {S1DREG_LKUP_MODE, 0x00}, /* Look-Up Table Mode Register*/ |
| 488 | {S1DREG_LKUP_ADDR, 0x00}, /* Look-Up Table Address Register*/ |
| 489 | {S1DREG_PS_CNF, 0x00}, /* Power Save Configuration Register*/ |
| 490 | {S1DREG_PS_STATUS, 0x00}, /* Power Save Status Register*/ |
| 491 | {S1DREG_CPU2MEM_WDOGT, 0x00}, /* CPU-to-Memory Access Watchdog Timer Register*/ |
| 492 | {S1DREG_COM_DISP_MODE, 0x01}, /* Display Mode Register, LCD only*/ |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 493 | }; |
| 494 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 495 | static struct s1d13xxxfb_pdata yl9200_s1dfb_pdata = { |
| 496 | .initregs = yl9200_s1dfb_initregs, |
| 497 | .initregssize = ARRAY_SIZE(yl9200_s1dfb_initregs), |
| 498 | .platform_init_video = yl9200_init_video, |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 499 | }; |
| 500 | |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 501 | #define YL9200_FB_REG_BASE AT91_CHIPSELECT_7 |
| 502 | #define YL9200_FB_VMEM_BASE YL9200_FB_REG_BASE + SZ_2M |
| 503 | #define YL9200_FB_VMEM_SIZE SZ_2M |
| 504 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 505 | static struct resource yl9200_s1dfb_resource[] = { |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 506 | [0] = { /* video mem */ |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 507 | .name = "s1d13xxxfb memory", |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 508 | .start = YL9200_FB_VMEM_BASE, |
| 509 | .end = YL9200_FB_VMEM_BASE + YL9200_FB_VMEM_SIZE -1, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 510 | .flags = IORESOURCE_MEM, |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 511 | }, |
| 512 | [1] = { /* video registers */ |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 513 | .name = "s1d13xxxfb registers", |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 514 | .start = YL9200_FB_REG_BASE, |
| 515 | .end = YL9200_FB_REG_BASE + SZ_512 -1, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 516 | .flags = IORESOURCE_MEM, |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 517 | }, |
| 518 | }; |
| 519 | |
Andrew Victor | e505240 | 2008-09-21 21:30:02 +0100 | [diff] [blame] | 520 | static u64 s1dfb_dmamask = DMA_BIT_MASK(32); |
| 521 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 522 | static struct platform_device yl9200_s1dfb_device = { |
| 523 | .name = "s1d13806fb", |
| 524 | .id = -1, |
| 525 | .dev = { |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 526 | .dma_mask = &s1dfb_dmamask, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 527 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 528 | .platform_data = &yl9200_s1dfb_pdata, |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 529 | }, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 530 | .resource = yl9200_s1dfb_resource, |
| 531 | .num_resources = ARRAY_SIZE(yl9200_s1dfb_resource), |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 532 | }; |
| 533 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 534 | void __init yl9200_add_device_video(void) |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 535 | { |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 536 | platform_device_register(&yl9200_s1dfb_device); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 537 | } |
| 538 | #else |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 539 | void __init yl9200_add_device_video(void) {} |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 540 | #endif |
| 541 | |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 542 | |
| 543 | static void __init yl9200_board_init(void) |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 544 | { |
| 545 | /* Serial */ |
Jean-Christophe PLAGNIOL-VILLARD | 71b149b | 2012-04-05 14:14:28 +0800 | [diff] [blame] | 546 | /* DBGU on ttyS0. (Rx & Tx only) */ |
| 547 | at91_register_uart(0, 0, 0); |
| 548 | |
| 549 | /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ |
| 550 | at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS |
| 551 | | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD |
| 552 | | ATMEL_UART_RI); |
| 553 | |
| 554 | /* USART0 on ttyS2. (Rx & Tx only to JP3) */ |
| 555 | at91_register_uart(AT91RM9200_ID_US0, 2, 0); |
| 556 | |
| 557 | /* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */ |
| 558 | at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 559 | at91_add_device_serial(); |
| 560 | /* Ethernet */ |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 561 | at91_add_device_eth(&yl9200_eth_data); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 562 | /* USB Host */ |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 563 | at91_add_device_usbh(&yl9200_usbh_data); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 564 | /* USB Device */ |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 565 | at91_add_device_udc(&yl9200_udc_data); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 566 | /* I2C */ |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 567 | at91_add_device_i2c(yl9200_i2c_devices, ARRAY_SIZE(yl9200_i2c_devices)); |
| 568 | /* MMC */ |
Ludovic Desroches | 4cf3326 | 2012-05-21 12:23:27 +0200 | [diff] [blame] | 569 | at91_add_device_mci(0, &yl9200_mci0_data); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 570 | /* NAND */ |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 571 | at91_add_device_nand(&yl9200_nand_data); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 572 | /* NOR Flash */ |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 573 | platform_device_register(&yl9200_flash); |
| 574 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) |
| 575 | /* SPI */ |
| 576 | at91_add_device_spi(yl9200_spi_devices, ARRAY_SIZE(yl9200_spi_devices)); |
| 577 | /* Touchscreen */ |
| 578 | yl9200_add_device_ts(); |
| 579 | #endif |
| 580 | /* LEDs. */ |
| 581 | at91_gpio_leds(yl9200_leds, ARRAY_SIZE(yl9200_leds)); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 582 | /* Push Buttons */ |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 583 | yl9200_add_device_buttons(); |
| 584 | /* VGA */ |
| 585 | yl9200_add_device_video(); |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 586 | } |
| 587 | |
| 588 | MACHINE_START(YL9200, "uCdragon YL-9200") |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 589 | /* Maintainer: S.Birtles */ |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 590 | .timer = &at91rm9200_timer, |
Jean-Christophe PLAGNIOL-VILLARD | 21d08b9 | 2011-04-23 15:28:34 +0800 | [diff] [blame] | 591 | .map_io = at91_map_io, |
Ludovic Desroches | 3e13546 | 2012-06-11 15:38:03 +0200 | [diff] [blame] | 592 | .handle_irq = at91_aic_handle_irq, |
Jean-Christophe PLAGNIOL-VILLARD | 1b021a3 | 2011-04-28 20:19:32 +0800 | [diff] [blame] | 593 | .init_early = yl9200_init_early, |
Jean-Christophe PLAGNIOL-VILLARD | 92100c1 | 2011-04-23 15:28:34 +0800 | [diff] [blame] | 594 | .init_irq = at91_init_irq_default, |
Andrew Victor | e3ba22d | 2008-05-24 17:06:45 +0100 | [diff] [blame] | 595 | .init_machine = yl9200_board_init, |
Steve Birtles | 3ad0920 | 2008-02-09 04:49:55 +0100 | [diff] [blame] | 596 | MACHINE_END |