blob: 7ccf67e228fcfc9e86dbf8d9d306f74080babfcf [file] [log] [blame]
Grant Likely8e267f32011-07-19 17:26:54 -06001/dts-v1/;
2
Grant Likely8e267f32011-07-19 17:26:54 -06003/include/ "tegra20.dtsi"
4
5/ {
6 model = "NVIDIA Seaboard";
7 compatible = "nvidia,seaboard", "nvidia,tegra20";
8
Grant Likely8e267f32011-07-19 17:26:54 -06009 memory {
10 device_type = "memory";
11 reg = < 0x00000000 0x40000000 >;
12 };
13
Stephen Warren88950f3b2011-11-21 14:44:09 -070014 i2c@7000c000 {
15 clock-frequency = <400000>;
16 };
17
18 i2c@7000c400 {
19 clock-frequency = <400000>;
20 };
21
22 i2c@7000c500 {
23 clock-frequency = <400000>;
24 };
25
26 i2c@7000d000 {
27 clock-frequency = <400000>;
Stephen Warren401c9a52011-12-17 23:29:32 -070028
29 adt7461@4c {
30 compatible = "adt7461";
31 reg = <0x4c>;
32 };
Stephen Warren88950f3b2011-11-21 14:44:09 -070033 };
34
Stephen Warren31c1ec92011-11-21 14:44:10 -070035 serial@70006000 {
36 status = "disable";
37 };
38
39 serial@70006040 {
40 status = "disable";
41 };
42
43 serial@70006200 {
44 status = "disable";
45 };
46
Grant Likely8e267f32011-07-19 17:26:54 -060047 serial@70006300 {
48 clock-frequency = < 216000000 >;
49 };
50
Stephen Warren31c1ec92011-11-21 14:44:10 -070051 serial@70006400 {
52 status = "disable";
53 };
54
Stephen Warren1292c122011-11-21 14:44:11 -070055 sdhci@c8000000 {
56 status = "disable";
57 };
58
59 sdhci@c8000200 {
60 status = "disable";
61 };
62
Grant Likely8e267f32011-07-19 17:26:54 -060063 sdhci@c8000400 {
Stephen Warrena0638eb2011-09-20 10:46:25 -060064 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
65 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
66 power-gpios = <&gpio 70 0>; /* gpio PI6 */
Grant Likely8e267f32011-07-19 17:26:54 -060067 };
Stephen Warren6111d502011-09-20 10:46:26 -060068
69 sdhci@c8000600 {
70 support-8bit;
71 };
Olof Johanssonc27317c2011-11-04 09:12:39 +000072
73 usb@c5000000 {
74 nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
75 };
Stephen Warrenf0d14302011-12-17 22:18:23 -070076
77 gpio-keys {
78 compatible = "gpio-keys";
79
80 power {
81 label = "Power";
82 gpios = <&gpio 170 1>; /* gpio PV2, active low */
83 linux,code = <116>; /* KEY_POWER */
84 gpio-key,wakeup;
85 };
86
87 lid {
88 label = "Lid";
89 gpios = <&gpio 23 0>; /* gpio PC7 */
90 linux,input-type = <5>; /* EV_SW */
91 linux,code = <0>; /* SW_LID */
92 debounce-interval = <1>;
93 gpio-key,wakeup;
94 };
95 };
Olof Johanssond8017a92011-10-18 11:06:06 -070096
97 emc@7000f400 {
98 emc-table@190000 {
99 reg = < 190000 >;
100 compatible = "nvidia,tegra20-emc-table";
101 clock-frequency = < 190000 >;
102 nvidia,emc-registers = < 0x0000000c 0x00000026
103 0x00000009 0x00000003 0x00000004 0x00000004
104 0x00000002 0x0000000c 0x00000003 0x00000003
105 0x00000002 0x00000001 0x00000004 0x00000005
106 0x00000004 0x00000009 0x0000000d 0x0000059f
107 0x00000000 0x00000003 0x00000003 0x00000003
108 0x00000003 0x00000001 0x0000000b 0x000000c8
109 0x00000003 0x00000007 0x00000004 0x0000000f
110 0x00000002 0x00000000 0x00000000 0x00000002
111 0x00000000 0x00000000 0x00000083 0xa06204ae
112 0x007dc010 0x00000000 0x00000000 0x00000000
113 0x00000000 0x00000000 0x00000000 0x00000000 >;
114 };
115
116 emc-table@380000 {
117 reg = < 380000 >;
118 compatible = "nvidia,tegra20-emc-table";
119 clock-frequency = < 380000 >;
120 nvidia,emc-registers = < 0x00000017 0x0000004b
121 0x00000012 0x00000006 0x00000004 0x00000005
122 0x00000003 0x0000000c 0x00000006 0x00000006
123 0x00000003 0x00000001 0x00000004 0x00000005
124 0x00000004 0x00000009 0x0000000d 0x00000b5f
125 0x00000000 0x00000003 0x00000003 0x00000006
126 0x00000006 0x00000001 0x00000011 0x000000c8
127 0x00000003 0x0000000e 0x00000007 0x0000000f
128 0x00000002 0x00000000 0x00000000 0x00000002
129 0x00000000 0x00000000 0x00000083 0xe044048b
130 0x007d8010 0x00000000 0x00000000 0x00000000
131 0x00000000 0x00000000 0x00000000 0x00000000 >;
132 };
133 };
Grant Likely8e267f32011-07-19 17:26:54 -0600134};