Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the Chelsio T4 Ethernet driver for Linux. |
| 3 | * |
Rahul Lakkireddy | b72a32d | 2016-08-22 16:29:06 +0530 | [diff] [blame] | 4 | * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved. |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 5 | * |
| 6 | * This software is available to you under a choice of one of two |
| 7 | * licenses. You may choose to be licensed under the terms of the GNU |
| 8 | * General Public License (GPL) Version 2, available from the file |
| 9 | * COPYING in the main directory of this source tree, or the |
| 10 | * OpenIB.org BSD license below: |
| 11 | * |
| 12 | * Redistribution and use in source and binary forms, with or |
| 13 | * without modification, are permitted provided that the following |
| 14 | * conditions are met: |
| 15 | * |
| 16 | * - Redistributions of source code must retain the above |
| 17 | * copyright notice, this list of conditions and the following |
| 18 | * disclaimer. |
| 19 | * |
| 20 | * - Redistributions in binary form must reproduce the above |
| 21 | * copyright notice, this list of conditions and the following |
| 22 | * disclaimer in the documentation and/or other materials |
| 23 | * provided with the distribution. |
| 24 | * |
| 25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 26 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 27 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 28 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 29 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 32 | * SOFTWARE. |
| 33 | */ |
| 34 | |
| 35 | #ifndef __CXGB4_H__ |
| 36 | #define __CXGB4_H__ |
| 37 | |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 38 | #include "t4_hw.h" |
| 39 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 40 | #include <linux/bitops.h> |
| 41 | #include <linux/cache.h> |
| 42 | #include <linux/interrupt.h> |
| 43 | #include <linux/list.h> |
| 44 | #include <linux/netdevice.h> |
| 45 | #include <linux/pci.h> |
| 46 | #include <linux/spinlock.h> |
| 47 | #include <linux/timer.h> |
David S. Miller | c0b8b99 | 2012-10-03 20:50:08 -0400 | [diff] [blame] | 48 | #include <linux/vmalloc.h> |
Hariprasad Shenai | 098ef6c | 2015-06-05 14:24:50 +0530 | [diff] [blame] | 49 | #include <linux/etherdevice.h> |
Hariprasad Shenai | 5e2a5eb | 2015-09-28 10:26:53 +0530 | [diff] [blame] | 50 | #include <linux/net_tstamp.h> |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 51 | #include <asm/io.h> |
Hariprasad S | 2799980 | 2015-09-23 17:19:26 +0530 | [diff] [blame] | 52 | #include "t4_chip_type.h" |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 53 | #include "cxgb4_uld.h" |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 54 | |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 55 | #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__) |
Hariprasad Shenai | 94cdb8b | 2016-08-17 12:33:03 +0530 | [diff] [blame] | 56 | extern struct list_head adapter_list; |
| 57 | extern struct mutex uld_mutex; |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 58 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 59 | enum { |
Hariprasad Shenai | 098ef6c | 2015-06-05 14:24:50 +0530 | [diff] [blame] | 60 | MAX_NPORTS = 4, /* max # of ports */ |
| 61 | SERNUM_LEN = 24, /* Serial # length */ |
| 62 | EC_LEN = 16, /* E/C length */ |
| 63 | ID_LEN = 16, /* ID length */ |
| 64 | PN_LEN = 16, /* Part Number length */ |
| 65 | MACADDR_LEN = 12, /* MAC Address length */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 66 | }; |
| 67 | |
| 68 | enum { |
Hariprasad Shenai | 812034f | 2015-04-06 20:23:23 +0530 | [diff] [blame] | 69 | T4_REGMAP_SIZE = (160 * 1024), |
| 70 | T5_REGMAP_SIZE = (332 * 1024), |
| 71 | }; |
| 72 | |
| 73 | enum { |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 74 | MEM_EDC0, |
| 75 | MEM_EDC1, |
Santosh Rastapur | 2422d9a | 2013-03-14 05:08:48 +0000 | [diff] [blame] | 76 | MEM_MC, |
| 77 | MEM_MC0 = MEM_MC, |
| 78 | MEM_MC1 |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 79 | }; |
| 80 | |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 81 | enum { |
Vipul Pandya | 3eb4afb | 2012-09-26 02:39:36 +0000 | [diff] [blame] | 82 | MEMWIN0_APERTURE = 2048, |
| 83 | MEMWIN0_BASE = 0x1b800, |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 84 | MEMWIN1_APERTURE = 32768, |
| 85 | MEMWIN1_BASE = 0x28000, |
Santosh Rastapur | 2422d9a | 2013-03-14 05:08:48 +0000 | [diff] [blame] | 86 | MEMWIN1_BASE_T5 = 0x52000, |
Vipul Pandya | 3eb4afb | 2012-09-26 02:39:36 +0000 | [diff] [blame] | 87 | MEMWIN2_APERTURE = 65536, |
| 88 | MEMWIN2_BASE = 0x30000, |
Hariprasad Shenai | 0abfd15 | 2014-06-27 19:23:48 +0530 | [diff] [blame] | 89 | MEMWIN2_APERTURE_T5 = 131072, |
| 90 | MEMWIN2_BASE_T5 = 0x60000, |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 91 | }; |
| 92 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 93 | enum dev_master { |
| 94 | MASTER_CANT, |
| 95 | MASTER_MAY, |
| 96 | MASTER_MUST |
| 97 | }; |
| 98 | |
| 99 | enum dev_state { |
| 100 | DEV_STATE_UNINIT, |
| 101 | DEV_STATE_INIT, |
| 102 | DEV_STATE_ERR |
| 103 | }; |
| 104 | |
| 105 | enum { |
| 106 | PAUSE_RX = 1 << 0, |
| 107 | PAUSE_TX = 1 << 1, |
| 108 | PAUSE_AUTONEG = 1 << 2 |
| 109 | }; |
| 110 | |
| 111 | struct port_stats { |
| 112 | u64 tx_octets; /* total # of octets in good frames */ |
| 113 | u64 tx_frames; /* all good frames */ |
| 114 | u64 tx_bcast_frames; /* all broadcast frames */ |
| 115 | u64 tx_mcast_frames; /* all multicast frames */ |
| 116 | u64 tx_ucast_frames; /* all unicast frames */ |
| 117 | u64 tx_error_frames; /* all error frames */ |
| 118 | |
| 119 | u64 tx_frames_64; /* # of Tx frames in a particular range */ |
| 120 | u64 tx_frames_65_127; |
| 121 | u64 tx_frames_128_255; |
| 122 | u64 tx_frames_256_511; |
| 123 | u64 tx_frames_512_1023; |
| 124 | u64 tx_frames_1024_1518; |
| 125 | u64 tx_frames_1519_max; |
| 126 | |
| 127 | u64 tx_drop; /* # of dropped Tx frames */ |
| 128 | u64 tx_pause; /* # of transmitted pause frames */ |
| 129 | u64 tx_ppp0; /* # of transmitted PPP prio 0 frames */ |
| 130 | u64 tx_ppp1; /* # of transmitted PPP prio 1 frames */ |
| 131 | u64 tx_ppp2; /* # of transmitted PPP prio 2 frames */ |
| 132 | u64 tx_ppp3; /* # of transmitted PPP prio 3 frames */ |
| 133 | u64 tx_ppp4; /* # of transmitted PPP prio 4 frames */ |
| 134 | u64 tx_ppp5; /* # of transmitted PPP prio 5 frames */ |
| 135 | u64 tx_ppp6; /* # of transmitted PPP prio 6 frames */ |
| 136 | u64 tx_ppp7; /* # of transmitted PPP prio 7 frames */ |
| 137 | |
| 138 | u64 rx_octets; /* total # of octets in good frames */ |
| 139 | u64 rx_frames; /* all good frames */ |
| 140 | u64 rx_bcast_frames; /* all broadcast frames */ |
| 141 | u64 rx_mcast_frames; /* all multicast frames */ |
| 142 | u64 rx_ucast_frames; /* all unicast frames */ |
| 143 | u64 rx_too_long; /* # of frames exceeding MTU */ |
| 144 | u64 rx_jabber; /* # of jabber frames */ |
| 145 | u64 rx_fcs_err; /* # of received frames with bad FCS */ |
| 146 | u64 rx_len_err; /* # of received frames with length error */ |
| 147 | u64 rx_symbol_err; /* symbol errors */ |
| 148 | u64 rx_runt; /* # of short frames */ |
| 149 | |
| 150 | u64 rx_frames_64; /* # of Rx frames in a particular range */ |
| 151 | u64 rx_frames_65_127; |
| 152 | u64 rx_frames_128_255; |
| 153 | u64 rx_frames_256_511; |
| 154 | u64 rx_frames_512_1023; |
| 155 | u64 rx_frames_1024_1518; |
| 156 | u64 rx_frames_1519_max; |
| 157 | |
| 158 | u64 rx_pause; /* # of received pause frames */ |
| 159 | u64 rx_ppp0; /* # of received PPP prio 0 frames */ |
| 160 | u64 rx_ppp1; /* # of received PPP prio 1 frames */ |
| 161 | u64 rx_ppp2; /* # of received PPP prio 2 frames */ |
| 162 | u64 rx_ppp3; /* # of received PPP prio 3 frames */ |
| 163 | u64 rx_ppp4; /* # of received PPP prio 4 frames */ |
| 164 | u64 rx_ppp5; /* # of received PPP prio 5 frames */ |
| 165 | u64 rx_ppp6; /* # of received PPP prio 6 frames */ |
| 166 | u64 rx_ppp7; /* # of received PPP prio 7 frames */ |
| 167 | |
| 168 | u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */ |
| 169 | u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */ |
| 170 | u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */ |
| 171 | u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */ |
| 172 | u64 rx_trunc0; /* buffer-group 0 truncated packets */ |
| 173 | u64 rx_trunc1; /* buffer-group 1 truncated packets */ |
| 174 | u64 rx_trunc2; /* buffer-group 2 truncated packets */ |
| 175 | u64 rx_trunc3; /* buffer-group 3 truncated packets */ |
| 176 | }; |
| 177 | |
| 178 | struct lb_port_stats { |
| 179 | u64 octets; |
| 180 | u64 frames; |
| 181 | u64 bcast_frames; |
| 182 | u64 mcast_frames; |
| 183 | u64 ucast_frames; |
| 184 | u64 error_frames; |
| 185 | |
| 186 | u64 frames_64; |
| 187 | u64 frames_65_127; |
| 188 | u64 frames_128_255; |
| 189 | u64 frames_256_511; |
| 190 | u64 frames_512_1023; |
| 191 | u64 frames_1024_1518; |
| 192 | u64 frames_1519_max; |
| 193 | |
| 194 | u64 drop; |
| 195 | |
| 196 | u64 ovflow0; |
| 197 | u64 ovflow1; |
| 198 | u64 ovflow2; |
| 199 | u64 ovflow3; |
| 200 | u64 trunc0; |
| 201 | u64 trunc1; |
| 202 | u64 trunc2; |
| 203 | u64 trunc3; |
| 204 | }; |
| 205 | |
| 206 | struct tp_tcp_stats { |
Hariprasad Shenai | a4cfd92 | 2015-06-03 21:04:39 +0530 | [diff] [blame] | 207 | u32 tcp_out_rsts; |
| 208 | u64 tcp_in_segs; |
| 209 | u64 tcp_out_segs; |
| 210 | u64 tcp_retrans_segs; |
| 211 | }; |
| 212 | |
| 213 | struct tp_usm_stats { |
| 214 | u32 frames; |
| 215 | u32 drops; |
| 216 | u64 octets; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 217 | }; |
| 218 | |
Hariprasad Shenai | a622297 | 2015-06-03 21:04:40 +0530 | [diff] [blame] | 219 | struct tp_fcoe_stats { |
| 220 | u32 frames_ddp; |
| 221 | u32 frames_drop; |
| 222 | u64 octets_ddp; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 223 | }; |
| 224 | |
| 225 | struct tp_err_stats { |
Hariprasad Shenai | a4cfd92 | 2015-06-03 21:04:39 +0530 | [diff] [blame] | 226 | u32 mac_in_errs[4]; |
| 227 | u32 hdr_in_errs[4]; |
| 228 | u32 tcp_in_errs[4]; |
| 229 | u32 tnl_cong_drops[4]; |
| 230 | u32 ofld_chan_drops[4]; |
| 231 | u32 tnl_tx_drops[4]; |
| 232 | u32 ofld_vlan_drops[4]; |
| 233 | u32 tcp6_in_errs[4]; |
| 234 | u32 ofld_no_neigh; |
| 235 | u32 ofld_cong_defer; |
| 236 | }; |
| 237 | |
Hariprasad Shenai | a622297 | 2015-06-03 21:04:40 +0530 | [diff] [blame] | 238 | struct tp_cpl_stats { |
| 239 | u32 req[4]; |
| 240 | u32 rsp[4]; |
| 241 | }; |
| 242 | |
Hariprasad Shenai | a4cfd92 | 2015-06-03 21:04:39 +0530 | [diff] [blame] | 243 | struct tp_rdma_stats { |
| 244 | u32 rqe_dfr_pkt; |
| 245 | u32 rqe_dfr_mod; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 246 | }; |
| 247 | |
Hariprasad Shenai | e85c9a7 | 2014-12-03 19:32:52 +0530 | [diff] [blame] | 248 | struct sge_params { |
| 249 | u32 hps; /* host page size for our PF/VF */ |
| 250 | u32 eq_qpp; /* egress queues/page for our PF/VF */ |
| 251 | u32 iq_qpp; /* egress queues/page for our PF/VF */ |
| 252 | }; |
| 253 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 254 | struct tp_params { |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 255 | unsigned int tre; /* log2 of core clocks per TP tick */ |
Hariprasad Shenai | 2d277b3 | 2015-02-06 19:32:52 +0530 | [diff] [blame] | 256 | unsigned int la_mask; /* what events are recorded by TP LA */ |
Vipul Pandya | dca4fae | 2012-12-10 09:30:53 +0000 | [diff] [blame] | 257 | unsigned short tx_modq_map; /* TX modulation scheduler queue to */ |
| 258 | /* channel map */ |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 259 | |
| 260 | uint32_t dack_re; /* DACK timer resolution */ |
| 261 | unsigned short tx_modq[NCHAN]; /* channel to modulation queue map */ |
Kumar Sanghvi | dcf7b6f | 2013-12-18 16:38:23 +0530 | [diff] [blame] | 262 | |
| 263 | u32 vlan_pri_map; /* cached TP_VLAN_PRI_MAP */ |
| 264 | u32 ingress_config; /* cached TP_INGRESS_CONFIG */ |
| 265 | |
| 266 | /* TP_VLAN_PRI_MAP Compressed Filter Tuple field offsets. This is a |
| 267 | * subset of the set of fields which may be present in the Compressed |
| 268 | * Filter Tuple portion of filters and TCP TCB connections. The |
| 269 | * fields which are present are controlled by the TP_VLAN_PRI_MAP. |
| 270 | * Since a variable number of fields may or may not be present, their |
| 271 | * shifted field positions within the Compressed Filter Tuple may |
| 272 | * vary, or not even be present if the field isn't selected in |
| 273 | * TP_VLAN_PRI_MAP. Since some of these fields are needed in various |
| 274 | * places we store their offsets here, or a -1 if the field isn't |
| 275 | * present. |
| 276 | */ |
| 277 | int vlan_shift; |
| 278 | int vnic_shift; |
| 279 | int port_shift; |
| 280 | int protocol_shift; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 281 | }; |
| 282 | |
| 283 | struct vpd_params { |
| 284 | unsigned int cclk; |
| 285 | u8 ec[EC_LEN + 1]; |
| 286 | u8 sn[SERNUM_LEN + 1]; |
| 287 | u8 id[ID_LEN + 1]; |
Kumar Sanghvi | a94cd70 | 2014-02-18 17:56:09 +0530 | [diff] [blame] | 288 | u8 pn[PN_LEN + 1]; |
Hariprasad Shenai | 098ef6c | 2015-06-05 14:24:50 +0530 | [diff] [blame] | 289 | u8 na[MACADDR_LEN + 1]; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 290 | }; |
| 291 | |
| 292 | struct pci_params { |
| 293 | unsigned char speed; |
| 294 | unsigned char width; |
| 295 | }; |
| 296 | |
Hariprasad Shenai | 49aa284 | 2015-01-07 08:48:00 +0530 | [diff] [blame] | 297 | struct devlog_params { |
| 298 | u32 memtype; /* which memory (EDC0, EDC1, MC) */ |
| 299 | u32 start; /* start of log in firmware memory */ |
| 300 | u32 size; /* size of log */ |
| 301 | }; |
| 302 | |
Hariprasad Shenai | 3ccc6cf | 2015-06-02 13:59:39 +0530 | [diff] [blame] | 303 | /* Stores chip specific parameters */ |
| 304 | struct arch_specific_params { |
| 305 | u8 nchan; |
Hariprasad Shenai | 4458856 | 2015-12-23 22:47:12 +0530 | [diff] [blame] | 306 | u8 pm_stats_cnt; |
Hariprasad Shenai | 2216d01 | 2015-12-23 22:47:18 +0530 | [diff] [blame] | 307 | u8 cng_ch_bits_log; /* congestion channel map bits width */ |
Hariprasad Shenai | 3ccc6cf | 2015-06-02 13:59:39 +0530 | [diff] [blame] | 308 | u16 mps_rplc_size; |
| 309 | u16 vfcount; |
| 310 | u32 sge_fl_db; |
| 311 | u16 mps_tcam_size; |
| 312 | }; |
| 313 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 314 | struct adapter_params { |
Hariprasad Shenai | e85c9a7 | 2014-12-03 19:32:52 +0530 | [diff] [blame] | 315 | struct sge_params sge; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 316 | struct tp_params tp; |
| 317 | struct vpd_params vpd; |
| 318 | struct pci_params pci; |
Hariprasad Shenai | 49aa284 | 2015-01-07 08:48:00 +0530 | [diff] [blame] | 319 | struct devlog_params devlog; |
| 320 | enum pcie_memwin drv_memwin; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 321 | |
Hariprasad Shenai | f1ff24a | 2015-01-07 08:48:01 +0530 | [diff] [blame] | 322 | unsigned int cim_la_size; |
| 323 | |
Dimitris Michailidis | 900a659 | 2010-06-18 10:05:27 +0000 | [diff] [blame] | 324 | unsigned int sf_size; /* serial flash size in bytes */ |
| 325 | unsigned int sf_nsec; /* # of flash sectors */ |
| 326 | unsigned int sf_fw_start; /* start of FW image in flash */ |
| 327 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 328 | unsigned int fw_vers; |
Hariprasad Shenai | 0de7273 | 2016-04-26 20:10:22 +0530 | [diff] [blame] | 329 | unsigned int bs_vers; /* bootstrap version */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 330 | unsigned int tp_vers; |
Hariprasad Shenai | 0de7273 | 2016-04-26 20:10:22 +0530 | [diff] [blame] | 331 | unsigned int er_vers; /* expansion ROM version */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 332 | u8 api_vers[7]; |
| 333 | |
| 334 | unsigned short mtus[NMTUS]; |
| 335 | unsigned short a_wnd[NCCTRL_WIN]; |
| 336 | unsigned short b_wnd[NCCTRL_WIN]; |
| 337 | |
| 338 | unsigned char nports; /* # of ethernet ports */ |
| 339 | unsigned char portvec; |
Hariprasad Shenai | d14807d | 2013-12-03 17:05:56 +0530 | [diff] [blame] | 340 | enum chip_type chip; /* chip code */ |
Hariprasad Shenai | 3ccc6cf | 2015-06-02 13:59:39 +0530 | [diff] [blame] | 341 | struct arch_specific_params arch; /* chip specific params */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 342 | unsigned char offload; |
Hariprasad Shenai | 94cdb8b | 2016-08-17 12:33:03 +0530 | [diff] [blame] | 343 | unsigned char crypto; /* HW capability for crypto */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 344 | |
Vipul Pandya | 9a4da2c | 2012-10-19 02:09:53 +0000 | [diff] [blame] | 345 | unsigned char bypass; |
| 346 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 347 | unsigned int ofldq_wr_cred; |
Kumar Sanghvi | 1ac0f09 | 2014-02-18 17:56:12 +0530 | [diff] [blame] | 348 | bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */ |
Hariprasad Shenai | 4c2c576 | 2014-07-14 21:34:52 +0530 | [diff] [blame] | 349 | |
Rahul Lakkireddy | b72a32d | 2016-08-22 16:29:06 +0530 | [diff] [blame] | 350 | unsigned int nsched_cls; /* number of traffic classes */ |
Hariprasad Shenai | 4c2c576 | 2014-07-14 21:34:52 +0530 | [diff] [blame] | 351 | unsigned int max_ordird_qp; /* Max read depth per RDMA QP */ |
| 352 | unsigned int max_ird_adapter; /* Max read depth per adapter */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 353 | }; |
| 354 | |
Hariprasad Shenai | a3bfb61 | 2015-05-05 14:59:55 +0530 | [diff] [blame] | 355 | /* State needed to monitor the forward progress of SGE Ingress DMA activities |
| 356 | * and possible hangs. |
| 357 | */ |
| 358 | struct sge_idma_monitor_state { |
| 359 | unsigned int idma_1s_thresh; /* 1s threshold in Core Clock ticks */ |
| 360 | unsigned int idma_stalled[2]; /* synthesized stalled timers in HZ */ |
| 361 | unsigned int idma_state[2]; /* IDMA Hang detect state */ |
| 362 | unsigned int idma_qid[2]; /* IDMA Hung Ingress Queue ID */ |
| 363 | unsigned int idma_warn[2]; /* time to warning in HZ */ |
| 364 | }; |
| 365 | |
Hariprasad Shenai | 7f080c3 | 2016-04-28 13:23:18 +0530 | [diff] [blame] | 366 | /* Firmware Mailbox Command/Reply log. All values are in Host-Endian format. |
| 367 | * The access and execute times are signed in order to accommodate negative |
| 368 | * error returns. |
| 369 | */ |
| 370 | struct mbox_cmd { |
| 371 | u64 cmd[MBOX_LEN / 8]; /* a Firmware Mailbox Command/Reply */ |
| 372 | u64 timestamp; /* OS-dependent timestamp */ |
| 373 | u32 seqno; /* sequence number */ |
| 374 | s16 access; /* time (ms) to access mailbox */ |
| 375 | s16 execute; /* time (ms) to execute */ |
| 376 | }; |
| 377 | |
| 378 | struct mbox_cmd_log { |
| 379 | unsigned int size; /* number of entries in the log */ |
| 380 | unsigned int cursor; /* next position in the log to write */ |
| 381 | u32 seqno; /* next sequence number */ |
| 382 | /* variable length mailbox command log starts here */ |
| 383 | }; |
| 384 | |
| 385 | /* Given a pointer to a Firmware Mailbox Command Log and a log entry index, |
| 386 | * return a pointer to the specified entry. |
| 387 | */ |
| 388 | static inline struct mbox_cmd *mbox_cmd_log_entry(struct mbox_cmd_log *log, |
| 389 | unsigned int entry_idx) |
| 390 | { |
| 391 | return &((struct mbox_cmd *)&(log)[1])[entry_idx]; |
| 392 | } |
| 393 | |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 394 | #include "t4fw_api.h" |
| 395 | |
| 396 | #define FW_VERSION(chip) ( \ |
Hariprasad Shenai | b2e1a3f | 2014-11-21 12:52:05 +0530 | [diff] [blame] | 397 | FW_HDR_FW_VER_MAJOR_G(chip##FW_VERSION_MAJOR) | \ |
| 398 | FW_HDR_FW_VER_MINOR_G(chip##FW_VERSION_MINOR) | \ |
| 399 | FW_HDR_FW_VER_MICRO_G(chip##FW_VERSION_MICRO) | \ |
| 400 | FW_HDR_FW_VER_BUILD_G(chip##FW_VERSION_BUILD)) |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 401 | #define FW_INTFVER(chip, intf) (FW_HDR_INTFVER_##intf) |
| 402 | |
| 403 | struct fw_info { |
| 404 | u8 chip; |
| 405 | char *fs_name; |
| 406 | char *fw_mod_name; |
| 407 | struct fw_hdr fw_hdr; |
| 408 | }; |
| 409 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 410 | struct trace_params { |
| 411 | u32 data[TRACE_LEN / 4]; |
| 412 | u32 mask[TRACE_LEN / 4]; |
| 413 | unsigned short snap_len; |
| 414 | unsigned short min_len; |
| 415 | unsigned char skip_ofst; |
| 416 | unsigned char skip_len; |
| 417 | unsigned char invert; |
| 418 | unsigned char port; |
| 419 | }; |
| 420 | |
| 421 | struct link_config { |
| 422 | unsigned short supported; /* link capabilities */ |
| 423 | unsigned short advertising; /* advertised capabilities */ |
Ganesh Goudar | eb97ad9 | 2016-07-21 20:19:18 +0530 | [diff] [blame] | 424 | unsigned short lp_advertising; /* peer advertised capabilities */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 425 | unsigned short requested_speed; /* speed user has requested */ |
| 426 | unsigned short speed; /* actual link speed */ |
| 427 | unsigned char requested_fc; /* flow control user has requested */ |
| 428 | unsigned char fc; /* actual link flow control */ |
| 429 | unsigned char autoneg; /* autonegotiating? */ |
| 430 | unsigned char link_ok; /* link up? */ |
Hariprasad Shenai | ddc7740 | 2016-04-26 20:10:29 +0530 | [diff] [blame] | 431 | unsigned char link_down_rc; /* link down reason */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 432 | }; |
| 433 | |
Hariprasad Shenai | e2ac962 | 2014-11-07 09:35:25 +0530 | [diff] [blame] | 434 | #define FW_LEN16(fw_struct) FW_CMD_LEN16_V(sizeof(fw_struct) / 16) |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 435 | |
| 436 | enum { |
| 437 | MAX_ETH_QSETS = 32, /* # of Ethernet Tx/Rx queue sets */ |
Hariprasad Shenai | f90ce56 | 2015-12-23 11:29:54 +0530 | [diff] [blame] | 438 | MAX_OFLD_QSETS = 16, /* # of offload Tx, iscsi Rx queue sets */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 439 | MAX_CTRL_QUEUES = NCHAN, /* # of control Tx queues */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 440 | }; |
| 441 | |
| 442 | enum { |
Hariprasad Shenai | 812034f | 2015-04-06 20:23:23 +0530 | [diff] [blame] | 443 | MAX_TXQ_ENTRIES = 16384, |
| 444 | MAX_CTRL_TXQ_ENTRIES = 1024, |
| 445 | MAX_RSPQ_ENTRIES = 16384, |
| 446 | MAX_RX_BUFFERS = 16384, |
| 447 | MIN_TXQ_ENTRIES = 32, |
| 448 | MIN_CTRL_TXQ_ENTRIES = 32, |
| 449 | MIN_RSPQ_ENTRIES = 128, |
| 450 | MIN_FL_ENTRIES = 16 |
| 451 | }; |
| 452 | |
| 453 | enum { |
Hariprasad Shenai | cf38be6 | 2014-06-06 21:40:42 +0530 | [diff] [blame] | 454 | INGQ_EXTRAS = 2, /* firmware event queue and */ |
| 455 | /* forwarded interrupts */ |
Hariprasad Shenai | 0fbc81b | 2016-09-17 08:12:39 +0530 | [diff] [blame] | 456 | MAX_INGQ = MAX_ETH_QSETS + INGQ_EXTRAS, |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 457 | }; |
| 458 | |
| 459 | struct adapter; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 460 | struct sge_rspq; |
| 461 | |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 462 | #include "cxgb4_dcb.h" |
| 463 | |
Varun Prakash | 76fed8a | 2015-03-24 19:14:45 +0530 | [diff] [blame] | 464 | #ifdef CONFIG_CHELSIO_T4_FCOE |
| 465 | #include "cxgb4_fcoe.h" |
| 466 | #endif /* CONFIG_CHELSIO_T4_FCOE */ |
| 467 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 468 | struct port_info { |
| 469 | struct adapter *adapter; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 470 | u16 viid; |
| 471 | s16 xact_addr_filt; /* index of exact MAC address filter */ |
| 472 | u16 rss_size; /* size of VI's RSS table slice */ |
| 473 | s8 mdio_addr; |
Hariprasad Shenai | 40e9de4 | 2014-12-12 12:07:57 +0530 | [diff] [blame] | 474 | enum fw_port_type port_type; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 475 | u8 mod_type; |
| 476 | u8 port_id; |
| 477 | u8 tx_chan; |
| 478 | u8 lport; /* associated offload logical port */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 479 | u8 nqsets; /* # of qsets */ |
| 480 | u8 first_qset; /* index of first qset */ |
Dimitris Michailidis | f796564 | 2010-07-11 12:01:18 +0000 | [diff] [blame] | 481 | u8 rss_mode; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 482 | struct link_config link_cfg; |
Dimitris Michailidis | 671b006 | 2010-07-11 12:01:17 +0000 | [diff] [blame] | 483 | u16 *rss; |
Hariprasad Shenai | a4cfd92 | 2015-06-03 21:04:39 +0530 | [diff] [blame] | 484 | struct port_stats stats_base; |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 485 | #ifdef CONFIG_CHELSIO_T4_DCB |
| 486 | struct port_dcb_info dcb; /* Data Center Bridging support */ |
| 487 | #endif |
Varun Prakash | 76fed8a | 2015-03-24 19:14:45 +0530 | [diff] [blame] | 488 | #ifdef CONFIG_CHELSIO_T4_FCOE |
| 489 | struct cxgb_fcoe fcoe; |
| 490 | #endif /* CONFIG_CHELSIO_T4_FCOE */ |
Hariprasad Shenai | 5e2a5eb | 2015-09-28 10:26:53 +0530 | [diff] [blame] | 491 | bool rxtstamp; /* Enable TS */ |
| 492 | struct hwtstamp_config tstamp_config; |
Rahul Lakkireddy | b72a32d | 2016-08-22 16:29:06 +0530 | [diff] [blame] | 493 | struct sched_table *sched_tbl; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 494 | }; |
| 495 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 496 | struct dentry; |
| 497 | struct work_struct; |
| 498 | |
| 499 | enum { /* adapter flags */ |
| 500 | FULL_INIT_DONE = (1 << 0), |
Gavin Shan | 144be3d | 2014-01-23 12:27:34 +0800 | [diff] [blame] | 501 | DEV_ENABLED = (1 << 1), |
| 502 | USING_MSI = (1 << 2), |
| 503 | USING_MSIX = (1 << 3), |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 504 | FW_OK = (1 << 4), |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 505 | RSS_TNLALLLOOKUP = (1 << 5), |
Vipul Pandya | 52367a7 | 2012-09-26 02:39:38 +0000 | [diff] [blame] | 506 | USING_SOFT_PARAMS = (1 << 6), |
| 507 | MASTER_PF = (1 << 7), |
| 508 | FW_OFLD_CONN = (1 << 9), |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 509 | }; |
| 510 | |
Hariprasad Shenai | 94cdb8b | 2016-08-17 12:33:03 +0530 | [diff] [blame] | 511 | enum { |
| 512 | ULP_CRYPTO_LOOKASIDE = 1 << 0, |
| 513 | }; |
| 514 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 515 | struct rx_sw_desc; |
| 516 | |
| 517 | struct sge_fl { /* SGE free-buffer queue state */ |
| 518 | unsigned int avail; /* # of available Rx buffers */ |
| 519 | unsigned int pend_cred; /* new buffers since last FL DB ring */ |
| 520 | unsigned int cidx; /* consumer index */ |
| 521 | unsigned int pidx; /* producer index */ |
| 522 | unsigned long alloc_failed; /* # of times buffer allocation failed */ |
| 523 | unsigned long large_alloc_failed; |
Hariprasad Shenai | 70055dd | 2015-12-08 10:09:16 +0530 | [diff] [blame] | 524 | unsigned long mapping_err; /* # of RX Buffer DMA Mapping failures */ |
| 525 | unsigned long low; /* # of times momentarily starving */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 526 | unsigned long starving; |
| 527 | /* RO fields */ |
| 528 | unsigned int cntxt_id; /* SGE context id for the free list */ |
| 529 | unsigned int size; /* capacity of free list */ |
| 530 | struct rx_sw_desc *sdesc; /* address of SW Rx descriptor ring */ |
| 531 | __be64 *desc; /* address of HW Rx descriptor ring */ |
| 532 | dma_addr_t addr; /* bus address of HW ring start */ |
Hariprasad Shenai | df64e4d | 2014-12-03 19:32:53 +0530 | [diff] [blame] | 533 | void __iomem *bar2_addr; /* address of BAR2 Queue registers */ |
| 534 | unsigned int bar2_qid; /* Queue ID for BAR2 Queue registers */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 535 | }; |
| 536 | |
| 537 | /* A packet gather list */ |
| 538 | struct pkt_gl { |
Hariprasad Shenai | 5e2a5eb | 2015-09-28 10:26:53 +0530 | [diff] [blame] | 539 | u64 sgetstamp; /* SGE Time Stamp for Ingress Packet */ |
Ian Campbell | e91b0f2 | 2011-10-19 23:01:46 +0000 | [diff] [blame] | 540 | struct page_frag frags[MAX_SKB_FRAGS]; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 541 | void *va; /* virtual address of first byte */ |
| 542 | unsigned int nfrags; /* # of fragments */ |
| 543 | unsigned int tot_len; /* total length of fragments */ |
| 544 | }; |
| 545 | |
| 546 | typedef int (*rspq_handler_t)(struct sge_rspq *q, const __be64 *rsp, |
| 547 | const struct pkt_gl *gl); |
Varun Prakash | 2337ba4 | 2016-02-14 23:02:41 +0530 | [diff] [blame] | 548 | typedef void (*rspq_flush_handler_t)(struct sge_rspq *q); |
| 549 | /* LRO related declarations for ULD */ |
| 550 | struct t4_lro_mgr { |
| 551 | #define MAX_LRO_SESSIONS 64 |
| 552 | u8 lro_session_cnt; /* # of sessions to aggregate */ |
| 553 | unsigned long lro_pkts; /* # of LRO super packets */ |
| 554 | unsigned long lro_merged; /* # of wire packets merged by LRO */ |
| 555 | struct sk_buff_head lroq; /* list of aggregated sessions */ |
| 556 | }; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 557 | |
| 558 | struct sge_rspq { /* state for an SGE response queue */ |
| 559 | struct napi_struct napi; |
| 560 | const __be64 *cur_desc; /* current descriptor in queue */ |
| 561 | unsigned int cidx; /* consumer index */ |
| 562 | u8 gen; /* current generation bit */ |
| 563 | u8 intr_params; /* interrupt holdoff parameters */ |
| 564 | u8 next_intr_params; /* holdoff params for next interrupt */ |
Hariprasad Shenai | e553ec3 | 2014-09-26 00:23:55 +0530 | [diff] [blame] | 565 | u8 adaptive_rx; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 566 | u8 pktcnt_idx; /* interrupt packet threshold */ |
| 567 | u8 uld; /* ULD handling this queue */ |
| 568 | u8 idx; /* queue index within its group */ |
| 569 | int offset; /* offset into current Rx buffer */ |
| 570 | u16 cntxt_id; /* SGE context id for the response q */ |
| 571 | u16 abs_id; /* absolute SGE id for the response q */ |
| 572 | __be64 *desc; /* address of HW response ring */ |
| 573 | dma_addr_t phys_addr; /* physical address of the ring */ |
Hariprasad Shenai | df64e4d | 2014-12-03 19:32:53 +0530 | [diff] [blame] | 574 | void __iomem *bar2_addr; /* address of BAR2 Queue registers */ |
| 575 | unsigned int bar2_qid; /* Queue ID for BAR2 Queue registers */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 576 | unsigned int iqe_len; /* entry size */ |
| 577 | unsigned int size; /* capacity of response queue */ |
| 578 | struct adapter *adap; |
| 579 | struct net_device *netdev; /* associated net device */ |
| 580 | rspq_handler_t handler; |
Varun Prakash | 2337ba4 | 2016-02-14 23:02:41 +0530 | [diff] [blame] | 581 | rspq_flush_handler_t flush_handler; |
| 582 | struct t4_lro_mgr lro_mgr; |
Hariprasad Shenai | 3a336cb | 2015-02-04 15:32:52 +0530 | [diff] [blame] | 583 | #ifdef CONFIG_NET_RX_BUSY_POLL |
| 584 | #define CXGB_POLL_STATE_IDLE 0 |
| 585 | #define CXGB_POLL_STATE_NAPI BIT(0) /* NAPI owns this poll */ |
| 586 | #define CXGB_POLL_STATE_POLL BIT(1) /* poll owns this poll */ |
| 587 | #define CXGB_POLL_STATE_NAPI_YIELD BIT(2) /* NAPI yielded this poll */ |
| 588 | #define CXGB_POLL_STATE_POLL_YIELD BIT(3) /* poll yielded this poll */ |
| 589 | #define CXGB_POLL_YIELD (CXGB_POLL_STATE_NAPI_YIELD | \ |
| 590 | CXGB_POLL_STATE_POLL_YIELD) |
| 591 | #define CXGB_POLL_LOCKED (CXGB_POLL_STATE_NAPI | \ |
| 592 | CXGB_POLL_STATE_POLL) |
| 593 | #define CXGB_POLL_USER_PEND (CXGB_POLL_STATE_POLL | \ |
| 594 | CXGB_POLL_STATE_POLL_YIELD) |
| 595 | unsigned int bpoll_state; |
| 596 | spinlock_t bpoll_lock; /* lock for busy poll */ |
| 597 | #endif /* CONFIG_NET_RX_BUSY_POLL */ |
| 598 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 599 | }; |
| 600 | |
| 601 | struct sge_eth_stats { /* Ethernet queue statistics */ |
| 602 | unsigned long pkts; /* # of ethernet packets */ |
| 603 | unsigned long lro_pkts; /* # of LRO super packets */ |
| 604 | unsigned long lro_merged; /* # of wire packets merged by LRO */ |
| 605 | unsigned long rx_cso; /* # of Rx checksum offloads */ |
| 606 | unsigned long vlan_ex; /* # of Rx VLAN extractions */ |
| 607 | unsigned long rx_drops; /* # of packets dropped due to no mem */ |
| 608 | }; |
| 609 | |
| 610 | struct sge_eth_rxq { /* SW Ethernet Rx queue */ |
| 611 | struct sge_rspq rspq; |
| 612 | struct sge_fl fl; |
| 613 | struct sge_eth_stats stats; |
| 614 | } ____cacheline_aligned_in_smp; |
| 615 | |
| 616 | struct sge_ofld_stats { /* offload queue statistics */ |
| 617 | unsigned long pkts; /* # of packets */ |
| 618 | unsigned long imm; /* # of immediate-data packets */ |
| 619 | unsigned long an; /* # of asynchronous notifications */ |
| 620 | unsigned long nomem; /* # of responses deferred due to no mem */ |
| 621 | }; |
| 622 | |
| 623 | struct sge_ofld_rxq { /* SW offload Rx queue */ |
| 624 | struct sge_rspq rspq; |
| 625 | struct sge_fl fl; |
| 626 | struct sge_ofld_stats stats; |
| 627 | } ____cacheline_aligned_in_smp; |
| 628 | |
| 629 | struct tx_desc { |
| 630 | __be64 flit[8]; |
| 631 | }; |
| 632 | |
| 633 | struct tx_sw_desc; |
| 634 | |
| 635 | struct sge_txq { |
| 636 | unsigned int in_use; /* # of in-use Tx descriptors */ |
| 637 | unsigned int size; /* # of descriptors */ |
| 638 | unsigned int cidx; /* SW consumer index */ |
| 639 | unsigned int pidx; /* producer index */ |
| 640 | unsigned long stops; /* # of times q has been stopped */ |
| 641 | unsigned long restarts; /* # of queue restarts */ |
| 642 | unsigned int cntxt_id; /* SGE context id for the Tx q */ |
| 643 | struct tx_desc *desc; /* address of HW Tx descriptor ring */ |
| 644 | struct tx_sw_desc *sdesc; /* address of SW Tx descriptor ring */ |
| 645 | struct sge_qstat *stat; /* queue status entry */ |
| 646 | dma_addr_t phys_addr; /* physical address of the ring */ |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 647 | spinlock_t db_lock; |
| 648 | int db_disabled; |
| 649 | unsigned short db_pidx; |
Steve Wise | 05eb238 | 2014-03-14 21:52:08 +0530 | [diff] [blame] | 650 | unsigned short db_pidx_inc; |
Hariprasad Shenai | df64e4d | 2014-12-03 19:32:53 +0530 | [diff] [blame] | 651 | void __iomem *bar2_addr; /* address of BAR2 Queue registers */ |
| 652 | unsigned int bar2_qid; /* Queue ID for BAR2 Queue registers */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 653 | }; |
| 654 | |
| 655 | struct sge_eth_txq { /* state for an SGE Ethernet Tx queue */ |
| 656 | struct sge_txq q; |
| 657 | struct netdev_queue *txq; /* associated netdev TX queue */ |
Anish Bhatt | 10b0046 | 2014-08-07 16:14:03 -0700 | [diff] [blame] | 658 | #ifdef CONFIG_CHELSIO_T4_DCB |
| 659 | u8 dcb_prio; /* DCB Priority bound to queue */ |
| 660 | #endif |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 661 | unsigned long tso; /* # of TSO requests */ |
| 662 | unsigned long tx_cso; /* # of Tx checksum offloads */ |
| 663 | unsigned long vlan_ins; /* # of Tx VLAN insertions */ |
| 664 | unsigned long mapping_err; /* # of I/O MMU packet mapping errors */ |
| 665 | } ____cacheline_aligned_in_smp; |
| 666 | |
| 667 | struct sge_ofld_txq { /* state for an SGE offload Tx queue */ |
| 668 | struct sge_txq q; |
| 669 | struct adapter *adap; |
| 670 | struct sk_buff_head sendq; /* list of backpressured packets */ |
| 671 | struct tasklet_struct qresume_tsk; /* restarts the queue */ |
Hariprasad Shenai | 126fca6 | 2015-12-08 10:09:14 +0530 | [diff] [blame] | 672 | bool service_ofldq_running; /* service_ofldq() is processing sendq */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 673 | u8 full; /* the Tx ring is full */ |
| 674 | unsigned long mapping_err; /* # of I/O MMU packet mapping errors */ |
| 675 | } ____cacheline_aligned_in_smp; |
| 676 | |
| 677 | struct sge_ctrl_txq { /* state for an SGE control Tx queue */ |
| 678 | struct sge_txq q; |
| 679 | struct adapter *adap; |
| 680 | struct sk_buff_head sendq; /* list of backpressured packets */ |
| 681 | struct tasklet_struct qresume_tsk; /* restarts the queue */ |
| 682 | u8 full; /* the Tx ring is full */ |
| 683 | } ____cacheline_aligned_in_smp; |
| 684 | |
Hariprasad Shenai | 94cdb8b | 2016-08-17 12:33:03 +0530 | [diff] [blame] | 685 | struct sge_uld_rxq_info { |
| 686 | char name[IFNAMSIZ]; /* name of ULD driver */ |
| 687 | struct sge_ofld_rxq *uldrxq; /* Rxq's for ULD */ |
| 688 | u16 *msix_tbl; /* msix_tbl for uld */ |
| 689 | u16 *rspq_id; /* response queue id's of rxq */ |
| 690 | u16 nrxq; /* # of ingress uld queues */ |
| 691 | u16 nciq; /* # of completion queues */ |
| 692 | u8 uld; /* uld type */ |
| 693 | }; |
| 694 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 695 | struct sge { |
| 696 | struct sge_eth_txq ethtxq[MAX_ETH_QSETS]; |
| 697 | struct sge_ofld_txq ofldtxq[MAX_OFLD_QSETS]; |
| 698 | struct sge_ctrl_txq ctrlq[MAX_CTRL_QUEUES]; |
| 699 | |
| 700 | struct sge_eth_rxq ethrxq[MAX_ETH_QSETS]; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 701 | struct sge_rspq fw_evtq ____cacheline_aligned_in_smp; |
Hariprasad Shenai | 94cdb8b | 2016-08-17 12:33:03 +0530 | [diff] [blame] | 702 | struct sge_uld_rxq_info **uld_rxq_info; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 703 | |
| 704 | struct sge_rspq intrq ____cacheline_aligned_in_smp; |
| 705 | spinlock_t intrq_lock; |
| 706 | |
| 707 | u16 max_ethqsets; /* # of available Ethernet queue sets */ |
| 708 | u16 ethqsets; /* # of active Ethernet queue sets */ |
| 709 | u16 ethtxq_rover; /* Tx queue to clean up next */ |
Hariprasad Shenai | 0fbc81b | 2016-09-17 08:12:39 +0530 | [diff] [blame] | 710 | u16 ofldqsets; /* # of active ofld queue sets */ |
Hariprasad Shenai | 94cdb8b | 2016-08-17 12:33:03 +0530 | [diff] [blame] | 711 | u16 nqs_per_uld; /* # of Rx queues per ULD */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 712 | u16 timer_val[SGE_NTIMERS]; |
| 713 | u8 counter_val[SGE_NCOUNTERS]; |
Vipul Pandya | 52367a7 | 2012-09-26 02:39:38 +0000 | [diff] [blame] | 714 | u32 fl_pg_order; /* large page allocation size */ |
| 715 | u32 stat_len; /* length of status page at ring end */ |
| 716 | u32 pktshift; /* padding between CPL & packet data */ |
| 717 | u32 fl_align; /* response queue message alignment */ |
| 718 | u32 fl_starve_thres; /* Free List starvation threshold */ |
Kumar Sanghvi | 0f4d201 | 2014-03-13 20:50:48 +0530 | [diff] [blame] | 719 | |
Hariprasad Shenai | a3bfb61 | 2015-05-05 14:59:55 +0530 | [diff] [blame] | 720 | struct sge_idma_monitor_state idma_monitor; |
Dimitris Michailidis | e46dab4 | 2010-08-23 17:20:58 +0000 | [diff] [blame] | 721 | unsigned int egr_start; |
Hariprasad Shenai | 4b8e27a | 2015-03-26 10:04:25 +0530 | [diff] [blame] | 722 | unsigned int egr_sz; |
Dimitris Michailidis | e46dab4 | 2010-08-23 17:20:58 +0000 | [diff] [blame] | 723 | unsigned int ingr_start; |
Hariprasad Shenai | 4b8e27a | 2015-03-26 10:04:25 +0530 | [diff] [blame] | 724 | unsigned int ingr_sz; |
| 725 | void **egr_map; /* qid->queue egress queue map */ |
| 726 | struct sge_rspq **ingr_map; /* qid->queue ingress queue map */ |
| 727 | unsigned long *starving_fl; |
| 728 | unsigned long *txq_maperr; |
Hariprasad Shenai | 5b377d1 | 2015-05-27 22:30:23 +0530 | [diff] [blame] | 729 | unsigned long *blocked_fl; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 730 | struct timer_list rx_timer; /* refills starving FLs */ |
| 731 | struct timer_list tx_timer; /* checks Tx queues */ |
| 732 | }; |
| 733 | |
| 734 | #define for_each_ethrxq(sge, i) for (i = 0; i < (sge)->ethqsets; i++) |
Hariprasad Shenai | 0fbc81b | 2016-09-17 08:12:39 +0530 | [diff] [blame] | 735 | #define for_each_ofldtxq(sge, i) for (i = 0; i < (sge)->ofldqsets; i++) |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 736 | |
| 737 | struct l2t_data; |
| 738 | |
Santosh Rastapur | 2422d9a | 2013-03-14 05:08:48 +0000 | [diff] [blame] | 739 | #ifdef CONFIG_PCI_IOV |
| 740 | |
Santosh Rastapur | 7d6727c | 2013-03-14 05:08:56 +0000 | [diff] [blame] | 741 | /* T4 supports SRIOV on PF0-3 and T5 on PF0-7. However, the Serial |
| 742 | * Configuration initialization for T5 only has SR-IOV functionality enabled |
| 743 | * on PF0-3 in order to simplify everything. |
Santosh Rastapur | 2422d9a | 2013-03-14 05:08:48 +0000 | [diff] [blame] | 744 | */ |
Santosh Rastapur | 7d6727c | 2013-03-14 05:08:56 +0000 | [diff] [blame] | 745 | #define NUM_OF_PF_WITH_SRIOV 4 |
Santosh Rastapur | 2422d9a | 2013-03-14 05:08:48 +0000 | [diff] [blame] | 746 | |
| 747 | #endif |
| 748 | |
Hariprasad Shenai | a4cfd92 | 2015-06-03 21:04:39 +0530 | [diff] [blame] | 749 | struct doorbell_stats { |
| 750 | u32 db_drop; |
| 751 | u32 db_empty; |
| 752 | u32 db_full; |
| 753 | }; |
| 754 | |
Hariprasad Shenai | fc08a01 | 2016-02-16 10:07:09 +0530 | [diff] [blame] | 755 | struct hash_mac_addr { |
| 756 | struct list_head list; |
| 757 | u8 addr[ETH_ALEN]; |
| 758 | }; |
| 759 | |
Hariprasad Shenai | 94cdb8b | 2016-08-17 12:33:03 +0530 | [diff] [blame] | 760 | struct uld_msix_bmap { |
| 761 | unsigned long *msix_bmap; |
| 762 | unsigned int mapsize; |
| 763 | spinlock_t lock; /* lock for acquiring bitmap */ |
| 764 | }; |
| 765 | |
| 766 | struct uld_msix_info { |
| 767 | unsigned short vec; |
| 768 | char desc[IFNAMSIZ + 10]; |
Hariprasad Shenai | 0fbc81b | 2016-09-17 08:12:39 +0530 | [diff] [blame] | 769 | unsigned int idx; |
Hariprasad Shenai | 94cdb8b | 2016-08-17 12:33:03 +0530 | [diff] [blame] | 770 | }; |
| 771 | |
Hariprasad Shenai | 661dbeb | 2016-09-02 19:13:53 +0530 | [diff] [blame] | 772 | struct vf_info { |
| 773 | unsigned char vf_mac_addr[ETH_ALEN]; |
| 774 | bool pf_set_mac; |
| 775 | }; |
| 776 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 777 | struct adapter { |
| 778 | void __iomem *regs; |
Santosh Rastapur | 22adfe0 | 2013-03-14 05:08:51 +0000 | [diff] [blame] | 779 | void __iomem *bar2; |
Hariprasad Shenai | 0abfd15 | 2014-06-27 19:23:48 +0530 | [diff] [blame] | 780 | u32 t4_bar0; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 781 | struct pci_dev *pdev; |
| 782 | struct device *pdev_dev; |
Hariprasad Shenai | 0de7273 | 2016-04-26 20:10:22 +0530 | [diff] [blame] | 783 | const char *name; |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 784 | unsigned int mbox; |
Hariprasad Shenai | b261272 | 2015-05-27 22:30:24 +0530 | [diff] [blame] | 785 | unsigned int pf; |
Dimitris Michailidis | 060e0c7 | 2010-08-02 13:19:21 +0000 | [diff] [blame] | 786 | unsigned int flags; |
Hariprasad Shenai | e7b48a3 | 2016-08-23 11:35:32 +0530 | [diff] [blame] | 787 | unsigned int adap_idx; |
Santosh Rastapur | 2422d9a | 2013-03-14 05:08:48 +0000 | [diff] [blame] | 788 | enum chip_type chip; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 789 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 790 | int msg_enable; |
| 791 | |
| 792 | struct adapter_params params; |
| 793 | struct cxgb4_virt_res vres; |
| 794 | unsigned int swintr; |
| 795 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 796 | struct { |
| 797 | unsigned short vec; |
Dimitris Michailidis | 8cd18ac | 2010-12-14 21:36:49 +0000 | [diff] [blame] | 798 | char desc[IFNAMSIZ + 10]; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 799 | } msix_info[MAX_INGQ + 1]; |
Hariprasad Shenai | 94cdb8b | 2016-08-17 12:33:03 +0530 | [diff] [blame] | 800 | struct uld_msix_info *msix_info_ulds; /* msix info for uld's */ |
| 801 | struct uld_msix_bmap msix_bmap_ulds; /* msix bitmap for all uld */ |
Hariprasad Shenai | 0fbc81b | 2016-09-17 08:12:39 +0530 | [diff] [blame] | 802 | int msi_idx; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 803 | |
Hariprasad Shenai | a4cfd92 | 2015-06-03 21:04:39 +0530 | [diff] [blame] | 804 | struct doorbell_stats db_stats; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 805 | struct sge sge; |
| 806 | |
| 807 | struct net_device *port[MAX_NPORTS]; |
| 808 | u8 chan_map[NCHAN]; /* channel -> port map */ |
| 809 | |
Hariprasad Shenai | 661dbeb | 2016-09-02 19:13:53 +0530 | [diff] [blame] | 810 | struct vf_info *vfinfo; |
| 811 | u8 num_vfs; |
| 812 | |
Vipul Pandya | 793dad9 | 2012-12-10 09:30:56 +0000 | [diff] [blame] | 813 | u32 filter_mode; |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 814 | unsigned int l2t_start; |
| 815 | unsigned int l2t_end; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 816 | struct l2t_data *l2t; |
Anish Bhatt | b5a02f5 | 2015-01-14 15:17:34 -0800 | [diff] [blame] | 817 | unsigned int clipt_start; |
| 818 | unsigned int clipt_end; |
| 819 | struct clip_tbl *clipt; |
Hariprasad Shenai | 0fbc81b | 2016-09-17 08:12:39 +0530 | [diff] [blame] | 820 | struct cxgb4_uld_info *uld; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 821 | void *uld_handle[CXGB4_ULD_MAX]; |
Hariprasad Shenai | 94cdb8b | 2016-08-17 12:33:03 +0530 | [diff] [blame] | 822 | unsigned int num_uld; |
Hariprasad Shenai | 0fbc81b | 2016-09-17 08:12:39 +0530 | [diff] [blame] | 823 | unsigned int num_ofld_uld; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 824 | struct list_head list_node; |
Vipul Pandya | 01bcca6 | 2013-07-04 16:10:46 +0530 | [diff] [blame] | 825 | struct list_head rcu_node; |
Hariprasad Shenai | fc08a01 | 2016-02-16 10:07:09 +0530 | [diff] [blame] | 826 | struct list_head mac_hlist; /* list of MAC addresses in MPS Hash */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 827 | |
Varun Prakash | 7714cb9e | 2016-02-14 23:07:39 +0530 | [diff] [blame] | 828 | void *iscsi_ppm; |
| 829 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 830 | struct tid_info tids; |
| 831 | void **tid_release_head; |
| 832 | spinlock_t tid_release_lock; |
Anish Bhatt | 29aaee6 | 2014-08-20 13:44:06 -0700 | [diff] [blame] | 833 | struct workqueue_struct *workq; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 834 | struct work_struct tid_release_task; |
Vipul Pandya | 881806b | 2012-05-18 15:29:24 +0530 | [diff] [blame] | 835 | struct work_struct db_full_task; |
| 836 | struct work_struct db_drop_task; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 837 | bool tid_release_task_busy; |
| 838 | |
Hariprasad Shenai | 7f080c3 | 2016-04-28 13:23:18 +0530 | [diff] [blame] | 839 | /* support for mailbox command/reply logging */ |
| 840 | #define T4_OS_LOG_MBOX_CMDS 256 |
| 841 | struct mbox_cmd_log *mbox_log; |
| 842 | |
Hariprasad Shenai | 0fbc81b | 2016-09-17 08:12:39 +0530 | [diff] [blame] | 843 | struct mutex uld_mutex; |
| 844 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 845 | struct dentry *debugfs_root; |
Viresh Kumar | 621a5f7 | 2015-09-26 15:04:07 -0700 | [diff] [blame] | 846 | bool use_bd; /* Use SGE Back Door intfc for reading SGE Contexts */ |
| 847 | bool trace_rss; /* 1 implies that different RSS flit per filter is |
Hariprasad Shenai | 8e3d04f | 2015-08-13 09:44:22 +0530 | [diff] [blame] | 848 | * used per filter else if 0 default RSS flit is |
| 849 | * used for all 4 filters. |
| 850 | */ |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 851 | |
| 852 | spinlock_t stats_lock; |
Hariprasad Shenai | fc5ab02 | 2014-06-27 19:23:49 +0530 | [diff] [blame] | 853 | spinlock_t win0_lock ____cacheline_aligned_in_smp; |
Rahul Lakkireddy | d893184 | 2016-09-20 17:13:09 +0530 | [diff] [blame^] | 854 | |
| 855 | /* TC u32 offload */ |
| 856 | struct cxgb4_tc_u32_table *tc_u32; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 857 | }; |
| 858 | |
Rahul Lakkireddy | b72a32d | 2016-08-22 16:29:06 +0530 | [diff] [blame] | 859 | /* Support for "sched-class" command to allow a TX Scheduling Class to be |
| 860 | * programmed with various parameters. |
| 861 | */ |
| 862 | struct ch_sched_params { |
| 863 | s8 type; /* packet or flow */ |
| 864 | union { |
| 865 | struct { |
| 866 | s8 level; /* scheduler hierarchy level */ |
| 867 | s8 mode; /* per-class or per-flow */ |
| 868 | s8 rateunit; /* bit or packet rate */ |
| 869 | s8 ratemode; /* %port relative or kbps absolute */ |
| 870 | s8 channel; /* scheduler channel [0..N] */ |
| 871 | s8 class; /* scheduler class [0..N] */ |
| 872 | s32 minrate; /* minimum rate */ |
| 873 | s32 maxrate; /* maximum rate */ |
| 874 | s16 weight; /* percent weight */ |
| 875 | s16 pktsize; /* average packet size */ |
| 876 | } params; |
| 877 | } u; |
| 878 | }; |
| 879 | |
Rahul Lakkireddy | 10a2604 | 2016-08-22 16:29:08 +0530 | [diff] [blame] | 880 | enum { |
| 881 | SCHED_CLASS_TYPE_PACKET = 0, /* class type */ |
| 882 | }; |
| 883 | |
| 884 | enum { |
| 885 | SCHED_CLASS_LEVEL_CL_RL = 0, /* class rate limiter */ |
| 886 | }; |
| 887 | |
| 888 | enum { |
| 889 | SCHED_CLASS_MODE_CLASS = 0, /* per-class scheduling */ |
| 890 | }; |
| 891 | |
| 892 | enum { |
| 893 | SCHED_CLASS_RATEUNIT_BITS = 0, /* bit rate scheduling */ |
| 894 | }; |
| 895 | |
| 896 | enum { |
| 897 | SCHED_CLASS_RATEMODE_ABS = 1, /* Kb/s */ |
| 898 | }; |
| 899 | |
Rahul Lakkireddy | 6cede1f | 2016-08-22 16:29:07 +0530 | [diff] [blame] | 900 | /* Support for "sched_queue" command to allow one or more NIC TX Queues |
| 901 | * to be bound to a TX Scheduling Class. |
| 902 | */ |
| 903 | struct ch_sched_queue { |
| 904 | s8 queue; /* queue index */ |
| 905 | s8 class; /* class index */ |
| 906 | }; |
| 907 | |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 908 | /* Defined bit width of user definable filter tuples |
| 909 | */ |
| 910 | #define ETHTYPE_BITWIDTH 16 |
| 911 | #define FRAG_BITWIDTH 1 |
| 912 | #define MACIDX_BITWIDTH 9 |
| 913 | #define FCOE_BITWIDTH 1 |
| 914 | #define IPORT_BITWIDTH 3 |
| 915 | #define MATCHTYPE_BITWIDTH 3 |
| 916 | #define PROTO_BITWIDTH 8 |
| 917 | #define TOS_BITWIDTH 8 |
| 918 | #define PF_BITWIDTH 8 |
| 919 | #define VF_BITWIDTH 8 |
| 920 | #define IVLAN_BITWIDTH 16 |
| 921 | #define OVLAN_BITWIDTH 16 |
| 922 | |
| 923 | /* Filter matching rules. These consist of a set of ingress packet field |
| 924 | * (value, mask) tuples. The associated ingress packet field matches the |
| 925 | * tuple when ((field & mask) == value). (Thus a wildcard "don't care" field |
| 926 | * rule can be constructed by specifying a tuple of (0, 0).) A filter rule |
| 927 | * matches an ingress packet when all of the individual individual field |
| 928 | * matching rules are true. |
| 929 | * |
| 930 | * Partial field masks are always valid, however, while it may be easy to |
| 931 | * understand their meanings for some fields (e.g. IP address to match a |
| 932 | * subnet), for others making sensible partial masks is less intuitive (e.g. |
| 933 | * MPS match type) ... |
| 934 | * |
| 935 | * Most of the following data structures are modeled on T4 capabilities. |
| 936 | * Drivers for earlier chips use the subsets which make sense for those chips. |
| 937 | * We really need to come up with a hardware-independent mechanism to |
| 938 | * represent hardware filter capabilities ... |
| 939 | */ |
| 940 | struct ch_filter_tuple { |
| 941 | /* Compressed header matching field rules. The TP_VLAN_PRI_MAP |
| 942 | * register selects which of these fields will participate in the |
| 943 | * filter match rules -- up to a maximum of 36 bits. Because |
| 944 | * TP_VLAN_PRI_MAP is a global register, all filters must use the same |
| 945 | * set of fields. |
| 946 | */ |
| 947 | uint32_t ethtype:ETHTYPE_BITWIDTH; /* Ethernet type */ |
| 948 | uint32_t frag:FRAG_BITWIDTH; /* IP fragmentation header */ |
| 949 | uint32_t ivlan_vld:1; /* inner VLAN valid */ |
| 950 | uint32_t ovlan_vld:1; /* outer VLAN valid */ |
| 951 | uint32_t pfvf_vld:1; /* PF/VF valid */ |
| 952 | uint32_t macidx:MACIDX_BITWIDTH; /* exact match MAC index */ |
| 953 | uint32_t fcoe:FCOE_BITWIDTH; /* FCoE packet */ |
| 954 | uint32_t iport:IPORT_BITWIDTH; /* ingress port */ |
| 955 | uint32_t matchtype:MATCHTYPE_BITWIDTH; /* MPS match type */ |
| 956 | uint32_t proto:PROTO_BITWIDTH; /* protocol type */ |
| 957 | uint32_t tos:TOS_BITWIDTH; /* TOS/Traffic Type */ |
| 958 | uint32_t pf:PF_BITWIDTH; /* PCI-E PF ID */ |
| 959 | uint32_t vf:VF_BITWIDTH; /* PCI-E VF ID */ |
| 960 | uint32_t ivlan:IVLAN_BITWIDTH; /* inner VLAN */ |
| 961 | uint32_t ovlan:OVLAN_BITWIDTH; /* outer VLAN */ |
| 962 | |
| 963 | /* Uncompressed header matching field rules. These are always |
| 964 | * available for field rules. |
| 965 | */ |
| 966 | uint8_t lip[16]; /* local IP address (IPv4 in [3:0]) */ |
| 967 | uint8_t fip[16]; /* foreign IP address (IPv4 in [3:0]) */ |
| 968 | uint16_t lport; /* local port */ |
| 969 | uint16_t fport; /* foreign port */ |
| 970 | }; |
| 971 | |
| 972 | /* A filter ioctl command. |
| 973 | */ |
| 974 | struct ch_filter_specification { |
| 975 | /* Administrative fields for filter. |
| 976 | */ |
| 977 | uint32_t hitcnts:1; /* count filter hits in TCB */ |
| 978 | uint32_t prio:1; /* filter has priority over active/server */ |
| 979 | |
| 980 | /* Fundamental filter typing. This is the one element of filter |
| 981 | * matching that doesn't exist as a (value, mask) tuple. |
| 982 | */ |
| 983 | uint32_t type:1; /* 0 => IPv4, 1 => IPv6 */ |
| 984 | |
| 985 | /* Packet dispatch information. Ingress packets which match the |
| 986 | * filter rules will be dropped, passed to the host or switched back |
| 987 | * out as egress packets. |
| 988 | */ |
| 989 | uint32_t action:2; /* drop, pass, switch */ |
| 990 | |
| 991 | uint32_t rpttid:1; /* report TID in RSS hash field */ |
| 992 | |
| 993 | uint32_t dirsteer:1; /* 0 => RSS, 1 => steer to iq */ |
| 994 | uint32_t iq:10; /* ingress queue */ |
| 995 | |
| 996 | uint32_t maskhash:1; /* dirsteer=0: store RSS hash in TCB */ |
| 997 | uint32_t dirsteerhash:1;/* dirsteer=1: 0 => TCB contains RSS hash */ |
| 998 | /* 1 => TCB contains IQ ID */ |
| 999 | |
| 1000 | /* Switch proxy/rewrite fields. An ingress packet which matches a |
| 1001 | * filter with "switch" set will be looped back out as an egress |
| 1002 | * packet -- potentially with some Ethernet header rewriting. |
| 1003 | */ |
| 1004 | uint32_t eport:2; /* egress port to switch packet out */ |
| 1005 | uint32_t newdmac:1; /* rewrite destination MAC address */ |
| 1006 | uint32_t newsmac:1; /* rewrite source MAC address */ |
| 1007 | uint32_t newvlan:2; /* rewrite VLAN Tag */ |
| 1008 | uint8_t dmac[ETH_ALEN]; /* new destination MAC address */ |
| 1009 | uint8_t smac[ETH_ALEN]; /* new source MAC address */ |
| 1010 | uint16_t vlan; /* VLAN Tag to insert */ |
| 1011 | |
| 1012 | /* Filter rule value/mask pairs. |
| 1013 | */ |
| 1014 | struct ch_filter_tuple val; |
| 1015 | struct ch_filter_tuple mask; |
| 1016 | }; |
| 1017 | |
| 1018 | enum { |
| 1019 | FILTER_PASS = 0, /* default */ |
| 1020 | FILTER_DROP, |
| 1021 | FILTER_SWITCH |
| 1022 | }; |
| 1023 | |
| 1024 | enum { |
| 1025 | VLAN_NOCHANGE = 0, /* default */ |
| 1026 | VLAN_REMOVE, |
| 1027 | VLAN_INSERT, |
| 1028 | VLAN_REWRITE |
| 1029 | }; |
| 1030 | |
Rahul Lakkireddy | d57fd6c | 2016-09-20 17:13:06 +0530 | [diff] [blame] | 1031 | /* Host shadow copy of ingress filter entry. This is in host native format |
| 1032 | * and doesn't match the ordering or bit order, etc. of the hardware of the |
| 1033 | * firmware command. The use of bit-field structure elements is purely to |
| 1034 | * remind ourselves of the field size limitations and save memory in the case |
| 1035 | * where the filter table is large. |
| 1036 | */ |
| 1037 | struct filter_entry { |
| 1038 | /* Administrative fields for filter. */ |
| 1039 | u32 valid:1; /* filter allocated and valid */ |
| 1040 | u32 locked:1; /* filter is administratively locked */ |
| 1041 | |
| 1042 | u32 pending:1; /* filter action is pending firmware reply */ |
| 1043 | u32 smtidx:8; /* Source MAC Table index for smac */ |
Rahul Lakkireddy | 578b46b | 2016-09-20 17:13:07 +0530 | [diff] [blame] | 1044 | struct filter_ctx *ctx; /* Caller's completion hook */ |
Rahul Lakkireddy | d57fd6c | 2016-09-20 17:13:06 +0530 | [diff] [blame] | 1045 | struct l2t_entry *l2t; /* Layer Two Table entry for dmac */ |
Rahul Lakkireddy | 578b46b | 2016-09-20 17:13:07 +0530 | [diff] [blame] | 1046 | struct net_device *dev; /* Associated net device */ |
| 1047 | u32 tid; /* This will store the actual tid */ |
Rahul Lakkireddy | d57fd6c | 2016-09-20 17:13:06 +0530 | [diff] [blame] | 1048 | |
| 1049 | /* The filter itself. Most of this is a straight copy of information |
| 1050 | * provided by the extended ioctl(). Some fields are translated to |
| 1051 | * internal forms -- for instance the Ingress Queue ID passed in from |
| 1052 | * the ioctl() is translated into the Absolute Ingress Queue ID. |
| 1053 | */ |
| 1054 | struct ch_filter_specification fs; |
| 1055 | }; |
| 1056 | |
Hariprasad Shenai | a4cfd92 | 2015-06-03 21:04:39 +0530 | [diff] [blame] | 1057 | static inline int is_offload(const struct adapter *adap) |
| 1058 | { |
| 1059 | return adap->params.offload; |
| 1060 | } |
| 1061 | |
Hariprasad Shenai | 94cdb8b | 2016-08-17 12:33:03 +0530 | [diff] [blame] | 1062 | static inline int is_pci_uld(const struct adapter *adap) |
| 1063 | { |
| 1064 | return adap->params.crypto; |
| 1065 | } |
| 1066 | |
Hariprasad Shenai | 0fbc81b | 2016-09-17 08:12:39 +0530 | [diff] [blame] | 1067 | static inline int is_uld(const struct adapter *adap) |
| 1068 | { |
| 1069 | return (adap->params.offload || adap->params.crypto); |
| 1070 | } |
| 1071 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1072 | static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr) |
| 1073 | { |
| 1074 | return readl(adap->regs + reg_addr); |
| 1075 | } |
| 1076 | |
| 1077 | static inline void t4_write_reg(struct adapter *adap, u32 reg_addr, u32 val) |
| 1078 | { |
| 1079 | writel(val, adap->regs + reg_addr); |
| 1080 | } |
| 1081 | |
| 1082 | #ifndef readq |
| 1083 | static inline u64 readq(const volatile void __iomem *addr) |
| 1084 | { |
| 1085 | return readl(addr) + ((u64)readl(addr + 4) << 32); |
| 1086 | } |
| 1087 | |
| 1088 | static inline void writeq(u64 val, volatile void __iomem *addr) |
| 1089 | { |
| 1090 | writel(val, addr); |
| 1091 | writel(val >> 32, addr + 4); |
| 1092 | } |
| 1093 | #endif |
| 1094 | |
| 1095 | static inline u64 t4_read_reg64(struct adapter *adap, u32 reg_addr) |
| 1096 | { |
| 1097 | return readq(adap->regs + reg_addr); |
| 1098 | } |
| 1099 | |
| 1100 | static inline void t4_write_reg64(struct adapter *adap, u32 reg_addr, u64 val) |
| 1101 | { |
| 1102 | writeq(val, adap->regs + reg_addr); |
| 1103 | } |
| 1104 | |
| 1105 | /** |
Hariprasad Shenai | 098ef6c | 2015-06-05 14:24:50 +0530 | [diff] [blame] | 1106 | * t4_set_hw_addr - store a port's MAC address in SW |
| 1107 | * @adapter: the adapter |
| 1108 | * @port_idx: the port index |
| 1109 | * @hw_addr: the Ethernet address |
| 1110 | * |
| 1111 | * Store the Ethernet address of the given port in SW. Called by the common |
| 1112 | * code when it retrieves a port's Ethernet address from EEPROM. |
| 1113 | */ |
| 1114 | static inline void t4_set_hw_addr(struct adapter *adapter, int port_idx, |
| 1115 | u8 hw_addr[]) |
| 1116 | { |
| 1117 | ether_addr_copy(adapter->port[port_idx]->dev_addr, hw_addr); |
| 1118 | ether_addr_copy(adapter->port[port_idx]->perm_addr, hw_addr); |
| 1119 | } |
| 1120 | |
| 1121 | /** |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1122 | * netdev2pinfo - return the port_info structure associated with a net_device |
| 1123 | * @dev: the netdev |
| 1124 | * |
| 1125 | * Return the struct port_info associated with a net_device |
| 1126 | */ |
| 1127 | static inline struct port_info *netdev2pinfo(const struct net_device *dev) |
| 1128 | { |
| 1129 | return netdev_priv(dev); |
| 1130 | } |
| 1131 | |
| 1132 | /** |
| 1133 | * adap2pinfo - return the port_info of a port |
| 1134 | * @adap: the adapter |
| 1135 | * @idx: the port index |
| 1136 | * |
| 1137 | * Return the port_info structure for the port of the given index. |
| 1138 | */ |
| 1139 | static inline struct port_info *adap2pinfo(struct adapter *adap, int idx) |
| 1140 | { |
| 1141 | return netdev_priv(adap->port[idx]); |
| 1142 | } |
| 1143 | |
| 1144 | /** |
| 1145 | * netdev2adap - return the adapter structure associated with a net_device |
| 1146 | * @dev: the netdev |
| 1147 | * |
| 1148 | * Return the struct adapter associated with a net_device |
| 1149 | */ |
| 1150 | static inline struct adapter *netdev2adap(const struct net_device *dev) |
| 1151 | { |
| 1152 | return netdev2pinfo(dev)->adapter; |
| 1153 | } |
| 1154 | |
Hariprasad Shenai | 3a336cb | 2015-02-04 15:32:52 +0530 | [diff] [blame] | 1155 | #ifdef CONFIG_NET_RX_BUSY_POLL |
| 1156 | static inline void cxgb_busy_poll_init_lock(struct sge_rspq *q) |
| 1157 | { |
| 1158 | spin_lock_init(&q->bpoll_lock); |
| 1159 | q->bpoll_state = CXGB_POLL_STATE_IDLE; |
| 1160 | } |
| 1161 | |
| 1162 | static inline bool cxgb_poll_lock_napi(struct sge_rspq *q) |
| 1163 | { |
| 1164 | bool rc = true; |
| 1165 | |
| 1166 | spin_lock(&q->bpoll_lock); |
| 1167 | if (q->bpoll_state & CXGB_POLL_LOCKED) { |
| 1168 | q->bpoll_state |= CXGB_POLL_STATE_NAPI_YIELD; |
| 1169 | rc = false; |
| 1170 | } else { |
| 1171 | q->bpoll_state = CXGB_POLL_STATE_NAPI; |
| 1172 | } |
| 1173 | spin_unlock(&q->bpoll_lock); |
| 1174 | return rc; |
| 1175 | } |
| 1176 | |
| 1177 | static inline bool cxgb_poll_unlock_napi(struct sge_rspq *q) |
| 1178 | { |
| 1179 | bool rc = false; |
| 1180 | |
| 1181 | spin_lock(&q->bpoll_lock); |
| 1182 | if (q->bpoll_state & CXGB_POLL_STATE_POLL_YIELD) |
| 1183 | rc = true; |
| 1184 | q->bpoll_state = CXGB_POLL_STATE_IDLE; |
| 1185 | spin_unlock(&q->bpoll_lock); |
| 1186 | return rc; |
| 1187 | } |
| 1188 | |
| 1189 | static inline bool cxgb_poll_lock_poll(struct sge_rspq *q) |
| 1190 | { |
| 1191 | bool rc = true; |
| 1192 | |
| 1193 | spin_lock_bh(&q->bpoll_lock); |
| 1194 | if (q->bpoll_state & CXGB_POLL_LOCKED) { |
| 1195 | q->bpoll_state |= CXGB_POLL_STATE_POLL_YIELD; |
| 1196 | rc = false; |
| 1197 | } else { |
| 1198 | q->bpoll_state |= CXGB_POLL_STATE_POLL; |
| 1199 | } |
| 1200 | spin_unlock_bh(&q->bpoll_lock); |
| 1201 | return rc; |
| 1202 | } |
| 1203 | |
| 1204 | static inline bool cxgb_poll_unlock_poll(struct sge_rspq *q) |
| 1205 | { |
| 1206 | bool rc = false; |
| 1207 | |
| 1208 | spin_lock_bh(&q->bpoll_lock); |
| 1209 | if (q->bpoll_state & CXGB_POLL_STATE_POLL_YIELD) |
| 1210 | rc = true; |
| 1211 | q->bpoll_state = CXGB_POLL_STATE_IDLE; |
| 1212 | spin_unlock_bh(&q->bpoll_lock); |
| 1213 | return rc; |
| 1214 | } |
| 1215 | |
| 1216 | static inline bool cxgb_poll_busy_polling(struct sge_rspq *q) |
| 1217 | { |
| 1218 | return q->bpoll_state & CXGB_POLL_USER_PEND; |
| 1219 | } |
| 1220 | #else |
| 1221 | static inline void cxgb_busy_poll_init_lock(struct sge_rspq *q) |
| 1222 | { |
| 1223 | } |
| 1224 | |
| 1225 | static inline bool cxgb_poll_lock_napi(struct sge_rspq *q) |
| 1226 | { |
| 1227 | return true; |
| 1228 | } |
| 1229 | |
| 1230 | static inline bool cxgb_poll_unlock_napi(struct sge_rspq *q) |
| 1231 | { |
| 1232 | return false; |
| 1233 | } |
| 1234 | |
| 1235 | static inline bool cxgb_poll_lock_poll(struct sge_rspq *q) |
| 1236 | { |
| 1237 | return false; |
| 1238 | } |
| 1239 | |
| 1240 | static inline bool cxgb_poll_unlock_poll(struct sge_rspq *q) |
| 1241 | { |
| 1242 | return false; |
| 1243 | } |
| 1244 | |
| 1245 | static inline bool cxgb_poll_busy_polling(struct sge_rspq *q) |
| 1246 | { |
| 1247 | return false; |
| 1248 | } |
| 1249 | #endif /* CONFIG_NET_RX_BUSY_POLL */ |
| 1250 | |
Hariprasad Shenai | 812034f | 2015-04-06 20:23:23 +0530 | [diff] [blame] | 1251 | /* Return a version number to identify the type of adapter. The scheme is: |
| 1252 | * - bits 0..9: chip version |
| 1253 | * - bits 10..15: chip revision |
| 1254 | * - bits 16..23: register dump version |
| 1255 | */ |
| 1256 | static inline unsigned int mk_adap_vers(struct adapter *ap) |
| 1257 | { |
| 1258 | return CHELSIO_CHIP_VERSION(ap->params.chip) | |
| 1259 | (CHELSIO_CHIP_RELEASE(ap->params.chip) << 10) | (1 << 16); |
| 1260 | } |
| 1261 | |
| 1262 | /* Return a queue's interrupt hold-off time in us. 0 means no timer. */ |
| 1263 | static inline unsigned int qtimer_val(const struct adapter *adap, |
| 1264 | const struct sge_rspq *q) |
| 1265 | { |
| 1266 | unsigned int idx = q->intr_params >> 1; |
| 1267 | |
| 1268 | return idx < SGE_NTIMERS ? adap->sge.timer_val[idx] : 0; |
| 1269 | } |
| 1270 | |
| 1271 | /* driver version & name used for ethtool_drvinfo */ |
| 1272 | extern char cxgb4_driver_name[]; |
| 1273 | extern const char cxgb4_driver_version[]; |
| 1274 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1275 | void t4_os_portmod_changed(const struct adapter *adap, int port_id); |
| 1276 | void t4_os_link_changed(struct adapter *adap, int port_id, int link_stat); |
| 1277 | |
| 1278 | void *t4_alloc_mem(size_t size); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1279 | |
| 1280 | void t4_free_sge_resources(struct adapter *adap); |
Hariprasad Shenai | 5fa7669 | 2014-08-04 17:01:30 +0530 | [diff] [blame] | 1281 | void t4_free_ofld_rxqs(struct adapter *adap, int n, struct sge_ofld_rxq *q); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1282 | irq_handler_t t4_intr_handler(struct adapter *adap); |
| 1283 | netdev_tx_t t4_eth_xmit(struct sk_buff *skb, struct net_device *dev); |
| 1284 | int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp, |
| 1285 | const struct pkt_gl *gl); |
| 1286 | int t4_mgmt_tx(struct adapter *adap, struct sk_buff *skb); |
| 1287 | int t4_ofld_send(struct adapter *adap, struct sk_buff *skb); |
| 1288 | int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq, |
| 1289 | struct net_device *dev, int intr_idx, |
Varun Prakash | 2337ba4 | 2016-02-14 23:02:41 +0530 | [diff] [blame] | 1290 | struct sge_fl *fl, rspq_handler_t hnd, |
| 1291 | rspq_flush_handler_t flush_handler, int cong); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1292 | int t4_sge_alloc_eth_txq(struct adapter *adap, struct sge_eth_txq *txq, |
| 1293 | struct net_device *dev, struct netdev_queue *netdevq, |
| 1294 | unsigned int iqid); |
| 1295 | int t4_sge_alloc_ctrl_txq(struct adapter *adap, struct sge_ctrl_txq *txq, |
| 1296 | struct net_device *dev, unsigned int iqid, |
| 1297 | unsigned int cmplqid); |
Hariprasad Shenai | 0fbc81b | 2016-09-17 08:12:39 +0530 | [diff] [blame] | 1298 | int t4_sge_mod_ctrl_txq(struct adapter *adap, unsigned int eqid, |
| 1299 | unsigned int cmplqid); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1300 | int t4_sge_alloc_ofld_txq(struct adapter *adap, struct sge_ofld_txq *txq, |
| 1301 | struct net_device *dev, unsigned int iqid); |
| 1302 | irqreturn_t t4_sge_intr_msix(int irq, void *cookie); |
Vipul Pandya | 52367a7 | 2012-09-26 02:39:38 +0000 | [diff] [blame] | 1303 | int t4_sge_init(struct adapter *adap); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1304 | void t4_sge_start(struct adapter *adap); |
| 1305 | void t4_sge_stop(struct adapter *adap); |
Hariprasad Shenai | 3a336cb | 2015-02-04 15:32:52 +0530 | [diff] [blame] | 1306 | int cxgb_busy_poll(struct napi_struct *napi); |
Hariprasad Shenai | 812034f | 2015-04-06 20:23:23 +0530 | [diff] [blame] | 1307 | void cxgb4_set_ethtool_ops(struct net_device *netdev); |
| 1308 | int cxgb4_write_rss(const struct port_info *pi, const u16 *queues); |
Vipul Pandya | 3069ee9 | 2012-05-18 15:29:26 +0530 | [diff] [blame] | 1309 | extern int dbfifo_int_thresh; |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1310 | |
| 1311 | #define for_each_port(adapter, iter) \ |
| 1312 | for (iter = 0; iter < (adapter)->params.nports; ++iter) |
| 1313 | |
Vipul Pandya | 9a4da2c | 2012-10-19 02:09:53 +0000 | [diff] [blame] | 1314 | static inline int is_bypass(struct adapter *adap) |
| 1315 | { |
| 1316 | return adap->params.bypass; |
| 1317 | } |
| 1318 | |
| 1319 | static inline int is_bypass_device(int device) |
| 1320 | { |
| 1321 | /* this should be set based upon device capabilities */ |
| 1322 | switch (device) { |
| 1323 | case 0x440b: |
| 1324 | case 0x440c: |
| 1325 | return 1; |
| 1326 | default: |
| 1327 | return 0; |
| 1328 | } |
| 1329 | } |
| 1330 | |
Hariprasad Shenai | 01b6961 | 2015-05-22 21:58:21 +0530 | [diff] [blame] | 1331 | static inline int is_10gbt_device(int device) |
| 1332 | { |
| 1333 | /* this should be set based upon device capabilities */ |
| 1334 | switch (device) { |
| 1335 | case 0x4409: |
| 1336 | case 0x4486: |
| 1337 | return 1; |
| 1338 | |
| 1339 | default: |
| 1340 | return 0; |
| 1341 | } |
| 1342 | } |
| 1343 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1344 | static inline unsigned int core_ticks_per_usec(const struct adapter *adap) |
| 1345 | { |
| 1346 | return adap->params.vpd.cclk / 1000; |
| 1347 | } |
| 1348 | |
| 1349 | static inline unsigned int us_to_core_ticks(const struct adapter *adap, |
| 1350 | unsigned int us) |
| 1351 | { |
| 1352 | return (us * adap->params.vpd.cclk) / 1000; |
| 1353 | } |
| 1354 | |
Vipul Pandya | 52367a7 | 2012-09-26 02:39:38 +0000 | [diff] [blame] | 1355 | static inline unsigned int core_ticks_to_us(const struct adapter *adapter, |
| 1356 | unsigned int ticks) |
| 1357 | { |
| 1358 | /* add Core Clock / 2 to round ticks to nearest uS */ |
| 1359 | return ((ticks * 1000 + adapter->params.vpd.cclk/2) / |
| 1360 | adapter->params.vpd.cclk); |
| 1361 | } |
| 1362 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1363 | void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, |
| 1364 | u32 val); |
| 1365 | |
Hariprasad Shenai | 01b6961 | 2015-05-22 21:58:21 +0530 | [diff] [blame] | 1366 | int t4_wr_mbox_meat_timeout(struct adapter *adap, int mbox, const void *cmd, |
| 1367 | int size, void *rpl, bool sleep_ok, int timeout); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1368 | int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size, |
| 1369 | void *rpl, bool sleep_ok); |
| 1370 | |
Hariprasad Shenai | 01b6961 | 2015-05-22 21:58:21 +0530 | [diff] [blame] | 1371 | static inline int t4_wr_mbox_timeout(struct adapter *adap, int mbox, |
| 1372 | const void *cmd, int size, void *rpl, |
| 1373 | int timeout) |
| 1374 | { |
| 1375 | return t4_wr_mbox_meat_timeout(adap, mbox, cmd, size, rpl, true, |
| 1376 | timeout); |
| 1377 | } |
| 1378 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1379 | static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd, |
| 1380 | int size, void *rpl) |
| 1381 | { |
| 1382 | return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true); |
| 1383 | } |
| 1384 | |
| 1385 | static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd, |
| 1386 | int size, void *rpl) |
| 1387 | { |
| 1388 | return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false); |
| 1389 | } |
| 1390 | |
Hariprasad Shenai | fc08a01 | 2016-02-16 10:07:09 +0530 | [diff] [blame] | 1391 | /** |
| 1392 | * hash_mac_addr - return the hash value of a MAC address |
| 1393 | * @addr: the 48-bit Ethernet MAC address |
| 1394 | * |
| 1395 | * Hashes a MAC address according to the hash function used by HW inexact |
| 1396 | * (hash) address matching. |
| 1397 | */ |
| 1398 | static inline int hash_mac_addr(const u8 *addr) |
| 1399 | { |
| 1400 | u32 a = ((u32)addr[0] << 16) | ((u32)addr[1] << 8) | addr[2]; |
| 1401 | u32 b = ((u32)addr[3] << 16) | ((u32)addr[4] << 8) | addr[5]; |
| 1402 | |
| 1403 | a ^= b; |
| 1404 | a ^= (a >> 12); |
| 1405 | a ^= (a >> 6); |
| 1406 | return a & 0x3f; |
| 1407 | } |
| 1408 | |
Hariprasad Shenai | 94cdb8b | 2016-08-17 12:33:03 +0530 | [diff] [blame] | 1409 | int cxgb4_set_rspq_intr_params(struct sge_rspq *q, unsigned int us, |
| 1410 | unsigned int cnt); |
| 1411 | static inline void init_rspq(struct adapter *adap, struct sge_rspq *q, |
| 1412 | unsigned int us, unsigned int cnt, |
| 1413 | unsigned int size, unsigned int iqe_size) |
| 1414 | { |
| 1415 | q->adap = adap; |
| 1416 | cxgb4_set_rspq_intr_params(q, us, cnt); |
| 1417 | q->iqe_len = iqe_size; |
| 1418 | q->size = size; |
| 1419 | } |
| 1420 | |
Vipul Pandya | 13ee15d | 2012-09-26 02:39:40 +0000 | [diff] [blame] | 1421 | void t4_write_indirect(struct adapter *adap, unsigned int addr_reg, |
| 1422 | unsigned int data_reg, const u32 *vals, |
| 1423 | unsigned int nregs, unsigned int start_idx); |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 1424 | void t4_read_indirect(struct adapter *adap, unsigned int addr_reg, |
| 1425 | unsigned int data_reg, u32 *vals, unsigned int nregs, |
| 1426 | unsigned int start_idx); |
Hariprasad Shenai | 0abfd15 | 2014-06-27 19:23:48 +0530 | [diff] [blame] | 1427 | void t4_hw_pci_read_cfg4(struct adapter *adapter, int reg, u32 *val); |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 1428 | |
| 1429 | struct fw_filter_wr; |
| 1430 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1431 | void t4_intr_enable(struct adapter *adapter); |
| 1432 | void t4_intr_disable(struct adapter *adapter); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1433 | int t4_slow_intr_handler(struct adapter *adapter); |
| 1434 | |
Hariprasad Shenai | 8203b50 | 2014-10-09 05:48:47 +0530 | [diff] [blame] | 1435 | int t4_wait_dev_ready(void __iomem *regs); |
Hariprasad Shenai | 4036da9 | 2015-06-05 14:24:49 +0530 | [diff] [blame] | 1436 | int t4_link_l1cfg(struct adapter *adap, unsigned int mbox, unsigned int port, |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1437 | struct link_config *lc); |
| 1438 | int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port); |
Hariprasad Shenai | fc5ab02 | 2014-06-27 19:23:49 +0530 | [diff] [blame] | 1439 | |
Hariprasad Shenai | b562fc3 | 2015-05-20 17:53:45 +0530 | [diff] [blame] | 1440 | u32 t4_read_pcie_cfg4(struct adapter *adap, int reg); |
| 1441 | u32 t4_get_util_window(struct adapter *adap); |
| 1442 | void t4_setup_memwin(struct adapter *adap, u32 memwin_base, u32 window); |
| 1443 | |
Hariprasad Shenai | fc5ab02 | 2014-06-27 19:23:49 +0530 | [diff] [blame] | 1444 | #define T4_MEMORY_WRITE 0 |
| 1445 | #define T4_MEMORY_READ 1 |
| 1446 | int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr, u32 len, |
Hariprasad Shenai | f01aa63 | 2015-02-25 16:50:04 +0530 | [diff] [blame] | 1447 | void *buf, int dir); |
Hariprasad Shenai | fc5ab02 | 2014-06-27 19:23:49 +0530 | [diff] [blame] | 1448 | static inline int t4_memory_write(struct adapter *adap, int mtype, u32 addr, |
| 1449 | u32 len, __be32 *buf) |
| 1450 | { |
| 1451 | return t4_memory_rw(adap, 0, mtype, addr, len, buf, 0); |
| 1452 | } |
| 1453 | |
Hariprasad Shenai | 812034f | 2015-04-06 20:23:23 +0530 | [diff] [blame] | 1454 | unsigned int t4_get_regs_len(struct adapter *adapter); |
| 1455 | void t4_get_regs(struct adapter *adap, void *buf, size_t buf_size); |
| 1456 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1457 | int t4_seeprom_wp(struct adapter *adapter, bool enable); |
Hariprasad Shenai | 098ef6c | 2015-06-05 14:24:50 +0530 | [diff] [blame] | 1458 | int t4_get_raw_vpd_params(struct adapter *adapter, struct vpd_params *p); |
| 1459 | int t4_get_vpd_params(struct adapter *adapter, struct vpd_params *p); |
Hariprasad Shenai | 49216c1 | 2015-01-20 12:02:20 +0530 | [diff] [blame] | 1460 | int t4_read_flash(struct adapter *adapter, unsigned int addr, |
| 1461 | unsigned int nwords, u32 *data, int byte_oriented); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1462 | int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size); |
Hariprasad Shenai | 01b6961 | 2015-05-22 21:58:21 +0530 | [diff] [blame] | 1463 | int t4_load_phy_fw(struct adapter *adap, |
| 1464 | int win, spinlock_t *lock, |
| 1465 | int (*phy_fw_version)(const u8 *, size_t), |
| 1466 | const u8 *phy_fw_data, size_t phy_fw_size); |
| 1467 | int t4_phy_fw_ver(struct adapter *adap, int *phy_fw_ver); |
Hariprasad Shenai | 49216c1 | 2015-01-20 12:02:20 +0530 | [diff] [blame] | 1468 | int t4_fwcache(struct adapter *adap, enum fw_params_param_dev_fwcache op); |
Hariprasad Shenai | 22c0b96 | 2014-10-15 01:54:14 +0530 | [diff] [blame] | 1469 | int t4_fw_upgrade(struct adapter *adap, unsigned int mbox, |
| 1470 | const u8 *fw_data, unsigned int size, int force); |
Hariprasad Shenai | acac596 | 2015-12-23 22:47:13 +0530 | [diff] [blame] | 1471 | int t4_fl_pkt_align(struct adapter *adap); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 1472 | unsigned int t4_flash_cfg_addr(struct adapter *adapter); |
Hariprasad Shenai | a69265e | 2015-08-28 11:17:12 +0530 | [diff] [blame] | 1473 | int t4_check_fw_version(struct adapter *adap); |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 1474 | int t4_get_fw_version(struct adapter *adapter, u32 *vers); |
Hariprasad Shenai | 0de7273 | 2016-04-26 20:10:22 +0530 | [diff] [blame] | 1475 | int t4_get_bs_version(struct adapter *adapter, u32 *vers); |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 1476 | int t4_get_tp_version(struct adapter *adapter, u32 *vers); |
Hariprasad Shenai | ba3f8cd | 2015-02-09 12:07:30 +0530 | [diff] [blame] | 1477 | int t4_get_exprom_version(struct adapter *adapter, u32 *vers); |
Hariprasad Shenai | 16e4762 | 2013-12-03 17:05:58 +0530 | [diff] [blame] | 1478 | int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info, |
| 1479 | const u8 *fw_data, unsigned int fw_size, |
| 1480 | struct fw_hdr *card_fw, enum dev_state state, int *reset); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1481 | int t4_prep_adapter(struct adapter *adapter); |
Hariprasad Shenai | e85c9a7 | 2014-12-03 19:32:52 +0530 | [diff] [blame] | 1482 | |
| 1483 | enum t4_bar2_qtype { T4_BAR2_QTYPE_EGRESS, T4_BAR2_QTYPE_INGRESS }; |
Hariprasad Shenai | b261272 | 2015-05-27 22:30:24 +0530 | [diff] [blame] | 1484 | int t4_bar2_sge_qregs(struct adapter *adapter, |
Hariprasad Shenai | e85c9a7 | 2014-12-03 19:32:52 +0530 | [diff] [blame] | 1485 | unsigned int qid, |
| 1486 | enum t4_bar2_qtype qtype, |
Hariprasad S | 66cf188 | 2015-06-09 18:23:11 +0530 | [diff] [blame] | 1487 | int user, |
Hariprasad Shenai | e85c9a7 | 2014-12-03 19:32:52 +0530 | [diff] [blame] | 1488 | u64 *pbar2_qoffset, |
| 1489 | unsigned int *pbar2_qid); |
| 1490 | |
Hariprasad Shenai | dc9daab | 2015-01-27 13:47:45 +0530 | [diff] [blame] | 1491 | unsigned int qtimer_val(const struct adapter *adap, |
| 1492 | const struct sge_rspq *q); |
Hariprasad Shenai | ae469b6 | 2015-04-01 21:41:16 +0530 | [diff] [blame] | 1493 | |
| 1494 | int t4_init_devlog_params(struct adapter *adapter); |
Hariprasad Shenai | e85c9a7 | 2014-12-03 19:32:52 +0530 | [diff] [blame] | 1495 | int t4_init_sge_params(struct adapter *adapter); |
Kumar Sanghvi | dcf7b6f | 2013-12-18 16:38:23 +0530 | [diff] [blame] | 1496 | int t4_init_tp_params(struct adapter *adap); |
| 1497 | int t4_filter_field_shift(const struct adapter *adap, int filter_sel); |
Hariprasad Shenai | c035e18 | 2015-05-06 19:48:37 +0530 | [diff] [blame] | 1498 | int t4_init_rss_mode(struct adapter *adap, int mbox); |
Hariprasad Shenai | c3e324e | 2016-04-26 20:10:26 +0530 | [diff] [blame] | 1499 | int t4_init_portinfo(struct port_info *pi, int mbox, |
| 1500 | int port, int pf, int vf, u8 mac[]); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1501 | int t4_port_init(struct adapter *adap, int mbox, int pf, int vf); |
| 1502 | void t4_fatal_err(struct adapter *adapter); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1503 | int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, |
| 1504 | int start, int n, const u16 *rspq, unsigned int nrspq); |
| 1505 | int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode, |
| 1506 | unsigned int flags); |
Hariprasad Shenai | c035e18 | 2015-05-06 19:48:37 +0530 | [diff] [blame] | 1507 | int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid, |
| 1508 | unsigned int flags, unsigned int defq); |
Hariprasad Shenai | 688ea5f | 2015-01-20 12:02:21 +0530 | [diff] [blame] | 1509 | int t4_read_rss(struct adapter *adapter, u16 *entries); |
| 1510 | void t4_read_rss_key(struct adapter *adapter, u32 *key); |
| 1511 | void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx); |
| 1512 | void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index, |
| 1513 | u32 *valp); |
| 1514 | void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index, |
| 1515 | u32 *vfl, u32 *vfh); |
| 1516 | u32 t4_read_rss_pf_map(struct adapter *adapter); |
| 1517 | u32 t4_read_rss_pf_mask(struct adapter *adapter); |
| 1518 | |
Hariprasad Shenai | 145ef8a | 2015-05-05 14:59:52 +0530 | [diff] [blame] | 1519 | unsigned int t4_get_mps_bg_map(struct adapter *adapter, int idx); |
Hariprasad Shenai | b3bbe36 | 2015-01-27 13:47:48 +0530 | [diff] [blame] | 1520 | void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); |
| 1521 | void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); |
Hariprasad Shenai | e5f0e43 | 2015-01-27 13:47:46 +0530 | [diff] [blame] | 1522 | int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, |
| 1523 | size_t n); |
Hariprasad Shenai | c778af7 | 2015-01-27 13:47:47 +0530 | [diff] [blame] | 1524 | int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, |
| 1525 | size_t n); |
Hariprasad Shenai | f1ff24a | 2015-01-07 08:48:01 +0530 | [diff] [blame] | 1526 | int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n, |
| 1527 | unsigned int *valp); |
| 1528 | int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n, |
| 1529 | const unsigned int *valp); |
| 1530 | int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr); |
Hariprasad Shenai | 1968960 | 2015-06-09 18:27:51 +0530 | [diff] [blame] | 1531 | void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp, |
| 1532 | unsigned int *pif_req_wrptr, |
| 1533 | unsigned int *pif_rsp_wrptr); |
Hariprasad Shenai | 26fae93 | 2015-06-09 18:27:50 +0530 | [diff] [blame] | 1534 | void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp); |
Hariprasad Shenai | 74b3092 | 2015-01-07 08:48:02 +0530 | [diff] [blame] | 1535 | void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres); |
Kumar Sanghvi | 72aca4b | 2014-02-18 17:56:08 +0530 | [diff] [blame] | 1536 | const char *t4_get_port_type_description(enum fw_port_type port_type); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1537 | void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p); |
Hariprasad Shenai | a4cfd92 | 2015-06-03 21:04:39 +0530 | [diff] [blame] | 1538 | void t4_get_port_stats_offset(struct adapter *adap, int idx, |
| 1539 | struct port_stats *stats, |
| 1540 | struct port_stats *offset); |
Hariprasad Shenai | 65046e8 | 2015-06-03 21:04:41 +0530 | [diff] [blame] | 1541 | void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1542 | void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log); |
Hariprasad Shenai | bad4379 | 2015-02-06 19:32:55 +0530 | [diff] [blame] | 1543 | void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 1544 | void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr, |
| 1545 | unsigned int mask, unsigned int val); |
Hariprasad Shenai | 2d277b3 | 2015-02-06 19:32:52 +0530 | [diff] [blame] | 1546 | void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr); |
Hariprasad Shenai | a4cfd92 | 2015-06-03 21:04:39 +0530 | [diff] [blame] | 1547 | void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st); |
Hariprasad Shenai | a622297 | 2015-06-03 21:04:40 +0530 | [diff] [blame] | 1548 | void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st); |
Hariprasad Shenai | a4cfd92 | 2015-06-03 21:04:39 +0530 | [diff] [blame] | 1549 | void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st); |
| 1550 | void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1551 | void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4, |
| 1552 | struct tp_tcp_stats *v6); |
Hariprasad Shenai | a622297 | 2015-06-03 21:04:40 +0530 | [diff] [blame] | 1553 | void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx, |
| 1554 | struct tp_fcoe_stats *st); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1555 | void t4_load_mtus(struct adapter *adap, const unsigned short *mtus, |
| 1556 | const unsigned short *alpha, const unsigned short *beta); |
| 1557 | |
Hariprasad Shenai | 797ff0f | 2015-02-06 19:32:53 +0530 | [diff] [blame] | 1558 | void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf); |
| 1559 | |
Hariprasad Shenai | 7864026 | 2015-06-09 18:27:52 +0530 | [diff] [blame] | 1560 | void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate); |
Vipul Pandya | f2b7e78 | 2012-12-10 09:30:52 +0000 | [diff] [blame] | 1561 | void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid); |
| 1562 | |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1563 | void t4_wol_magic_enable(struct adapter *adap, unsigned int port, |
| 1564 | const u8 *addr); |
| 1565 | int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map, |
| 1566 | u64 mask0, u64 mask1, unsigned int crc, bool enable); |
| 1567 | |
| 1568 | int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox, |
| 1569 | enum dev_master master, enum dev_state *state); |
| 1570 | int t4_fw_bye(struct adapter *adap, unsigned int mbox); |
| 1571 | int t4_early_init(struct adapter *adap, unsigned int mbox); |
| 1572 | int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset); |
Vipul Pandya | 636f9d3 | 2012-09-26 02:39:39 +0000 | [diff] [blame] | 1573 | int t4_fixup_host_params(struct adapter *adap, unsigned int page_size, |
| 1574 | unsigned int cache_line_size); |
| 1575 | int t4_fw_initialize(struct adapter *adap, unsigned int mbox); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1576 | int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf, |
| 1577 | unsigned int vf, unsigned int nparams, const u32 *params, |
| 1578 | u32 *val); |
Hariprasad Shenai | 01b6961 | 2015-05-22 21:58:21 +0530 | [diff] [blame] | 1579 | int t4_query_params_rw(struct adapter *adap, unsigned int mbox, unsigned int pf, |
| 1580 | unsigned int vf, unsigned int nparams, const u32 *params, |
| 1581 | u32 *val, int rw); |
| 1582 | int t4_set_params_timeout(struct adapter *adap, unsigned int mbox, |
| 1583 | unsigned int pf, unsigned int vf, |
| 1584 | unsigned int nparams, const u32 *params, |
| 1585 | const u32 *val, int timeout); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1586 | int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf, |
| 1587 | unsigned int vf, unsigned int nparams, const u32 *params, |
| 1588 | const u32 *val); |
| 1589 | int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf, |
| 1590 | unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl, |
| 1591 | unsigned int rxqi, unsigned int rxq, unsigned int tc, |
| 1592 | unsigned int vi, unsigned int cmask, unsigned int pmask, |
| 1593 | unsigned int nexact, unsigned int rcaps, unsigned int wxcaps); |
| 1594 | int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port, |
| 1595 | unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac, |
| 1596 | unsigned int *rss_size); |
Hariprasad Shenai | 4f3a0fc | 2015-06-05 14:24:47 +0530 | [diff] [blame] | 1597 | int t4_free_vi(struct adapter *adap, unsigned int mbox, |
| 1598 | unsigned int pf, unsigned int vf, |
| 1599 | unsigned int viid); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1600 | int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid, |
Dimitris Michailidis | f8f5aaf | 2010-05-10 15:58:07 +0000 | [diff] [blame] | 1601 | int mtu, int promisc, int all_multi, int bcast, int vlanex, |
| 1602 | bool sleep_ok); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1603 | int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, |
| 1604 | unsigned int viid, bool free, unsigned int naddr, |
| 1605 | const u8 **addr, u16 *idx, u64 *hash, bool sleep_ok); |
Hariprasad Shenai | fc08a01 | 2016-02-16 10:07:09 +0530 | [diff] [blame] | 1606 | int t4_free_mac_filt(struct adapter *adap, unsigned int mbox, |
| 1607 | unsigned int viid, unsigned int naddr, |
| 1608 | const u8 **addr, bool sleep_ok); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1609 | int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid, |
| 1610 | int idx, const u8 *addr, bool persist, bool add_smt); |
| 1611 | int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid, |
| 1612 | bool ucast, u64 vec, bool sleep_ok); |
Anish Bhatt | 688848b | 2014-06-19 21:37:13 -0700 | [diff] [blame] | 1613 | int t4_enable_vi_params(struct adapter *adap, unsigned int mbox, |
| 1614 | unsigned int viid, bool rx_en, bool tx_en, bool dcb_en); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1615 | int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid, |
| 1616 | bool rx_en, bool tx_en); |
| 1617 | int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid, |
| 1618 | unsigned int nblinks); |
| 1619 | int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, |
| 1620 | unsigned int mmd, unsigned int reg, u16 *valp); |
| 1621 | int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, |
| 1622 | unsigned int mmd, unsigned int reg, u16 val); |
Hariprasad Shenai | ebf4dc2 | 2016-04-11 11:07:58 +0530 | [diff] [blame] | 1623 | int t4_iq_stop(struct adapter *adap, unsigned int mbox, unsigned int pf, |
| 1624 | unsigned int vf, unsigned int iqtype, unsigned int iqid, |
| 1625 | unsigned int fl0id, unsigned int fl1id); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1626 | int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, |
| 1627 | unsigned int vf, unsigned int iqtype, unsigned int iqid, |
| 1628 | unsigned int fl0id, unsigned int fl1id); |
| 1629 | int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, |
| 1630 | unsigned int vf, unsigned int eqid); |
| 1631 | int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, |
| 1632 | unsigned int vf, unsigned int eqid); |
| 1633 | int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, |
| 1634 | unsigned int vf, unsigned int eqid); |
Hariprasad Shenai | 5d700ec | 2015-06-05 14:24:48 +0530 | [diff] [blame] | 1635 | int t4_sge_ctxt_flush(struct adapter *adap, unsigned int mbox); |
Hariprasad Shenai | 23853a0 | 2016-04-26 20:10:28 +0530 | [diff] [blame] | 1636 | void t4_handle_get_port_info(struct port_info *pi, const __be64 *rpl); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1637 | int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl); |
Vipul Pandya | 881806b | 2012-05-18 15:29:24 +0530 | [diff] [blame] | 1638 | void t4_db_full(struct adapter *adapter); |
| 1639 | void t4_db_dropped(struct adapter *adapter); |
Hariprasad Shenai | 8e3d04f | 2015-08-13 09:44:22 +0530 | [diff] [blame] | 1640 | int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp, |
| 1641 | int filter_index, int enable); |
| 1642 | void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp, |
| 1643 | int filter_index, int *enabled); |
Vipul Pandya | 8caa1e8 | 2012-05-18 15:29:25 +0530 | [diff] [blame] | 1644 | int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, |
| 1645 | u32 addr, u32 val); |
Rahul Lakkireddy | b72a32d | 2016-08-22 16:29:06 +0530 | [diff] [blame] | 1646 | int t4_sched_params(struct adapter *adapter, int type, int level, int mode, |
| 1647 | int rateunit, int ratemode, int channel, int class, |
| 1648 | int minrate, int maxrate, int weight, int pktsize); |
Kumar Sanghvi | 68bce192 | 2014-03-13 20:50:47 +0530 | [diff] [blame] | 1649 | void t4_sge_decode_idma_state(struct adapter *adapter, int state); |
Hariprasad Shenai | fd88b31 | 2014-11-07 09:35:23 +0530 | [diff] [blame] | 1650 | void t4_free_mem(void *addr); |
Hariprasad Shenai | a3bfb61 | 2015-05-05 14:59:55 +0530 | [diff] [blame] | 1651 | void t4_idma_monitor_init(struct adapter *adapter, |
| 1652 | struct sge_idma_monitor_state *idma); |
| 1653 | void t4_idma_monitor(struct adapter *adapter, |
| 1654 | struct sge_idma_monitor_state *idma, |
| 1655 | int hz, int ticks); |
Hariprasad Shenai | 858aa65 | 2016-08-11 21:06:24 +0530 | [diff] [blame] | 1656 | int t4_set_vf_mac_acl(struct adapter *adapter, unsigned int vf, |
| 1657 | unsigned int naddr, u8 *addr); |
Hariprasad Shenai | 0fbc81b | 2016-09-17 08:12:39 +0530 | [diff] [blame] | 1658 | void t4_uld_mem_free(struct adapter *adap); |
| 1659 | int t4_uld_mem_alloc(struct adapter *adap); |
| 1660 | void t4_uld_clean_up(struct adapter *adap); |
| 1661 | void t4_register_netevent_notifier(void); |
Hariprasad Shenai | 94cdb8b | 2016-08-17 12:33:03 +0530 | [diff] [blame] | 1662 | void free_rspq_fl(struct adapter *adap, struct sge_rspq *rq, struct sge_fl *fl); |
Dimitris Michailidis | 625ba2c | 2010-04-01 15:28:25 +0000 | [diff] [blame] | 1663 | #endif /* __CXGB4_H__ */ |