blob: 71c7aca0b43194e1ef45e49e3742877f08d9f9b3 [file] [log] [blame]
George666e8452011-02-19 16:29:27 -06001/******************************************************************************
2 *
3 * Copyright(c) 2009-2010 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28****************************************************************************/
Joe Perches292b1192011-07-20 08:51:35 -070029
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
George666e8452011-02-19 16:29:27 -060032#include <linux/module.h>
33
34#include "../wifi.h"
35#include "../pci.h"
36#include "../usb.h"
37#include "../ps.h"
38#include "../cam.h"
39#include "reg.h"
40#include "def.h"
41#include "phy.h"
42#include "rf.h"
43#include "dm.h"
44#include "mac.h"
45#include "trx.h"
46
47/* macro to shorten lines */
48
49#define LINK_Q ui_link_quality
50#define RX_EVM rx_evm_percentage
51#define RX_SIGQ rx_mimo_signalquality
52
53
54void rtl92c_read_chip_version(struct ieee80211_hw *hw)
55{
56 struct rtl_priv *rtlpriv = rtl_priv(hw);
57 struct rtl_phy *rtlphy = &(rtlpriv->phy);
58 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
59 enum version_8192c chip_version = VERSION_UNKNOWN;
60 u32 value32;
61
62 value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
63 if (value32 & TRP_VAUX_EN) {
64 chip_version = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C :
65 VERSION_TEST_CHIP_88C;
66 } else {
67 /* Normal mass production chip. */
68 chip_version = NORMAL_CHIP;
69 chip_version |= ((value32 & TYPE_ID) ? CHIP_92C : 0);
70 chip_version |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
71 /* RTL8723 with BT function. */
72 chip_version |= ((value32 & BT_FUNC) ? CHIP_8723 : 0);
73 if (IS_VENDOR_UMC(chip_version))
74 chip_version |= ((value32 & CHIP_VER_RTL_MASK) ?
75 CHIP_VENDOR_UMC_B_CUT : 0);
76 if (IS_92C_SERIAL(chip_version)) {
77 value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM);
78 chip_version |= ((CHIP_BONDING_IDENTIFIER(value32) ==
79 CHIP_BONDING_92C_1T2R) ? CHIP_92C_1T2R : 0);
80 } else if (IS_8723_SERIES(chip_version)) {
81 value32 = rtl_read_dword(rtlpriv, REG_GPIO_OUTSTS);
82 chip_version |= ((value32 & RF_RL_ID) ?
83 CHIP_8723_DRV_REV : 0);
84 }
85 }
86 rtlhal->version = (enum version_8192c)chip_version;
Joe Perchesd9595ce2012-01-06 11:31:42 -080087 pr_info("Chip version 0x%x\n", chip_version);
George666e8452011-02-19 16:29:27 -060088 switch (rtlhal->version) {
89 case VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
90 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -080091 "Chip Version ID: VERSION_B_CHIP_92C\n");
George666e8452011-02-19 16:29:27 -060092 break;
93 case VERSION_NORMAL_TSMC_CHIP_92C:
94 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -080095 "Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C\n");
George666e8452011-02-19 16:29:27 -060096 break;
97 case VERSION_NORMAL_TSMC_CHIP_88C:
98 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -080099 "Chip Version ID: VERSION_NORMAL_TSMC_CHIP_88C\n");
George666e8452011-02-19 16:29:27 -0600100 break;
101 case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
102 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -0800103 "Chip Version ID: VERSION_NORMAL_UMC_CHIP_i92C_1T2R_A_CUT\n");
George666e8452011-02-19 16:29:27 -0600104 break;
105 case VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
106 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -0800107 "Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_A_CUT\n");
George666e8452011-02-19 16:29:27 -0600108 break;
109 case VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
110 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -0800111 "Chip Version ID: VERSION_NORMAL_UMC_CHIP_88C_A_CUT\n");
George666e8452011-02-19 16:29:27 -0600112 break;
113 case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
114 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -0800115 "Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT\n");
George666e8452011-02-19 16:29:27 -0600116 break;
117 case VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
118 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -0800119 "Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_B_CUT\n");
George666e8452011-02-19 16:29:27 -0600120 break;
121 case VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
122 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -0800123 "Chip Version ID: VERSION_NORMAL_UMC_CHIP_88C_B_CUT\n");
George666e8452011-02-19 16:29:27 -0600124 break;
125 case VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT:
126 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -0800127 "Chip Version ID: VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT\n");
George666e8452011-02-19 16:29:27 -0600128 break;
129 case VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT:
130 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -0800131 "Chip Version ID: VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT\n");
George666e8452011-02-19 16:29:27 -0600132 break;
133 case VERSION_TEST_CHIP_92C:
134 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -0800135 "Chip Version ID: VERSION_TEST_CHIP_92C\n");
George666e8452011-02-19 16:29:27 -0600136 break;
137 case VERSION_TEST_CHIP_88C:
138 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -0800139 "Chip Version ID: VERSION_TEST_CHIP_88C\n");
George666e8452011-02-19 16:29:27 -0600140 break;
141 default:
142 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
Joe Perchesf30d7502012-01-04 19:40:41 -0800143 "Chip Version ID: ???????????????\n");
George666e8452011-02-19 16:29:27 -0600144 break;
145 }
146 if (IS_92C_SERIAL(rtlhal->version))
147 rtlphy->rf_type =
148 (IS_92C_1T2R(rtlhal->version)) ? RF_1T2R : RF_2T2R;
149 else
150 rtlphy->rf_type = RF_1T1R;
151 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
Joe Perchesf30d7502012-01-04 19:40:41 -0800152 "Chip RF Type: %s\n",
153 rtlphy->rf_type == RF_2T2R ? "RF_2T2R" : "RF_1T1R");
George666e8452011-02-19 16:29:27 -0600154 if (get_rf_type(rtlphy) == RF_1T1R)
155 rtlpriv->dm.rfpath_rxenable[0] = true;
156 else
157 rtlpriv->dm.rfpath_rxenable[0] =
158 rtlpriv->dm.rfpath_rxenable[1] = true;
Joe Perchesf30d7502012-01-04 19:40:41 -0800159 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n",
160 rtlhal->version);
George666e8452011-02-19 16:29:27 -0600161}
162
163/**
164 * writeLLT - LLT table write access
165 * @io: io callback
166 * @address: LLT logical address.
167 * @data: LLT data content
168 *
169 * Realtek hardware access function.
170 *
171 */
172bool rtl92c_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
173{
174 struct rtl_priv *rtlpriv = rtl_priv(hw);
175 bool status = true;
176 long count = 0;
177 u32 value = _LLT_INIT_ADDR(address) |
178 _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
179
180 rtl_write_dword(rtlpriv, REG_LLT_INIT, value);
181 do {
182 value = rtl_read_dword(rtlpriv, REG_LLT_INIT);
183 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
184 break;
185 if (count > POLLING_LLT_THRESHOLD) {
186 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800187 "Failed to polling write LLT done at address %d! _LLT_OP_VALUE(%x)\n",
188 address, _LLT_OP_VALUE(value));
George666e8452011-02-19 16:29:27 -0600189 status = false;
190 break;
191 }
192 } while (++count);
193 return status;
194}
195/**
196 * rtl92c_init_LLT_table - Init LLT table
197 * @io: io callback
198 * @boundary:
199 *
200 * Realtek hardware access function.
201 *
202 */
203bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary)
204{
205 bool rst = true;
206 u32 i;
207
208 for (i = 0; i < (boundary - 1); i++) {
209 rst = rtl92c_llt_write(hw, i , i + 1);
210 if (true != rst) {
Joe Perches292b1192011-07-20 08:51:35 -0700211 pr_err("===> %s #1 fail\n", __func__);
George666e8452011-02-19 16:29:27 -0600212 return rst;
213 }
214 }
215 /* end of list */
216 rst = rtl92c_llt_write(hw, (boundary - 1), 0xFF);
217 if (true != rst) {
Joe Perches292b1192011-07-20 08:51:35 -0700218 pr_err("===> %s #2 fail\n", __func__);
George666e8452011-02-19 16:29:27 -0600219 return rst;
220 }
221 /* Make the other pages as ring buffer
222 * This ring buffer is used as beacon buffer if we config this MAC
223 * as two MAC transfer.
224 * Otherwise used as local loopback buffer.
225 */
226 for (i = boundary; i < LLT_LAST_ENTRY_OF_TX_PKT_BUFFER; i++) {
227 rst = rtl92c_llt_write(hw, i, (i + 1));
228 if (true != rst) {
Joe Perches292b1192011-07-20 08:51:35 -0700229 pr_err("===> %s #3 fail\n", __func__);
George666e8452011-02-19 16:29:27 -0600230 return rst;
231 }
232 }
233 /* Let last entry point to the start entry of ring buffer */
234 rst = rtl92c_llt_write(hw, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
235 if (true != rst) {
Joe Perches292b1192011-07-20 08:51:35 -0700236 pr_err("===> %s #4 fail\n", __func__);
George666e8452011-02-19 16:29:27 -0600237 return rst;
238 }
239 return rst;
240}
241void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
242 u8 *p_macaddr, bool is_group, u8 enc_algo,
243 bool is_wepkey, bool clear_all)
244{
245 struct rtl_priv *rtlpriv = rtl_priv(hw);
246 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
247 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
248 u8 *macaddr = p_macaddr;
249 u32 entry_id = 0;
250 bool is_pairwise = false;
251 static u8 cam_const_addr[4][6] = {
252 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
253 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
254 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
255 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
256 };
257 static u8 cam_const_broad[] = {
258 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
259 };
260
261 if (clear_all) {
262 u8 idx = 0;
263 u8 cam_offset = 0;
264 u8 clear_number = 5;
265
Joe Perchesf30d7502012-01-04 19:40:41 -0800266 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n");
George666e8452011-02-19 16:29:27 -0600267 for (idx = 0; idx < clear_number; idx++) {
268 rtl_cam_mark_invalid(hw, cam_offset + idx);
269 rtl_cam_empty_entry(hw, cam_offset + idx);
270 if (idx < 5) {
271 memset(rtlpriv->sec.key_buf[idx], 0,
272 MAX_KEY_LEN);
273 rtlpriv->sec.key_len[idx] = 0;
274 }
275 }
276 } else {
277 switch (enc_algo) {
278 case WEP40_ENCRYPTION:
279 enc_algo = CAM_WEP40;
280 break;
281 case WEP104_ENCRYPTION:
282 enc_algo = CAM_WEP104;
283 break;
284 case TKIP_ENCRYPTION:
285 enc_algo = CAM_TKIP;
286 break;
287 case AESCCMP_ENCRYPTION:
288 enc_algo = CAM_AES;
289 break;
290 default:
291 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800292 "illegal switch case\n");
George666e8452011-02-19 16:29:27 -0600293 enc_algo = CAM_TKIP;
294 break;
295 }
296 if (is_wepkey || rtlpriv->sec.use_defaultkey) {
297 macaddr = cam_const_addr[key_index];
298 entry_id = key_index;
299 } else {
300 if (is_group) {
301 macaddr = cam_const_broad;
302 entry_id = key_index;
303 } else {
304 key_index = PAIRWISE_KEYIDX;
305 entry_id = CAM_PAIRWISE_KEY_POSITION;
306 is_pairwise = true;
307 }
308 }
309 if (rtlpriv->sec.key_len[key_index] == 0) {
310 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800311 "delete one entry\n");
George666e8452011-02-19 16:29:27 -0600312 rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
313 } else {
314 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
Joe Perchesf30d7502012-01-04 19:40:41 -0800315 "The insert KEY length is %d\n",
316 rtlpriv->sec.key_len[PAIRWISE_KEYIDX]);
George666e8452011-02-19 16:29:27 -0600317 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
Joe Perchesf30d7502012-01-04 19:40:41 -0800318 "The insert KEY is %x %x\n",
319 rtlpriv->sec.key_buf[0][0],
320 rtlpriv->sec.key_buf[0][1]);
George666e8452011-02-19 16:29:27 -0600321 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800322 "add one entry\n");
George666e8452011-02-19 16:29:27 -0600323 if (is_pairwise) {
324 RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
Joe Perchesaf086872012-01-04 19:40:40 -0800325 "Pairwise Key content",
George666e8452011-02-19 16:29:27 -0600326 rtlpriv->sec.pairwise_key,
327 rtlpriv->sec.
328 key_len[PAIRWISE_KEYIDX]);
329 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800330 "set Pairwise key\n");
George666e8452011-02-19 16:29:27 -0600331
332 rtl_cam_add_one_entry(hw, macaddr, key_index,
333 entry_id, enc_algo,
334 CAM_CONFIG_NO_USEDK,
335 rtlpriv->sec.
336 key_buf[key_index]);
337 } else {
338 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800339 "set group key\n");
George666e8452011-02-19 16:29:27 -0600340 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
341 rtl_cam_add_one_entry(hw,
342 rtlefuse->dev_addr,
343 PAIRWISE_KEYIDX,
344 CAM_PAIRWISE_KEY_POSITION,
345 enc_algo,
346 CAM_CONFIG_NO_USEDK,
347 rtlpriv->sec.key_buf
348 [entry_id]);
349 }
350 rtl_cam_add_one_entry(hw, macaddr, key_index,
351 entry_id, enc_algo,
352 CAM_CONFIG_NO_USEDK,
353 rtlpriv->sec.key_buf[entry_id]);
354 }
355 }
356 }
357}
358
359u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw)
360{
361 struct rtl_priv *rtlpriv = rtl_priv(hw);
362
363 return rtl_read_dword(rtlpriv, REG_TXDMA_STATUS);
364}
365
366void rtl92c_enable_interrupt(struct ieee80211_hw *hw)
367{
368 struct rtl_priv *rtlpriv = rtl_priv(hw);
369 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
370 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
371 struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
372
373 if (IS_HARDWARE_TYPE_8192CE(rtlhal)) {
374 rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] &
375 0xFFFFFFFF);
376 rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] &
377 0xFFFFFFFF);
George666e8452011-02-19 16:29:27 -0600378 } else {
379 rtl_write_dword(rtlpriv, REG_HIMR, rtlusb->irq_mask[0] &
380 0xFFFFFFFF);
381 rtl_write_dword(rtlpriv, REG_HIMRE, rtlusb->irq_mask[1] &
382 0xFFFFFFFF);
George666e8452011-02-19 16:29:27 -0600383 }
384}
385
386void rtl92c_init_interrupt(struct ieee80211_hw *hw)
387{
388 rtl92c_enable_interrupt(hw);
389}
390
391void rtl92c_disable_interrupt(struct ieee80211_hw *hw)
392{
393 struct rtl_priv *rtlpriv = rtl_priv(hw);
George666e8452011-02-19 16:29:27 -0600394
395 rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
396 rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
George666e8452011-02-19 16:29:27 -0600397}
398
399void rtl92c_set_qos(struct ieee80211_hw *hw, int aci)
400{
401 struct rtl_priv *rtlpriv = rtl_priv(hw);
402 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
403 u32 u4b_ac_param;
404
405 rtl92c_dm_init_edca_turbo(hw);
406 u4b_ac_param = (u32) mac->ac[aci].aifs;
407 u4b_ac_param |=
408 ((u32) le16_to_cpu(mac->ac[aci].cw_min) & 0xF) <<
409 AC_PARAM_ECW_MIN_OFFSET;
410 u4b_ac_param |=
411 ((u32) le16_to_cpu(mac->ac[aci].cw_max) & 0xF) <<
412 AC_PARAM_ECW_MAX_OFFSET;
413 u4b_ac_param |= (u32) le16_to_cpu(mac->ac[aci].tx_op) <<
414 AC_PARAM_TXOP_OFFSET;
Joe Perchesf30d7502012-01-04 19:40:41 -0800415 RT_TRACE(rtlpriv, COMP_QOS, DBG_LOUD, "queue:%x, ac_param:%x\n",
416 aci, u4b_ac_param);
George666e8452011-02-19 16:29:27 -0600417 switch (aci) {
418 case AC1_BK:
419 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param);
420 break;
421 case AC0_BE:
422 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param);
423 break;
424 case AC2_VI:
425 rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, u4b_ac_param);
426 break;
427 case AC3_VO:
428 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, u4b_ac_param);
429 break;
430 default:
Joe Perches9d833ed2012-01-04 19:40:43 -0800431 RT_ASSERT(false, "invalid aci: %d !\n", aci);
George666e8452011-02-19 16:29:27 -0600432 break;
433 }
434}
435
436/*-------------------------------------------------------------------------
437 * HW MAC Address
438 *-------------------------------------------------------------------------*/
439void rtl92c_set_mac_addr(struct ieee80211_hw *hw, const u8 *addr)
440{
441 u32 i;
442 struct rtl_priv *rtlpriv = rtl_priv(hw);
443
444 for (i = 0 ; i < ETH_ALEN ; i++)
445 rtl_write_byte(rtlpriv, (REG_MACID + i), *(addr+i));
446
Joe Perchesf30d7502012-01-04 19:40:41 -0800447 RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
448 "MAC Address: %02X-%02X-%02X-%02X-%02X-%02X\n",
449 rtl_read_byte(rtlpriv, REG_MACID),
450 rtl_read_byte(rtlpriv, REG_MACID+1),
451 rtl_read_byte(rtlpriv, REG_MACID+2),
452 rtl_read_byte(rtlpriv, REG_MACID+3),
453 rtl_read_byte(rtlpriv, REG_MACID+4),
454 rtl_read_byte(rtlpriv, REG_MACID+5));
George666e8452011-02-19 16:29:27 -0600455}
456
457void rtl92c_init_driver_info_size(struct ieee80211_hw *hw, u8 size)
458{
459 struct rtl_priv *rtlpriv = rtl_priv(hw);
460 rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, size);
461}
462
463int rtl92c_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
464{
465 u8 value;
466 struct rtl_priv *rtlpriv = rtl_priv(hw);
467
468 switch (type) {
469 case NL80211_IFTYPE_UNSPECIFIED:
470 value = NT_NO_LINK;
471 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800472 "Set Network type to NO LINK!\n");
George666e8452011-02-19 16:29:27 -0600473 break;
474 case NL80211_IFTYPE_ADHOC:
475 value = NT_LINK_AD_HOC;
476 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800477 "Set Network type to Ad Hoc!\n");
George666e8452011-02-19 16:29:27 -0600478 break;
479 case NL80211_IFTYPE_STATION:
480 value = NT_LINK_AP;
481 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800482 "Set Network type to STA!\n");
George666e8452011-02-19 16:29:27 -0600483 break;
484 case NL80211_IFTYPE_AP:
485 value = NT_AS_AP;
486 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800487 "Set Network type to AP!\n");
George666e8452011-02-19 16:29:27 -0600488 break;
489 default:
490 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800491 "Network type %d not supported!\n", type);
George666e8452011-02-19 16:29:27 -0600492 return -EOPNOTSUPP;
493 }
494 rtl_write_byte(rtlpriv, (REG_CR + 2), value);
495 return 0;
496}
497
498void rtl92c_init_network_type(struct ieee80211_hw *hw)
499{
500 rtl92c_set_network_type(hw, NL80211_IFTYPE_UNSPECIFIED);
501}
502
503void rtl92c_init_adaptive_ctrl(struct ieee80211_hw *hw)
504{
505 u16 value16;
506 u32 value32;
507 struct rtl_priv *rtlpriv = rtl_priv(hw);
508
509 /* Response Rate Set */
510 value32 = rtl_read_dword(rtlpriv, REG_RRSR);
511 value32 &= ~RATE_BITMAP_ALL;
512 value32 |= RATE_RRSR_CCK_ONLY_1M;
513 rtl_write_dword(rtlpriv, REG_RRSR, value32);
514 /* SIFS (used in NAV) */
515 value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
516 rtl_write_word(rtlpriv, REG_SPEC_SIFS, value16);
517 /* Retry Limit */
518 value16 = _LRL(0x30) | _SRL(0x30);
519 rtl_write_dword(rtlpriv, REG_RL, value16);
520}
521
522void rtl92c_init_rate_fallback(struct ieee80211_hw *hw)
523{
524 struct rtl_priv *rtlpriv = rtl_priv(hw);
525
526 /* Set Data Auto Rate Fallback Retry Count register. */
527 rtl_write_dword(rtlpriv, REG_DARFRC, 0x00000000);
528 rtl_write_dword(rtlpriv, REG_DARFRC+4, 0x10080404);
529 rtl_write_dword(rtlpriv, REG_RARFRC, 0x04030201);
530 rtl_write_dword(rtlpriv, REG_RARFRC+4, 0x08070605);
531}
532
533static void rtl92c_set_cck_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
534 u8 ctx_sifs)
535{
536 struct rtl_priv *rtlpriv = rtl_priv(hw);
537
538 rtl_write_byte(rtlpriv, REG_SIFS_CCK, trx_sifs);
539 rtl_write_byte(rtlpriv, (REG_SIFS_CCK + 1), ctx_sifs);
540}
541
542static void rtl92c_set_ofdm_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
543 u8 ctx_sifs)
544{
545 struct rtl_priv *rtlpriv = rtl_priv(hw);
546
547 rtl_write_byte(rtlpriv, REG_SIFS_OFDM, trx_sifs);
548 rtl_write_byte(rtlpriv, (REG_SIFS_OFDM + 1), ctx_sifs);
549}
550
551void rtl92c_init_edca_param(struct ieee80211_hw *hw,
552 u16 queue, u16 txop, u8 cw_min, u8 cw_max, u8 aifs)
553{
554 /* sequence: VO, VI, BE, BK ==> the same as 92C hardware design.
555 * referenc : enum nl80211_txq_q or ieee80211_set_wmm_default function.
556 */
557 u32 value;
558 struct rtl_priv *rtlpriv = rtl_priv(hw);
559
560 value = (u32)aifs;
561 value |= ((u32)cw_min & 0xF) << 8;
562 value |= ((u32)cw_max & 0xF) << 12;
563 value |= (u32)txop << 16;
564 /* 92C hardware register sequence is the same as queue number. */
565 rtl_write_dword(rtlpriv, (REG_EDCA_VO_PARAM + (queue * 4)), value);
566}
567
568void rtl92c_init_edca(struct ieee80211_hw *hw)
569{
570 u16 value16;
571 struct rtl_priv *rtlpriv = rtl_priv(hw);
572
573 /* disable EDCCA count down, to reduce collison and retry */
574 value16 = rtl_read_word(rtlpriv, REG_RD_CTRL);
575 value16 |= DIS_EDCA_CNT_DWN;
576 rtl_write_word(rtlpriv, REG_RD_CTRL, value16);
577 /* Update SIFS timing. ??????????
578 * pHalData->SifsTime = 0x0e0e0a0a; */
579 rtl92c_set_cck_sifs(hw, 0xa, 0xa);
580 rtl92c_set_ofdm_sifs(hw, 0xe, 0xe);
581 /* Set CCK/OFDM SIFS to be 10us. */
582 rtl_write_word(rtlpriv, REG_SIFS_CCK, 0x0a0a);
583 rtl_write_word(rtlpriv, REG_SIFS_OFDM, 0x1010);
584 rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0204);
585 rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x014004);
586 /* TXOP */
587 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, 0x005EA42B);
588 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0x0000A44F);
589 rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x005EA324);
590 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x002FA226);
591 /* PIFS */
592 rtl_write_byte(rtlpriv, REG_PIFS, 0x1C);
593 /* AGGR BREAK TIME Register */
594 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
595 rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0040);
596 rtl_write_byte(rtlpriv, REG_BCNDMATIM, 0x02);
597 rtl_write_byte(rtlpriv, REG_ATIMWND, 0x02);
598}
599
600void rtl92c_init_ampdu_aggregation(struct ieee80211_hw *hw)
601{
602 struct rtl_priv *rtlpriv = rtl_priv(hw);
603
604 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x99997631);
605 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
606 /* init AMPDU aggregation number, tuning for Tx's TP, */
607 rtl_write_word(rtlpriv, 0x4CA, 0x0708);
608}
609
610void rtl92c_init_beacon_max_error(struct ieee80211_hw *hw, bool infra_mode)
611{
612 struct rtl_priv *rtlpriv = rtl_priv(hw);
613
614 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xFF);
615}
616
617void rtl92c_init_rdg_setting(struct ieee80211_hw *hw)
618{
619 struct rtl_priv *rtlpriv = rtl_priv(hw);
620
621 rtl_write_byte(rtlpriv, REG_RD_CTRL, 0xFF);
622 rtl_write_word(rtlpriv, REG_RD_NAV_NXT, 0x200);
623 rtl_write_byte(rtlpriv, REG_RD_RESP_PKT_TH, 0x05);
624}
625
626void rtl92c_init_retry_function(struct ieee80211_hw *hw)
627{
628 u8 value8;
629 struct rtl_priv *rtlpriv = rtl_priv(hw);
630
631 value8 = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL);
632 value8 |= EN_AMPDU_RTY_NEW;
633 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL, value8);
634 /* Set ACK timeout */
635 rtl_write_byte(rtlpriv, REG_ACKTO, 0x40);
636}
637
638void rtl92c_init_beacon_parameters(struct ieee80211_hw *hw,
639 enum version_8192c version)
640{
641 struct rtl_priv *rtlpriv = rtl_priv(hw);
642 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
643
644 rtl_write_word(rtlpriv, REG_TBTT_PROHIBIT, 0x6404);/* ms */
645 rtl_write_byte(rtlpriv, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*ms*/
646 rtl_write_byte(rtlpriv, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
647 if (IS_NORMAL_CHIP(rtlhal->version))
648 rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660F);
649 else
650 rtl_write_word(rtlpriv, REG_BCNTCFG, 0x66FF);
651}
652
653void rtl92c_disable_fast_edca(struct ieee80211_hw *hw)
654{
655 struct rtl_priv *rtlpriv = rtl_priv(hw);
656
657 rtl_write_word(rtlpriv, REG_FAST_EDCA_CTRL, 0);
658}
659
660void rtl92c_set_min_space(struct ieee80211_hw *hw, bool is2T)
661{
662 struct rtl_priv *rtlpriv = rtl_priv(hw);
663 u8 value = is2T ? MAX_MSS_DENSITY_2T : MAX_MSS_DENSITY_1T;
664
665 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, value);
666}
667
668u16 rtl92c_get_mgt_filter(struct ieee80211_hw *hw)
669{
670 struct rtl_priv *rtlpriv = rtl_priv(hw);
671
672 return rtl_read_word(rtlpriv, REG_RXFLTMAP0);
673}
674
675void rtl92c_set_mgt_filter(struct ieee80211_hw *hw, u16 filter)
676{
677 struct rtl_priv *rtlpriv = rtl_priv(hw);
678
679 rtl_write_word(rtlpriv, REG_RXFLTMAP0, filter);
680}
681
682u16 rtl92c_get_ctrl_filter(struct ieee80211_hw *hw)
683{
684 struct rtl_priv *rtlpriv = rtl_priv(hw);
685
686 return rtl_read_word(rtlpriv, REG_RXFLTMAP1);
687}
688
689void rtl92c_set_ctrl_filter(struct ieee80211_hw *hw, u16 filter)
690{
691 struct rtl_priv *rtlpriv = rtl_priv(hw);
692
693 rtl_write_word(rtlpriv, REG_RXFLTMAP1, filter);
694}
695
696u16 rtl92c_get_data_filter(struct ieee80211_hw *hw)
697{
698 struct rtl_priv *rtlpriv = rtl_priv(hw);
699
700 return rtl_read_word(rtlpriv, REG_RXFLTMAP2);
701}
702
703void rtl92c_set_data_filter(struct ieee80211_hw *hw, u16 filter)
704{
705 struct rtl_priv *rtlpriv = rtl_priv(hw);
706
707 rtl_write_word(rtlpriv, REG_RXFLTMAP2, filter);
708}
709/*==============================================================*/
710
711static u8 _rtl92c_query_rxpwrpercentage(char antpower)
712{
713 if ((antpower <= -100) || (antpower >= 20))
714 return 0;
715 else if (antpower >= 0)
716 return 100;
717 else
718 return 100 + antpower;
719}
720
721static u8 _rtl92c_evm_db_to_percentage(char value)
722{
723 char ret_val;
724
725 ret_val = value;
726 if (ret_val >= 0)
727 ret_val = 0;
728 if (ret_val <= -33)
729 ret_val = -33;
730 ret_val = 0 - ret_val;
731 ret_val *= 3;
732 if (ret_val == 99)
733 ret_val = 100;
734 return ret_val;
735}
736
737static long _rtl92c_translate_todbm(struct ieee80211_hw *hw,
738 u8 signal_strength_index)
739{
740 long signal_power;
741
742 signal_power = (long)((signal_strength_index + 1) >> 1);
743 signal_power -= 95;
744 return signal_power;
745}
746
747static long _rtl92c_signal_scale_mapping(struct ieee80211_hw *hw,
748 long currsig)
749{
750 long retsig;
751
752 if (currsig >= 61 && currsig <= 100)
753 retsig = 90 + ((currsig - 60) / 4);
754 else if (currsig >= 41 && currsig <= 60)
755 retsig = 78 + ((currsig - 40) / 2);
756 else if (currsig >= 31 && currsig <= 40)
757 retsig = 66 + (currsig - 30);
758 else if (currsig >= 21 && currsig <= 30)
759 retsig = 54 + (currsig - 20);
760 else if (currsig >= 5 && currsig <= 20)
761 retsig = 42 + (((currsig - 5) * 2) / 3);
762 else if (currsig == 4)
763 retsig = 36;
764 else if (currsig == 3)
765 retsig = 27;
766 else if (currsig == 2)
767 retsig = 18;
768 else if (currsig == 1)
769 retsig = 9;
770 else
771 retsig = currsig;
772 return retsig;
773}
774
775static void _rtl92c_query_rxphystatus(struct ieee80211_hw *hw,
776 struct rtl_stats *pstats,
777 struct rx_desc_92c *pdesc,
778 struct rx_fwinfo_92c *p_drvinfo,
779 bool packet_match_bssid,
780 bool packet_toself,
781 bool packet_beacon)
782{
783 struct rtl_priv *rtlpriv = rtl_priv(hw);
784 struct rtl_phy *rtlphy = &(rtlpriv->phy);
785 struct phy_sts_cck_8192s_t *cck_buf;
786 s8 rx_pwr_all = 0, rx_pwr[4];
787 u8 rf_rx_num = 0, evm, pwdb_all;
788 u8 i, max_spatial_stream;
789 u32 rssi, total_rssi = 0;
790 bool in_powersavemode = false;
791 bool is_cck_rate;
792
793 is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
794 pstats->packet_matchbssid = packet_match_bssid;
795 pstats->packet_toself = packet_toself;
796 pstats->is_cck = is_cck_rate;
797 pstats->packet_beacon = packet_beacon;
798 pstats->is_cck = is_cck_rate;
799 pstats->RX_SIGQ[0] = -1;
800 pstats->RX_SIGQ[1] = -1;
801 if (is_cck_rate) {
802 u8 report, cck_highpwr;
803 cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
804 if (!in_powersavemode)
805 cck_highpwr = rtlphy->cck_high_power;
806 else
807 cck_highpwr = false;
808 if (!cck_highpwr) {
809 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
810 report = cck_buf->cck_agc_rpt & 0xc0;
811 report = report >> 6;
812 switch (report) {
813 case 0x3:
814 rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
815 break;
816 case 0x2:
817 rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
818 break;
819 case 0x1:
820 rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
821 break;
822 case 0x0:
823 rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
824 break;
825 }
826 } else {
827 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
828 report = p_drvinfo->cfosho[0] & 0x60;
829 report = report >> 5;
830 switch (report) {
831 case 0x3:
832 rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
833 break;
834 case 0x2:
835 rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
836 break;
837 case 0x1:
838 rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
839 break;
840 case 0x0:
841 rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
842 break;
843 }
844 }
845 pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
846 pstats->rx_pwdb_all = pwdb_all;
847 pstats->recvsignalpower = rx_pwr_all;
848 if (packet_match_bssid) {
849 u8 sq;
850 if (pstats->rx_pwdb_all > 40)
851 sq = 100;
852 else {
853 sq = cck_buf->sq_rpt;
854 if (sq > 64)
855 sq = 0;
856 else if (sq < 20)
857 sq = 100;
858 else
859 sq = ((64 - sq) * 100) / 44;
860 }
861 pstats->signalquality = sq;
862 pstats->RX_SIGQ[0] = sq;
863 pstats->RX_SIGQ[1] = -1;
864 }
865 } else {
866 rtlpriv->dm.rfpath_rxenable[0] =
867 rtlpriv->dm.rfpath_rxenable[1] = true;
868 for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
869 if (rtlpriv->dm.rfpath_rxenable[i])
870 rf_rx_num++;
871 rx_pwr[i] =
872 ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
873 rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
874 total_rssi += rssi;
875 rtlpriv->stats.rx_snr_db[i] =
876 (long)(p_drvinfo->rxsnr[i] / 2);
877
878 if (packet_match_bssid)
879 pstats->rx_mimo_signalstrength[i] = (u8) rssi;
880 }
881 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
882 pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
883 pstats->rx_pwdb_all = pwdb_all;
884 pstats->rxpower = rx_pwr_all;
885 pstats->recvsignalpower = rx_pwr_all;
886 if (GET_RX_DESC_RX_MCS(pdesc) &&
Larry Finger2b67e882011-08-22 16:50:16 -0500887 GET_RX_DESC_RX_MCS(pdesc) >= DESC92_RATEMCS8 &&
888 GET_RX_DESC_RX_MCS(pdesc) <= DESC92_RATEMCS15)
George666e8452011-02-19 16:29:27 -0600889 max_spatial_stream = 2;
890 else
891 max_spatial_stream = 1;
892 for (i = 0; i < max_spatial_stream; i++) {
893 evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
894 if (packet_match_bssid) {
895 if (i == 0)
896 pstats->signalquality =
897 (u8) (evm & 0xff);
898 pstats->RX_SIGQ[i] =
899 (u8) (evm & 0xff);
900 }
901 }
902 }
903 if (is_cck_rate)
904 pstats->signalstrength =
905 (u8) (_rtl92c_signal_scale_mapping(hw, pwdb_all));
906 else if (rf_rx_num != 0)
907 pstats->signalstrength =
908 (u8) (_rtl92c_signal_scale_mapping
909 (hw, total_rssi /= rf_rx_num));
910}
911
912static void _rtl92c_process_ui_rssi(struct ieee80211_hw *hw,
913 struct rtl_stats *pstats)
914{
915 struct rtl_priv *rtlpriv = rtl_priv(hw);
916 struct rtl_phy *rtlphy = &(rtlpriv->phy);
917 u8 rfpath;
918 u32 last_rssi, tmpval;
919
920 if (pstats->packet_toself || pstats->packet_beacon) {
921 rtlpriv->stats.rssi_calculate_cnt++;
922 if (rtlpriv->stats.ui_rssi.total_num++ >=
923 PHY_RSSI_SLID_WIN_MAX) {
924 rtlpriv->stats.ui_rssi.total_num =
925 PHY_RSSI_SLID_WIN_MAX;
926 last_rssi =
927 rtlpriv->stats.ui_rssi.elements[rtlpriv->
928 stats.ui_rssi.index];
929 rtlpriv->stats.ui_rssi.total_val -= last_rssi;
930 }
931 rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
932 rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.
933 index++] = pstats->signalstrength;
934 if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
935 rtlpriv->stats.ui_rssi.index = 0;
936 tmpval = rtlpriv->stats.ui_rssi.total_val /
937 rtlpriv->stats.ui_rssi.total_num;
938 rtlpriv->stats.signal_strength =
939 _rtl92c_translate_todbm(hw, (u8) tmpval);
940 pstats->rssi = rtlpriv->stats.signal_strength;
941 }
942 if (!pstats->is_cck && pstats->packet_toself) {
943 for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
944 rfpath++) {
945 if (!rtl8192_phy_check_is_legal_rfpath(hw, rfpath))
946 continue;
947 if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
948 rtlpriv->stats.rx_rssi_percentage[rfpath] =
949 pstats->rx_mimo_signalstrength[rfpath];
950 }
951 if (pstats->rx_mimo_signalstrength[rfpath] >
952 rtlpriv->stats.rx_rssi_percentage[rfpath]) {
953 rtlpriv->stats.rx_rssi_percentage[rfpath] =
954 ((rtlpriv->stats.
955 rx_rssi_percentage[rfpath] *
956 (RX_SMOOTH_FACTOR - 1)) +
957 (pstats->rx_mimo_signalstrength[rfpath])) /
958 (RX_SMOOTH_FACTOR);
959
960 rtlpriv->stats.rx_rssi_percentage[rfpath] =
961 rtlpriv->stats.rx_rssi_percentage[rfpath] +
962 1;
963 } else {
964 rtlpriv->stats.rx_rssi_percentage[rfpath] =
965 ((rtlpriv->stats.
966 rx_rssi_percentage[rfpath] *
967 (RX_SMOOTH_FACTOR - 1)) +
968 (pstats->rx_mimo_signalstrength[rfpath])) /
969 (RX_SMOOTH_FACTOR);
970 }
971 }
972 }
973}
974
975static void _rtl92c_update_rxsignalstatistics(struct ieee80211_hw *hw,
976 struct rtl_stats *pstats)
977{
978 struct rtl_priv *rtlpriv = rtl_priv(hw);
979 int weighting = 0;
980
981 if (rtlpriv->stats.recv_signal_power == 0)
982 rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
983 if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
984 weighting = 5;
985 else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
986 weighting = (-5);
987 rtlpriv->stats.recv_signal_power =
988 (rtlpriv->stats.recv_signal_power * 5 +
989 pstats->recvsignalpower + weighting) / 6;
990}
991
992static void _rtl92c_process_pwdb(struct ieee80211_hw *hw,
993 struct rtl_stats *pstats)
994{
995 struct rtl_priv *rtlpriv = rtl_priv(hw);
996 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
997 long undecorated_smoothed_pwdb = 0;
998
999 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
1000 return;
1001 } else {
1002 undecorated_smoothed_pwdb =
1003 rtlpriv->dm.undecorated_smoothed_pwdb;
1004 }
1005 if (pstats->packet_toself || pstats->packet_beacon) {
1006 if (undecorated_smoothed_pwdb < 0)
1007 undecorated_smoothed_pwdb = pstats->rx_pwdb_all;
1008 if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) {
1009 undecorated_smoothed_pwdb =
1010 (((undecorated_smoothed_pwdb) *
1011 (RX_SMOOTH_FACTOR - 1)) +
1012 (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
1013 undecorated_smoothed_pwdb = undecorated_smoothed_pwdb
1014 + 1;
1015 } else {
1016 undecorated_smoothed_pwdb =
1017 (((undecorated_smoothed_pwdb) *
1018 (RX_SMOOTH_FACTOR - 1)) +
1019 (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
1020 }
1021 rtlpriv->dm.undecorated_smoothed_pwdb =
1022 undecorated_smoothed_pwdb;
1023 _rtl92c_update_rxsignalstatistics(hw, pstats);
1024 }
1025}
1026
1027static void _rtl92c_process_LINK_Q(struct ieee80211_hw *hw,
1028 struct rtl_stats *pstats)
1029{
1030 struct rtl_priv *rtlpriv = rtl_priv(hw);
1031 u32 last_evm = 0, n_stream, tmpval;
1032
1033 if (pstats->signalquality != 0) {
1034 if (pstats->packet_toself || pstats->packet_beacon) {
1035 if (rtlpriv->stats.LINK_Q.total_num++ >=
1036 PHY_LINKQUALITY_SLID_WIN_MAX) {
1037 rtlpriv->stats.LINK_Q.total_num =
1038 PHY_LINKQUALITY_SLID_WIN_MAX;
1039 last_evm =
1040 rtlpriv->stats.LINK_Q.elements
1041 [rtlpriv->stats.LINK_Q.index];
1042 rtlpriv->stats.LINK_Q.total_val -=
1043 last_evm;
1044 }
1045 rtlpriv->stats.LINK_Q.total_val +=
1046 pstats->signalquality;
1047 rtlpriv->stats.LINK_Q.elements
1048 [rtlpriv->stats.LINK_Q.index++] =
1049 pstats->signalquality;
1050 if (rtlpriv->stats.LINK_Q.index >=
1051 PHY_LINKQUALITY_SLID_WIN_MAX)
1052 rtlpriv->stats.LINK_Q.index = 0;
1053 tmpval = rtlpriv->stats.LINK_Q.total_val /
1054 rtlpriv->stats.LINK_Q.total_num;
1055 rtlpriv->stats.signal_quality = tmpval;
1056 rtlpriv->stats.last_sigstrength_inpercent = tmpval;
1057 for (n_stream = 0; n_stream < 2;
1058 n_stream++) {
1059 if (pstats->RX_SIGQ[n_stream] != -1) {
1060 if (!rtlpriv->stats.RX_EVM[n_stream]) {
1061 rtlpriv->stats.RX_EVM[n_stream]
1062 = pstats->RX_SIGQ[n_stream];
1063 }
1064 rtlpriv->stats.RX_EVM[n_stream] =
1065 ((rtlpriv->stats.RX_EVM
1066 [n_stream] *
1067 (RX_SMOOTH_FACTOR - 1)) +
1068 (pstats->RX_SIGQ
1069 [n_stream] * 1)) /
1070 (RX_SMOOTH_FACTOR);
1071 }
1072 }
1073 }
1074 } else {
1075 ;
1076 }
1077}
1078
1079static void _rtl92c_process_phyinfo(struct ieee80211_hw *hw,
1080 u8 *buffer,
1081 struct rtl_stats *pcurrent_stats)
1082{
1083 if (!pcurrent_stats->packet_matchbssid &&
1084 !pcurrent_stats->packet_beacon)
1085 return;
1086 _rtl92c_process_ui_rssi(hw, pcurrent_stats);
1087 _rtl92c_process_pwdb(hw, pcurrent_stats);
1088 _rtl92c_process_LINK_Q(hw, pcurrent_stats);
1089}
1090
1091void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw *hw,
1092 struct sk_buff *skb,
1093 struct rtl_stats *pstats,
1094 struct rx_desc_92c *pdesc,
1095 struct rx_fwinfo_92c *p_drvinfo)
1096{
1097 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1098 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
1099 struct ieee80211_hdr *hdr;
1100 u8 *tmp_buf;
1101 u8 *praddr;
George666e8452011-02-19 16:29:27 -06001102 __le16 fc;
1103 u16 type, cpu_fc;
1104 bool packet_matchbssid, packet_toself, packet_beacon;
1105
1106 tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
1107 hdr = (struct ieee80211_hdr *)tmp_buf;
1108 fc = hdr->frame_control;
1109 cpu_fc = le16_to_cpu(fc);
1110 type = WLAN_FC_GET_TYPE(fc);
1111 praddr = hdr->addr1;
George666e8452011-02-19 16:29:27 -06001112 packet_matchbssid =
1113 ((IEEE80211_FTYPE_CTL != type) &&
1114 (!compare_ether_addr(mac->bssid,
1115 (cpu_fc & IEEE80211_FCTL_TODS) ?
1116 hdr->addr1 : (cpu_fc & IEEE80211_FCTL_FROMDS) ?
1117 hdr->addr2 : hdr->addr3)) &&
1118 (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
1119
1120 packet_toself = packet_matchbssid &&
1121 (!compare_ether_addr(praddr, rtlefuse->dev_addr));
1122 if (ieee80211_is_beacon(fc))
1123 packet_beacon = true;
1124 _rtl92c_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
1125 packet_matchbssid, packet_toself,
1126 packet_beacon);
1127 _rtl92c_process_phyinfo(hw, tmp_buf, pstats);
1128}