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Hollis Blanchardbc8080c2009-01-03 16:23:10 -06001/*
2 * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
3 *
4 * Author: Yu Liu, <yu.liu@freescale.com>
5 *
6 * Description:
7 * This file is derived from arch/powerpc/kvm/44x_emulate.c,
8 * by Hollis Blanchard <hollisb@us.ibm.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 */
14
15#include <asm/kvm_ppc.h>
16#include <asm/disassemble.h>
17#include <asm/kvm_e500.h>
18
19#include "booke.h"
20#include "e500_tlb.h"
21
22#define XOP_TLBIVAX 786
23#define XOP_TLBSX 914
24#define XOP_TLBRE 946
25#define XOP_TLBWE 978
26
27int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
28 unsigned int inst, int *advance)
29{
30 int emulated = EMULATE_DONE;
31 int ra;
32 int rb;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -060033
34 switch (get_op(inst)) {
35 case 31:
36 switch (get_xop(inst)) {
37
38 case XOP_TLBRE:
39 emulated = kvmppc_e500_emul_tlbre(vcpu);
40 break;
41
42 case XOP_TLBWE:
43 emulated = kvmppc_e500_emul_tlbwe(vcpu);
44 break;
45
46 case XOP_TLBSX:
47 rb = get_rb(inst);
48 emulated = kvmppc_e500_emul_tlbsx(vcpu,rb);
49 break;
50
51 case XOP_TLBIVAX:
52 ra = get_ra(inst);
53 rb = get_rb(inst);
54 emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb);
55 break;
56
57 default:
58 emulated = EMULATE_FAIL;
59 }
60
61 break;
62
63 default:
64 emulated = EMULATE_FAIL;
65 }
66
67 if (emulated == EMULATE_FAIL)
68 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
69
70 return emulated;
71}
72
73int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
74{
75 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
76 int emulated = EMULATE_DONE;
Alexander Graf8e5b26b2010-01-08 02:58:01 +010077 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -060078
79 switch (sprn) {
80 case SPRN_PID:
81 vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
Alexander Graf8e5b26b2010-01-08 02:58:01 +010082 vcpu->arch.pid = spr_val;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -060083 break;
84 case SPRN_PID1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +010085 vcpu_e500->pid[1] = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -060086 case SPRN_PID2:
Alexander Graf8e5b26b2010-01-08 02:58:01 +010087 vcpu_e500->pid[2] = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -060088 case SPRN_MAS0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +010089 vcpu_e500->mas0 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -060090 case SPRN_MAS1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +010091 vcpu_e500->mas1 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -060092 case SPRN_MAS2:
Alexander Graf8e5b26b2010-01-08 02:58:01 +010093 vcpu_e500->mas2 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -060094 case SPRN_MAS3:
Alexander Graf8e5b26b2010-01-08 02:58:01 +010095 vcpu_e500->mas3 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -060096 case SPRN_MAS4:
Alexander Graf8e5b26b2010-01-08 02:58:01 +010097 vcpu_e500->mas4 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -060098 case SPRN_MAS6:
Alexander Graf8e5b26b2010-01-08 02:58:01 +010099 vcpu_e500->mas6 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600100 case SPRN_MAS7:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100101 vcpu_e500->mas7 = spr_val; break;
Liu Yud86be072010-01-22 18:50:29 +0800102 case SPRN_L1CSR0:
103 vcpu_e500->l1csr0 = spr_val;
104 vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
105 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600106 case SPRN_L1CSR1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100107 vcpu_e500->l1csr1 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600108 case SPRN_HID0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100109 vcpu_e500->hid0 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600110 case SPRN_HID1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100111 vcpu_e500->hid1 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600112
Liu Yub0a18352009-02-17 16:52:08 +0800113 case SPRN_MMUCSR0:
114 emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100115 spr_val);
Liu Yub0a18352009-02-17 16:52:08 +0800116 break;
117
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600118 /* extra exceptions */
119 case SPRN_IVOR32:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100120 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600121 break;
122 case SPRN_IVOR33:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100123 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600124 break;
125 case SPRN_IVOR34:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100126 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600127 break;
128 case SPRN_IVOR35:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100129 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600130 break;
131
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600132 default:
133 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
134 }
135
136 return emulated;
137}
138
139int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
140{
141 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
142 int emulated = EMULATE_DONE;
143
144 switch (sprn) {
145 case SPRN_PID:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100146 kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[0]); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600147 case SPRN_PID1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100148 kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[1]); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600149 case SPRN_PID2:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100150 kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[2]); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600151 case SPRN_MAS0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100152 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas0); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600153 case SPRN_MAS1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100154 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas1); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600155 case SPRN_MAS2:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100156 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas2); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600157 case SPRN_MAS3:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100158 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas3); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600159 case SPRN_MAS4:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100160 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas4); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600161 case SPRN_MAS6:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100162 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas6); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600163 case SPRN_MAS7:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100164 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas7); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600165
166 case SPRN_TLB0CFG:
Liu Yuda15bf42010-01-22 19:36:53 +0800167 kvmppc_set_gpr(vcpu, rt, vcpu_e500->tlb0cfg); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600168 case SPRN_TLB1CFG:
Liu Yuda15bf42010-01-22 19:36:53 +0800169 kvmppc_set_gpr(vcpu, rt, vcpu_e500->tlb1cfg); break;
Liu Yud86be072010-01-22 18:50:29 +0800170 case SPRN_L1CSR0:
171 kvmppc_set_gpr(vcpu, rt, vcpu_e500->l1csr0); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600172 case SPRN_L1CSR1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100173 kvmppc_set_gpr(vcpu, rt, vcpu_e500->l1csr1); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600174 case SPRN_HID0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100175 kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid0); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600176 case SPRN_HID1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100177 kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid1); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600178
Liu Yub0a18352009-02-17 16:52:08 +0800179 case SPRN_MMUCSR0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100180 kvmppc_set_gpr(vcpu, rt, 0); break;
Liu Yub0a18352009-02-17 16:52:08 +0800181
Liu Yu06579dd2009-06-05 14:54:31 +0800182 case SPRN_MMUCFG:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100183 kvmppc_set_gpr(vcpu, rt, mfspr(SPRN_MMUCFG)); break;
Liu Yu06579dd2009-06-05 14:54:31 +0800184
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600185 /* extra exceptions */
186 case SPRN_IVOR32:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100187 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]);
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600188 break;
189 case SPRN_IVOR33:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100190 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]);
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600191 break;
192 case SPRN_IVOR34:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100193 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]);
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600194 break;
195 case SPRN_IVOR35:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100196 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]);
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600197 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600198 default:
199 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
200 }
201
202 return emulated;
203}
204