| Mars Cheng | afc257b | 2015-07-14 14:58:12 +0800 | [diff] [blame] | 1 | +Mediatek 65xx/67xx/81xx sysirq |
| Yingjoe Chen | f4e27e3 | 2014-11-25 16:04:22 +0800 | [diff] [blame] | 2 | |
| 3 | Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI |
| 4 | interrupt. |
| 5 | |
| 6 | Required properties: |
| 7 | - compatible: should be one of: |
| Eddie Huang | 83af225 | 2015-12-01 10:14:00 +0100 | [diff] [blame] | 8 | "mediatek,mt8173-sysirq" |
| Yingjoe Chen | f4e27e3 | 2014-11-25 16:04:22 +0800 | [diff] [blame] | 9 | "mediatek,mt8135-sysirq" |
| 10 | "mediatek,mt8127-sysirq" |
| Mars Cheng | afc257b | 2015-07-14 14:58:12 +0800 | [diff] [blame] | 11 | "mediatek,mt6795-sysirq" |
| Howard Chen | 931ca3c | 2015-01-08 14:23:11 +0800 | [diff] [blame] | 12 | "mediatek,mt6592-sysirq" |
| Yingjoe Chen | f4e27e3 | 2014-11-25 16:04:22 +0800 | [diff] [blame] | 13 | "mediatek,mt6589-sysirq" |
| 14 | "mediatek,mt6582-sysirq" |
| Mars Cheng | 69a462b | 2015-07-14 14:07:08 +0800 | [diff] [blame] | 15 | "mediatek,mt6580-sysirq" |
| Yingjoe Chen | f4e27e3 | 2014-11-25 16:04:22 +0800 | [diff] [blame] | 16 | "mediatek,mt6577-sysirq" |
| 17 | - interrupt-controller : Identifies the node as an interrupt controller |
| 18 | - #interrupt-cells : Use the same format as specified by GIC in |
| 19 | Documentation/devicetree/bindings/arm/gic.txt |
| 20 | - interrupt-parent: phandle of irq parent for sysirq. The parent must |
| 21 | use the same interrupt-cells format as GIC. |
| 22 | - reg: Physical base address of the intpol registers and length of memory |
| 23 | mapped region. |
| 24 | |
| 25 | Example: |
| 26 | sysirq: interrupt-controller@10200100 { |
| 27 | compatible = "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq"; |
| 28 | interrupt-controller; |
| 29 | #interrupt-cells = <3>; |
| 30 | interrupt-parent = <&gic>; |
| 31 | reg = <0 0x10200100 0 0x1c>; |
| 32 | }; |