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Huang Shijiec7a8a112014-02-24 18:37:41 +08001* Freescale Quad Serial Peripheral Interface(QuadSPI)
2
3Required properties:
Frank Li151b49e2015-08-04 10:25:41 -05004 - compatible : Should be "fsl,vf610-qspi", "fsl,imx6sx-qspi",
Frank Licb94d0b2015-08-04 10:25:52 -05005 "fsl,imx7d-qspi", "fsl,imx6ul-qspi"
Huang Shijiec7a8a112014-02-24 18:37:41 +08006 - reg : the first contains the register location and length,
7 the second contains the memory mapping address and length
8 - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory"
9 - interrupts : Should contain the interrupt for the device
10 - clocks : The clocks needed by the QuadSPI controller
11 - clock-names : the name of the clocks
12
13Optional properties:
14 - fsl,qspi-has-second-chip: The controller has two buses, bus A and bus B.
15 Each bus can be connected with two NOR flashes.
16 Most of the time, each bus only has one NOR flash
17 connected, this is the default case.
18 But if there are two NOR flashes connected to the
19 bus, you should enable this property.
20 (Please check the board's schematic.)
21
22Example:
23
24qspi0: quadspi@40044000 {
25 compatible = "fsl,vf610-qspi";
26 reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
27 reg-names = "QuadSPI", "QuadSPI-memory";
28 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
29 clocks = <&clks VF610_CLK_QSPI0_EN>,
30 <&clks VF610_CLK_QSPI0>;
31 clock-names = "qspi_en", "qspi";
32
33 flash0: s25fl128s@0 {
34 ....
35 };
36};