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Laxminath Kasam7a721412016-11-02 20:02:00 +05301Qualcomm Technologies, Inc. LPI GPIO controller driver
2
3This DT bindings describes the GPIO controller driver
4being added for supporting LPI (Low Power Island) TLMM
5from QTI chipsets.
6
7Following properties are for LPI GPIO controller device main node.
8- compatible:
9 Usage: required
10 Value type: <string>
11 Definition: must be "qcom,lpi-pinctrl"
12
13- reg:
14 Usage: required
15 Value type: <prop-encoded-array>
16 Definition: Register base of the GPIO controller and length.
17
18- qcom,num-gpios:
19 Usage: required
20 Value type: <u32>
21 Definition: Number of GPIOs supported by the controller.
22
23- gpio-controller:
24 Usage: required
25 Value type: <none>
26 Definition: Used to mark the device node as a GPIO controller.
27
28- #gpio-cells:
29 Usage: required
30 Value type: <u32>
31 Definition: Must be 2;
32 The first cell will be used to define gpio number and the
33 second denotes the flags for this gpio.
34
35Please refer to ../gpio/gpio.txt for general description of GPIO bindings.
36
37Please refer to pinctrl-bindings.txt in this directory for details of the
38common pinctrl bindings used by client devices, including the meaning of the
39phrase "pin configuration node".
40
41The pin configuration nodes act as a container for an arbitrary number of
42subnodes. Each of these subnodes represents some desired configuration for a
43pin or a list of pins. This configuration can include the
44mux function to select on those pin(s), and various pin configuration
45parameters, as listed below.
46
47SUBNODES:
48
49The name of each subnode is not important; all subnodes should be enumerated
50and processed purely based on their content.
51
52Each subnode only affects those parameters that are explicitly listed. In
53other words, a subnode that lists a mux function but no pin configuration
54parameters implies no information about any pin configuration parameters.
55Similarly, a pin subnode that describes a pullup parameter implies no
56information about e.g. the mux function.
57
58The following generic properties as defined in pinctrl-bindings.txt are valid
59to specify in a pin configuration subnode:
60
61- pins:
62 Usage: required
63 Value type: <string-array>
64 Definition: List of gpio pins affected by the properties specified in
65 this subnode. Valid pins are: gpio0-gpio31 for LPI.
66
67- function:
68 Usage: required
69 Value type: <string>
70 Definition: Specify the alternative function to be configured for the
71 specified pins. Valid values are:
72 "gpio",
73 "func1",
74 "func2",
75 "func3",
76 "func4",
77 "func5"
78
79- bias-disable:
80 Usage: optional
81 Value type: <none>
82 Definition: The specified pins should be configured as no pull.
83
84- bias-pull-down:
85 Usage: optional
86 Value type: <none>
87 Definition: The specified pins should be configured as pull down.
88
89- bias-bus-hold:
90 Usage: optional
91 Value type: <none>
92 Definition: The specified pins should be configured as bus-keeper mode.
93
94- bias-pull-up:
95 Usage: optional
96 Value type: <empty>
97 Definition: The specified pins should be configured as pull up.
98
99- input-enable:
100 Usage: optional
101 Value type: <none>
102 Definition: The specified pins are put in input mode.
103
104- output-high:
105 Usage: optional
106 Value type: <none>
107 Definition: The specified pins are configured in output mode, driven
108 high.
109
110- output-low:
111 Usage: optional
112 Value type: <none>
113 Definition: The specified pins are configured in output mode, driven
114 low.
115
116- qcom,drive-strength:
117 Usage: optional
118 Value type: <u32>
119 Definition: Selects the drive strength for the specified pins.
120
121Example:
122
123 lpi_tlmm: lpi_pinctrl@152c000 {
124 compatible = "qcom,lpi-pinctrl";
125 qcom,num-gpios = <32>;
126 reg = <0x152c000 0>;
127 gpio-controller;
128 #gpio-cells = <2>;
129
130 hph_comp_active: hph_comp_active {
131 mux {
132 pins = "gpio22";
133 function = "func1";
134 };
135
136 config {
137 pins = "gpio22";
138 output-high;
139 qcom,drive-strength = <8>;
140 };
141 };
142
143 hph_comp_sleep: hph_comp_sleep {
144 mux {
145 pins = "gpio22";
146 function = "func1";
147 };
148
149 config {
150 pins = "gpio22";
151 qcom,drive-strength = <2>;
152 };
153 };
154 };