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Bjorn Andersson43059f62014-10-22 12:58:44 +03001Qualcomm PMIC GPIO block
2
3This binding describes the GPIO block(s) found in the 8xxx series of
4PMIC's from Qualcomm.
5
6- compatible:
7 Usage: required
8 Value type: <string>
9 Definition: must be one of:
10 "qcom,pm8018-gpio"
11 "qcom,pm8038-gpio"
12 "qcom,pm8058-gpio"
Ivan T. Ivanov7414b092015-03-31 12:37:18 +030013 "qcom,pm8916-gpio"
Bjorn Andersson43059f62014-10-22 12:58:44 +030014 "qcom,pm8917-gpio"
15 "qcom,pm8921-gpio"
16 "qcom,pm8941-gpio"
Stephen Boyd016c2f42015-11-17 16:52:32 -080017 "qcom,pm8994-gpio"
Bjorn Andersson43059f62014-10-22 12:58:44 +030018 "qcom,pma8084-gpio"
19
Stephen Boyd94fa6672016-07-11 12:01:09 -070020 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
21 if the device is on an spmi bus or an ssbi bus respectively
22
Bjorn Andersson43059f62014-10-22 12:58:44 +030023- reg:
24 Usage: required
25 Value type: <prop-encoded-array>
26 Definition: Register base of the GPIO block and length.
27
28- interrupts:
29 Usage: required
30 Value type: <prop-encoded-array>
31 Definition: Must contain an array of encoded interrupt specifiers for
32 each available GPIO
33
34- gpio-controller:
35 Usage: required
36 Value type: <none>
37 Definition: Mark the device node as a GPIO controller
38
39- #gpio-cells:
40 Usage: required
41 Value type: <u32>
42 Definition: Must be 2;
43 the first cell will be used to define gpio number and the
44 second denotes the flags for this gpio
45
Fenglin Wucf7a1932017-03-24 16:55:11 +080046- qcom,gpios-disallowed:
47 Usage: optional
48 Value type: <prop-encoded-array>
49 Definition: Array of the GPIO hardware numbers corresponding to GPIOs
50 which the APSS processor is not allowed to configure.
51 The hardware numbers are indexed from 1.
52 The interrupt resources for these GPIOs must not be defined
53 in "interrupts" and "interrupt-names" properties.
54 GPIOs defined in this array won't be registered as pins
55 in the pinctrl device or gpios in the gpio chip.
56
Bjorn Andersson43059f62014-10-22 12:58:44 +030057Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
58a general description of GPIO and interrupt bindings.
59
60Please refer to pinctrl-bindings.txt in this directory for details of the
61common pinctrl bindings used by client devices, including the meaning of the
62phrase "pin configuration node".
63
64The pin configuration nodes act as a container for an arbitrary number of
65subnodes. Each of these subnodes represents some desired configuration for a
66pin or a list of pins. This configuration can include the
67mux function to select on those pin(s), and various pin configuration
68parameters, as listed below.
69
70
71SUBNODES:
72
73The name of each subnode is not important; all subnodes should be enumerated
74and processed purely based on their content.
75
76Each subnode only affects those parameters that are explicitly listed. In
77other words, a subnode that lists a mux function but no pin configuration
78parameters implies no information about any pin configuration parameters.
79Similarly, a pin subnode that describes a pullup parameter implies no
80information about e.g. the mux function.
81
82The following generic properties as defined in pinctrl-bindings.txt are valid
83to specify in a pin configuration subnode:
84
85- pins:
86 Usage: required
87 Value type: <string-array>
88 Definition: List of gpio pins affected by the properties specified in
89 this subnode. Valid pins are:
90 gpio1-gpio6 for pm8018
91 gpio1-gpio12 for pm8038
92 gpio1-gpio40 for pm8058
Ivan T. Ivanov7414b092015-03-31 12:37:18 +030093 gpio1-gpio4 for pm8916
Bjorn Andersson43059f62014-10-22 12:58:44 +030094 gpio1-gpio38 for pm8917
95 gpio1-gpio44 for pm8921
96 gpio1-gpio36 for pm8941
Stephen Boyd016c2f42015-11-17 16:52:32 -080097 gpio1-gpio22 for pm8994
Bjorn Andersson43059f62014-10-22 12:58:44 +030098 gpio1-gpio22 for pma8084
99
100- function:
101 Usage: required
102 Value type: <string>
103 Definition: Specify the alternative function to be configured for the
104 specified pins. Valid values are:
Fenglin Wu60a05cb2016-07-21 14:32:24 +0800105 "normal",
106 "paired",
107 "func1",
108 "func2",
109 "dtest1",
110 "dtest2",
111 "dtest3",
112 "dtest4",
113 And following values are supported by LV/MV GPIO subtypes:
114 "func3",
115 "func4",
116 "analog"
Bjorn Andersson43059f62014-10-22 12:58:44 +0300117
118- bias-disable:
119 Usage: optional
120 Value type: <none>
121 Definition: The specified pins should be configured as no pull.
122
123- bias-pull-down:
124 Usage: optional
125 Value type: <none>
126 Definition: The specified pins should be configured as pull down.
127
128- bias-pull-up:
129 Usage: optional
130 Value type: <empty>
131 Definition: The specified pins should be configured as pull up.
132
133- qcom,pull-up-strength:
134 Usage: optional
135 Value type: <u32>
136 Definition: Specifies the strength to use for pull up, if selected.
137 Valid values are; as defined in
138 <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
139 1: 30uA (PMIC_GPIO_PULL_UP_30)
140 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5)
141 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5)
142 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30)
Eric Engestrom4e99a3b2016-04-25 01:24:17 +0100143 If this property is omitted 30uA strength will be used if
Bjorn Andersson43059f62014-10-22 12:58:44 +0300144 pull up is selected
145
146- bias-high-impedance:
147 Usage: optional
148 Value type: <none>
149 Definition: The specified pins will put in high-Z mode and disabled.
150
151- input-enable:
152 Usage: optional
153 Value type: <none>
154 Definition: The specified pins are put in input mode.
155
156- output-high:
157 Usage: optional
158 Value type: <none>
159 Definition: The specified pins are configured in output mode, driven
160 high.
161
162- output-low:
163 Usage: optional
164 Value type: <none>
165 Definition: The specified pins are configured in output mode, driven
166 low.
167
168- power-source:
169 Usage: optional
170 Value type: <u32>
171 Definition: Selects the power source for the specified pins. Valid
172 power sources are defined per chip in
173 <dt-bindings/pinctrl/qcom,pmic-gpio.h>
174
175- qcom,drive-strength:
176 Usage: optional
177 Value type: <u32>
178 Definition: Selects the drive strength for the specified pins. Value
179 drive strengths are:
180 0: no (PMIC_GPIO_STRENGTH_NO)
181 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
182 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
183 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
184 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
185
186- drive-push-pull:
187 Usage: optional
188 Value type: <none>
189 Definition: The specified pins are configured in push-pull mode.
190
191- drive-open-drain:
192 Usage: optional
193 Value type: <none>
194 Definition: The specified pins are configured in open-drain mode.
195
196- drive-open-source:
197 Usage: optional
198 Value type: <none>
199 Definition: The specified pins are configured in open-source mode.
200
Fenglin Wu60a05cb2016-07-21 14:32:24 +0800201- qcom,atest:
202 Usage: optional
203 Value type: <u32>
204 Definition: Selects ATEST rail to route to GPIO when it's configured
205 in analog-pass-through mode by specifying "analog" function.
206 Valid values are 0-3 corresponding to PMIC_GPIO_AOUT_ATESTx
207 defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>.
208
Fenglin Wuf6c0e702016-07-21 15:33:03 +0800209- qcom,dtest-buffer:
210 Usage: optional
211 Value type: <u32>
212 Definition: Selects DTEST rail to route to GPIO when it's configured
213 as a digital input.
214 For LV/MV GPIO subtypes, the valid values are 0-3
215 corresponding to PMIC_GPIO_DIN_DTESTx defined in
216 <dt-bindings/pinctrl/qcom,pmic-gpio.h>. Only one
217 DTEST rail can be selected at a time.
218 For 4CH/8CH GPIO subtypes, supported values are 1-15.
219 4 DTEST rails are supported in total and more than 1 DTEST
220 rail can be selected simultaneously. Each bit of the
221 4 LSBs represent one DTEST rail, such as [3:0] = 0101
222 means both DTEST1 and DTEST3 are selected.
223
Bjorn Andersson43059f62014-10-22 12:58:44 +0300224Example:
225
226 pm8921_gpio: gpio@150 {
Stephen Boyd94fa6672016-07-11 12:01:09 -0700227 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
Bjorn Andersson43059f62014-10-22 12:58:44 +0300228 reg = <0x150 0x160>;
229 interrupts = <192 1>, <193 1>, <194 1>,
230 <195 1>, <196 1>, <197 1>,
231 <198 1>, <199 1>, <200 1>,
232 <201 1>, <202 1>, <203 1>,
233 <204 1>, <205 1>, <206 1>,
234 <207 1>, <208 1>, <209 1>,
235 <210 1>, <211 1>, <212 1>,
236 <213 1>, <214 1>, <215 1>,
237 <216 1>, <217 1>, <218 1>,
238 <219 1>, <220 1>, <221 1>,
239 <222 1>, <223 1>, <224 1>,
240 <225 1>, <226 1>, <227 1>,
241 <228 1>, <229 1>, <230 1>,
242 <231 1>, <232 1>, <233 1>,
243 <234 1>, <235 1>;
244
245 gpio-controller;
246 #gpio-cells = <2>;
Fenglin Wucf7a1932017-03-24 16:55:11 +0800247 qcom,gpios-disallowed = <1 20>;
Bjorn Andersson43059f62014-10-22 12:58:44 +0300248
249 pm8921_gpio_keys: gpio-keys {
250 volume-keys {
251 pins = "gpio20", "gpio21";
252 function = "normal";
253
254 input-enable;
255 bias-pull-up;
256 drive-push-pull;
257 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
258 power-source = <PM8921_GPIO_S4>;
259 };
260 };
261 };