blob: b017f85e6d6a12598436f2b5279ce734ccee0597 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * sata_sil.c - Silicon Image SATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
Jeff Garzikaf36d7f2005-08-28 20:18:39 -04008 * Copyright 2003-2005 Red Hat, Inc.
Linus Torvalds1da177e2005-04-16 15:20:36 -07009 * Copyright 2003 Benjamin Herrenschmidt
10 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 *
Jeff Garzikaf36d7f2005-08-28 20:18:39 -040012 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
Linus Torvalds1da177e2005-04-16 15:20:36 -070029 *
Jeff Garzik953d1132005-08-26 19:46:24 -040030 * Documentation for SiI 3112:
31 * http://gkernel.sourceforge.net/specs/sii/3112A_SiI-DS-0095-B2.pdf.bz2
32 *
33 * Other errata and documentation available under NDA.
34 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070035 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/pci.h>
40#include <linux/init.h>
41#include <linux/blkdev.h>
42#include <linux/delay.h>
43#include <linux/interrupt.h>
Jeff Garzika9524a72005-10-30 14:39:11 -050044#include <linux/device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070045#include <scsi/scsi_host.h>
46#include <linux/libata.h>
47
48#define DRV_NAME "sata_sil"
49#define DRV_VERSION "0.9"
50
51enum {
Tejun Heoe4deec62005-08-23 07:27:25 +090052 SIL_FLAG_MOD15WRITE = (1 << 30),
53
Linus Torvalds1da177e2005-04-16 15:20:36 -070054 sil_3112 = 0,
Tejun Heoe4deec62005-08-23 07:27:25 +090055 sil_3112_m15w = 1,
56 sil_3114 = 2,
Linus Torvalds1da177e2005-04-16 15:20:36 -070057
58 SIL_FIFO_R0 = 0x40,
59 SIL_FIFO_W0 = 0x41,
60 SIL_FIFO_R1 = 0x44,
61 SIL_FIFO_W1 = 0x45,
62 SIL_FIFO_R2 = 0x240,
63 SIL_FIFO_W2 = 0x241,
64 SIL_FIFO_R3 = 0x244,
65 SIL_FIFO_W3 = 0x245,
66
67 SIL_SYSCFG = 0x48,
68 SIL_MASK_IDE0_INT = (1 << 22),
69 SIL_MASK_IDE1_INT = (1 << 23),
70 SIL_MASK_IDE2_INT = (1 << 24),
71 SIL_MASK_IDE3_INT = (1 << 25),
72 SIL_MASK_2PORT = SIL_MASK_IDE0_INT | SIL_MASK_IDE1_INT,
73 SIL_MASK_4PORT = SIL_MASK_2PORT |
74 SIL_MASK_IDE2_INT | SIL_MASK_IDE3_INT,
75
76 SIL_IDE2_BMDMA = 0x200,
77
78 SIL_INTR_STEERING = (1 << 1),
79 SIL_QUIRK_MOD15WRITE = (1 << 0),
80 SIL_QUIRK_UDMA5MAX = (1 << 1),
81};
82
83static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
84static void sil_dev_config(struct ata_port *ap, struct ata_device *dev);
85static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg);
86static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
87static void sil_post_set_mode (struct ata_port *ap);
88
Jeff Garzik374b1872005-08-30 05:42:52 -040089
Jeff Garzik3b7d6972005-11-10 11:04:11 -050090static const struct pci_device_id sil_pci_tbl[] = {
Tejun Heoe4deec62005-08-23 07:27:25 +090091 { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
92 { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
Linus Torvalds1da177e2005-04-16 15:20:36 -070093 { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
94 { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 },
Tejun Heoe4deec62005-08-23 07:27:25 +090095 { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
96 { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
97 { 0x1002, 0x437a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
Linus Torvalds1da177e2005-04-16 15:20:36 -070098 { } /* terminate list */
99};
100
101
102/* TODO firmware versions should be added - eric */
103static const struct sil_drivelist {
104 const char * product;
105 unsigned int quirk;
106} sil_blacklist [] = {
107 { "ST320012AS", SIL_QUIRK_MOD15WRITE },
108 { "ST330013AS", SIL_QUIRK_MOD15WRITE },
109 { "ST340017AS", SIL_QUIRK_MOD15WRITE },
110 { "ST360015AS", SIL_QUIRK_MOD15WRITE },
111 { "ST380013AS", SIL_QUIRK_MOD15WRITE },
112 { "ST380023AS", SIL_QUIRK_MOD15WRITE },
113 { "ST3120023AS", SIL_QUIRK_MOD15WRITE },
114 { "ST3160023AS", SIL_QUIRK_MOD15WRITE },
115 { "ST3120026AS", SIL_QUIRK_MOD15WRITE },
116 { "ST3200822AS", SIL_QUIRK_MOD15WRITE },
117 { "ST340014ASL", SIL_QUIRK_MOD15WRITE },
118 { "ST360014ASL", SIL_QUIRK_MOD15WRITE },
119 { "ST380011ASL", SIL_QUIRK_MOD15WRITE },
120 { "ST3120022ASL", SIL_QUIRK_MOD15WRITE },
121 { "ST3160021ASL", SIL_QUIRK_MOD15WRITE },
122 { "Maxtor 4D060H3", SIL_QUIRK_UDMA5MAX },
123 { }
124};
125
126static struct pci_driver sil_pci_driver = {
127 .name = DRV_NAME,
128 .id_table = sil_pci_tbl,
129 .probe = sil_init_one,
130 .remove = ata_pci_remove_one,
131};
132
Jeff Garzik193515d2005-11-07 00:59:37 -0500133static struct scsi_host_template sil_sht = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134 .module = THIS_MODULE,
135 .name = DRV_NAME,
136 .ioctl = ata_scsi_ioctl,
137 .queuecommand = ata_scsi_queuecmd,
138 .eh_strategy_handler = ata_scsi_error,
139 .can_queue = ATA_DEF_QUEUE,
140 .this_id = ATA_SHT_THIS_ID,
141 .sg_tablesize = LIBATA_MAX_PRD,
142 .max_sectors = ATA_MAX_SECTORS,
143 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
144 .emulated = ATA_SHT_EMULATED,
145 .use_clustering = ATA_SHT_USE_CLUSTERING,
146 .proc_name = DRV_NAME,
147 .dma_boundary = ATA_DMA_BOUNDARY,
148 .slave_configure = ata_scsi_slave_config,
149 .bios_param = ata_std_bios_param,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150};
151
Jeff Garzik057ace52005-10-22 14:27:05 -0400152static const struct ata_port_operations sil_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 .port_disable = ata_port_disable,
154 .dev_config = sil_dev_config,
155 .tf_load = ata_tf_load,
156 .tf_read = ata_tf_read,
157 .check_status = ata_check_status,
158 .exec_command = ata_exec_command,
159 .dev_select = ata_std_dev_select,
160 .phy_reset = sata_phy_reset,
161 .post_set_mode = sil_post_set_mode,
162 .bmdma_setup = ata_bmdma_setup,
163 .bmdma_start = ata_bmdma_start,
164 .bmdma_stop = ata_bmdma_stop,
165 .bmdma_status = ata_bmdma_status,
166 .qc_prep = ata_qc_prep,
167 .qc_issue = ata_qc_issue_prot,
168 .eng_timeout = ata_eng_timeout,
169 .irq_handler = ata_interrupt,
170 .irq_clear = ata_bmdma_irq_clear,
171 .scr_read = sil_scr_read,
172 .scr_write = sil_scr_write,
173 .port_start = ata_port_start,
174 .port_stop = ata_port_stop,
Jeff Garzik374b1872005-08-30 05:42:52 -0400175 .host_stop = ata_pci_host_stop,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176};
177
Arjan van de Ven98ac62d2005-11-28 10:06:23 +0100178static const struct ata_port_info sil_port_info[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179 /* sil_3112 */
180 {
181 .sht = &sil_sht,
182 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
183 ATA_FLAG_SRST | ATA_FLAG_MMIO,
184 .pio_mask = 0x1f, /* pio0-4 */
185 .mwdma_mask = 0x07, /* mwdma0-2 */
186 .udma_mask = 0x3f, /* udma0-5 */
187 .port_ops = &sil_ops,
Tejun Heoe4deec62005-08-23 07:27:25 +0900188 }, /* sil_3112_15w - keep it sync'd w/ sil_3112 */
189 {
190 .sht = &sil_sht,
191 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
192 ATA_FLAG_SRST | ATA_FLAG_MMIO |
193 SIL_FLAG_MOD15WRITE,
194 .pio_mask = 0x1f, /* pio0-4 */
195 .mwdma_mask = 0x07, /* mwdma0-2 */
196 .udma_mask = 0x3f, /* udma0-5 */
197 .port_ops = &sil_ops,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198 }, /* sil_3114 */
199 {
200 .sht = &sil_sht,
201 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
202 ATA_FLAG_SRST | ATA_FLAG_MMIO,
203 .pio_mask = 0x1f, /* pio0-4 */
204 .mwdma_mask = 0x07, /* mwdma0-2 */
205 .udma_mask = 0x3f, /* udma0-5 */
206 .port_ops = &sil_ops,
207 },
208};
209
210/* per-port register offsets */
211/* TODO: we can probably calculate rather than use a table */
212static const struct {
213 unsigned long tf; /* ATA taskfile register block */
214 unsigned long ctl; /* ATA control/altstatus register block */
215 unsigned long bmdma; /* DMA register block */
216 unsigned long scr; /* SATA control register block */
217 unsigned long sien; /* SATA Interrupt Enable register */
218 unsigned long xfer_mode;/* data transfer mode register */
219} sil_port[] = {
220 /* port 0 ... */
221 { 0x80, 0x8A, 0x00, 0x100, 0x148, 0xb4 },
222 { 0xC0, 0xCA, 0x08, 0x180, 0x1c8, 0xf4 },
223 { 0x280, 0x28A, 0x200, 0x300, 0x348, 0x2b4 },
224 { 0x2C0, 0x2CA, 0x208, 0x380, 0x3c8, 0x2f4 },
225 /* ... port 3 */
226};
227
228MODULE_AUTHOR("Jeff Garzik");
229MODULE_DESCRIPTION("low-level driver for Silicon Image SATA controller");
230MODULE_LICENSE("GPL");
231MODULE_DEVICE_TABLE(pci, sil_pci_tbl);
232MODULE_VERSION(DRV_VERSION);
233
Jeff Garzik374b1872005-08-30 05:42:52 -0400234
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235static unsigned char sil_get_device_cache_line(struct pci_dev *pdev)
236{
237 u8 cache_line = 0;
238 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line);
239 return cache_line;
240}
241
242static void sil_post_set_mode (struct ata_port *ap)
243{
244 struct ata_host_set *host_set = ap->host_set;
245 struct ata_device *dev;
Jeff Garzikea6ba102005-08-30 05:18:18 -0400246 void __iomem *addr =
247 host_set->mmio_base + sil_port[ap->port_no].xfer_mode;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248 u32 tmp, dev_mode[2];
249 unsigned int i;
250
251 for (i = 0; i < 2; i++) {
252 dev = &ap->device[i];
253 if (!ata_dev_present(dev))
254 dev_mode[i] = 0; /* PIO0/1/2 */
255 else if (dev->flags & ATA_DFLAG_PIO)
256 dev_mode[i] = 1; /* PIO3/4 */
257 else
258 dev_mode[i] = 3; /* UDMA */
259 /* value 2 indicates MDMA */
260 }
261
262 tmp = readl(addr);
263 tmp &= ~((1<<5) | (1<<4) | (1<<1) | (1<<0));
264 tmp |= dev_mode[0];
265 tmp |= (dev_mode[1] << 4);
266 writel(tmp, addr);
267 readl(addr); /* flush */
268}
269
270static inline unsigned long sil_scr_addr(struct ata_port *ap, unsigned int sc_reg)
271{
272 unsigned long offset = ap->ioaddr.scr_addr;
273
274 switch (sc_reg) {
275 case SCR_STATUS:
276 return offset + 4;
277 case SCR_ERROR:
278 return offset + 8;
279 case SCR_CONTROL:
280 return offset;
281 default:
282 /* do nothing */
283 break;
284 }
285
286 return 0;
287}
288
289static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg)
290{
Al Viro9aa36e82005-10-21 06:46:02 +0100291 void __iomem *mmio = (void __iomem *) sil_scr_addr(ap, sc_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292 if (mmio)
293 return readl(mmio);
294 return 0xffffffffU;
295}
296
297static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
298{
Al Viro9aa36e82005-10-21 06:46:02 +0100299 void *mmio = (void __iomem *) sil_scr_addr(ap, sc_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700300 if (mmio)
301 writel(val, mmio);
302}
303
304/**
305 * sil_dev_config - Apply device/host-specific errata fixups
306 * @ap: Port containing device to be examined
307 * @dev: Device to be examined
308 *
309 * After the IDENTIFY [PACKET] DEVICE step is complete, and a
310 * device is known to be present, this function is called.
311 * We apply two errata fixups which are specific to Silicon Image,
312 * a Seagate and a Maxtor fixup.
313 *
314 * For certain Seagate devices, we must limit the maximum sectors
315 * to under 8K.
316 *
317 * For certain Maxtor devices, we must not program the drive
318 * beyond udma5.
319 *
320 * Both fixups are unfairly pessimistic. As soon as I get more
321 * information on these errata, I will create a more exhaustive
322 * list, and apply the fixups to only the specific
323 * devices/hosts/firmwares that need it.
324 *
325 * 20040111 - Seagate drives affected by the Mod15Write bug are blacklisted
326 * The Maxtor quirk is in the blacklist, but I'm keeping the original
327 * pessimistic fix for the following reasons...
328 * - There seems to be less info on it, only one device gleaned off the
329 * Windows driver, maybe only one is affected. More info would be greatly
330 * appreciated.
331 * - But then again UDMA5 is hardly anything to complain about
332 */
333static void sil_dev_config(struct ata_port *ap, struct ata_device *dev)
334{
335 unsigned int n, quirks = 0;
336 unsigned char model_num[40];
337 const char *s;
338 unsigned int len;
339
340 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
341 sizeof(model_num));
342 s = &model_num[0];
343 len = strnlen(s, sizeof(model_num));
344
345 /* ATAPI specifies that empty space is blank-filled; remove blanks */
346 while ((len > 0) && (s[len - 1] == ' '))
347 len--;
348
Jeff Garzik8a60a072005-07-31 13:13:24 -0400349 for (n = 0; sil_blacklist[n].product; n++)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700350 if (!memcmp(sil_blacklist[n].product, s,
351 strlen(sil_blacklist[n].product))) {
352 quirks = sil_blacklist[n].quirk;
353 break;
354 }
Jeff Garzik8a60a072005-07-31 13:13:24 -0400355
Linus Torvalds1da177e2005-04-16 15:20:36 -0700356 /* limit requests to 15 sectors */
Tejun Heoe4deec62005-08-23 07:27:25 +0900357 if ((ap->flags & SIL_FLAG_MOD15WRITE) && (quirks & SIL_QUIRK_MOD15WRITE)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358 printk(KERN_INFO "ata%u(%u): applying Seagate errata fix\n",
359 ap->id, dev->devno);
360 ap->host->max_sectors = 15;
361 ap->host->hostt->max_sectors = 15;
362 dev->flags |= ATA_DFLAG_LOCK_SECTORS;
363 return;
364 }
365
366 /* limit to udma5 */
367 if (quirks & SIL_QUIRK_UDMA5MAX) {
368 printk(KERN_INFO "ata%u(%u): applying Maxtor errata fix %s\n",
369 ap->id, dev->devno, s);
370 ap->udma_mask &= ATA_UDMA5;
371 return;
372 }
373}
374
375static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
376{
377 static int printed_version;
378 struct ata_probe_ent *probe_ent = NULL;
379 unsigned long base;
Jeff Garzikea6ba102005-08-30 05:18:18 -0400380 void __iomem *mmio_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700381 int rc;
382 unsigned int i;
383 int pci_dev_busy = 0;
384 u32 tmp, irq_mask;
385 u8 cls;
386
387 if (!printed_version++)
Jeff Garzika9524a72005-10-30 14:39:11 -0500388 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700389
390 /*
391 * If this driver happens to only be useful on Apple's K2, then
392 * we should check that here as it has a normal Serverworks ID
393 */
394 rc = pci_enable_device(pdev);
395 if (rc)
396 return rc;
397
398 rc = pci_request_regions(pdev, DRV_NAME);
399 if (rc) {
400 pci_dev_busy = 1;
401 goto err_out;
402 }
403
404 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
405 if (rc)
406 goto err_out_regions;
407 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
408 if (rc)
409 goto err_out_regions;
410
411 probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL);
412 if (probe_ent == NULL) {
413 rc = -ENOMEM;
414 goto err_out_regions;
415 }
416
417 memset(probe_ent, 0, sizeof(*probe_ent));
418 INIT_LIST_HEAD(&probe_ent->node);
419 probe_ent->dev = pci_dev_to_dev(pdev);
420 probe_ent->port_ops = sil_port_info[ent->driver_data].port_ops;
421 probe_ent->sht = sil_port_info[ent->driver_data].sht;
422 probe_ent->n_ports = (ent->driver_data == sil_3114) ? 4 : 2;
423 probe_ent->pio_mask = sil_port_info[ent->driver_data].pio_mask;
424 probe_ent->mwdma_mask = sil_port_info[ent->driver_data].mwdma_mask;
425 probe_ent->udma_mask = sil_port_info[ent->driver_data].udma_mask;
426 probe_ent->irq = pdev->irq;
427 probe_ent->irq_flags = SA_SHIRQ;
428 probe_ent->host_flags = sil_port_info[ent->driver_data].host_flags;
429
Jeff Garzik374b1872005-08-30 05:42:52 -0400430 mmio_base = pci_iomap(pdev, 5, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431 if (mmio_base == NULL) {
432 rc = -ENOMEM;
433 goto err_out_free_ent;
434 }
435
436 probe_ent->mmio_base = mmio_base;
437
438 base = (unsigned long) mmio_base;
439
440 for (i = 0; i < probe_ent->n_ports; i++) {
441 probe_ent->port[i].cmd_addr = base + sil_port[i].tf;
442 probe_ent->port[i].altstatus_addr =
443 probe_ent->port[i].ctl_addr = base + sil_port[i].ctl;
444 probe_ent->port[i].bmdma_addr = base + sil_port[i].bmdma;
445 probe_ent->port[i].scr_addr = base + sil_port[i].scr;
446 ata_std_ports(&probe_ent->port[i]);
447 }
448
449 /* Initialize FIFO PCI bus arbitration */
450 cls = sil_get_device_cache_line(pdev);
451 if (cls) {
452 cls >>= 3;
453 cls++; /* cls = (line_size/8)+1 */
454 writeb(cls, mmio_base + SIL_FIFO_R0);
455 writeb(cls, mmio_base + SIL_FIFO_W0);
456 writeb(cls, mmio_base + SIL_FIFO_R1);
Jens Axboee1dd23a2005-06-08 13:02:25 +0200457 writeb(cls, mmio_base + SIL_FIFO_W1);
458 if (ent->driver_data == sil_3114) {
459 writeb(cls, mmio_base + SIL_FIFO_R2);
460 writeb(cls, mmio_base + SIL_FIFO_W2);
461 writeb(cls, mmio_base + SIL_FIFO_R3);
462 writeb(cls, mmio_base + SIL_FIFO_W3);
463 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700464 } else
Jeff Garzika9524a72005-10-30 14:39:11 -0500465 dev_printk(KERN_WARNING, &pdev->dev,
466 "cache line size not set. Driver may not function\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700467
468 if (ent->driver_data == sil_3114) {
469 irq_mask = SIL_MASK_4PORT;
470
471 /* flip the magic "make 4 ports work" bit */
472 tmp = readl(mmio_base + SIL_IDE2_BMDMA);
473 if ((tmp & SIL_INTR_STEERING) == 0)
474 writel(tmp | SIL_INTR_STEERING,
475 mmio_base + SIL_IDE2_BMDMA);
476
477 } else {
478 irq_mask = SIL_MASK_2PORT;
479 }
480
481 /* make sure IDE0/1/2/3 interrupts are not masked */
482 tmp = readl(mmio_base + SIL_SYSCFG);
483 if (tmp & irq_mask) {
484 tmp &= ~irq_mask;
485 writel(tmp, mmio_base + SIL_SYSCFG);
486 readl(mmio_base + SIL_SYSCFG); /* flush */
487 }
488
489 /* mask all SATA phy-related interrupts */
490 /* TODO: unmask bit 6 (SError N bit) for hotplug */
491 for (i = 0; i < probe_ent->n_ports; i++)
492 writel(0, mmio_base + sil_port[i].sien);
493
494 pci_set_master(pdev);
495
496 /* FIXME: check ata_device_add return value */
497 ata_device_add(probe_ent);
498 kfree(probe_ent);
499
500 return 0;
501
502err_out_free_ent:
503 kfree(probe_ent);
504err_out_regions:
505 pci_release_regions(pdev);
506err_out:
507 if (!pci_dev_busy)
508 pci_disable_device(pdev);
509 return rc;
510}
511
512static int __init sil_init(void)
513{
514 return pci_module_init(&sil_pci_driver);
515}
516
517static void __exit sil_exit(void)
518{
519 pci_unregister_driver(&sil_pci_driver);
520}
521
522
523module_init(sil_init);
524module_exit(sil_exit);