blob: 93ee307b2d9bb5080141a0c3f8d259dbcf4ebeef [file] [log] [blame]
Caesar Wangcbac8f632014-11-24 12:58:59 +08001/*
2 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/interrupt.h>
17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_address.h>
21#include <linux/of_irq.h>
22#include <linux/platform_device.h>
23#include <linux/reset.h>
24#include <linux/thermal.h>
25
26/**
27 * If the temperature over a period of time High,
28 * the resulting TSHUT gave CRU module,let it reset the entire chip,
29 * or via GPIO give PMIC.
30 */
31enum tshut_mode {
32 TSHUT_MODE_CRU = 0,
33 TSHUT_MODE_GPIO,
34};
35
36/**
37 * the system Temperature Sensors tshut(tshut) polarity
38 * the bit 8 is tshut polarity.
39 * 0: low active, 1: high active
40 */
41enum tshut_polarity {
42 TSHUT_LOW_ACTIVE = 0,
43 TSHUT_HIGH_ACTIVE,
44};
45
46/**
47 * The system has three Temperature Sensors. channel 0 is reserved,
48 * channel 1 is for CPU, and channel 2 is for GPU.
49 */
50enum sensor_id {
51 SENSOR_CPU = 1,
52 SENSOR_GPU,
53};
54
55struct rockchip_tsadc_chip {
56 /* The hardware-controlled tshut property */
57 long tshut_temp;
58 enum tshut_mode tshut_mode;
59 enum tshut_polarity tshut_polarity;
60
61 /* Chip-wide methods */
62 void (*initialize)(void __iomem *reg, enum tshut_polarity p);
63 void (*irq_ack)(void __iomem *reg);
64 void (*control)(void __iomem *reg, bool on);
65
66 /* Per-sensor methods */
Sascha Hauer17e83512015-07-24 08:12:54 +020067 int (*get_temp)(int chn, void __iomem *reg, int *temp);
Caesar Wangcbac8f632014-11-24 12:58:59 +080068 void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
69 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
70};
71
72struct rockchip_thermal_sensor {
73 struct rockchip_thermal_data *thermal;
74 struct thermal_zone_device *tzd;
75 enum sensor_id id;
76};
77
78#define NUM_SENSORS 2 /* Ignore unused sensor 0 */
79
80struct rockchip_thermal_data {
81 const struct rockchip_tsadc_chip *chip;
82 struct platform_device *pdev;
83 struct reset_control *reset;
84
85 struct rockchip_thermal_sensor sensors[NUM_SENSORS];
86
87 struct clk *clk;
88 struct clk *pclk;
89
90 void __iomem *regs;
91
92 long tshut_temp;
93 enum tshut_mode tshut_mode;
94 enum tshut_polarity tshut_polarity;
95};
96
97/* TSADC V2 Sensor info define: */
98#define TSADCV2_AUTO_CON 0x04
99#define TSADCV2_INT_EN 0x08
100#define TSADCV2_INT_PD 0x0c
101#define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
102#define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
103#define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
104#define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
105#define TSADCV2_AUTO_PERIOD 0x68
106#define TSADCV2_AUTO_PERIOD_HT 0x6c
107
108#define TSADCV2_AUTO_EN BIT(0)
109#define TSADCV2_AUTO_DISABLE ~BIT(0)
110#define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
111#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
112#define TSADCV2_AUTO_TSHUT_POLARITY_LOW ~BIT(8)
113
114#define TSADCV2_INT_SRC_EN(chn) BIT(chn)
115#define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
116#define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
117
118#define TSADCV2_INT_PD_CLEAR ~BIT(8)
119
120#define TSADCV2_DATA_MASK 0xfff
121#define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
122#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
123#define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
124#define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
125
126struct tsadc_table {
Dmitry Torokhovd9a241c2015-08-07 13:59:23 -0700127 u32 code;
Caesar Wangcbac8f632014-11-24 12:58:59 +0800128 long temp;
129};
130
131static const struct tsadc_table v2_code_table[] = {
132 {TSADCV2_DATA_MASK, -40000},
133 {3800, -40000},
134 {3792, -35000},
135 {3783, -30000},
136 {3774, -25000},
137 {3765, -20000},
138 {3756, -15000},
139 {3747, -10000},
140 {3737, -5000},
141 {3728, 0},
142 {3718, 5000},
143 {3708, 10000},
144 {3698, 15000},
145 {3688, 20000},
146 {3678, 25000},
147 {3667, 30000},
148 {3656, 35000},
149 {3645, 40000},
150 {3634, 45000},
151 {3623, 50000},
152 {3611, 55000},
153 {3600, 60000},
154 {3588, 65000},
155 {3575, 70000},
156 {3563, 75000},
157 {3550, 80000},
158 {3537, 85000},
159 {3524, 90000},
160 {3510, 95000},
161 {3496, 100000},
162 {3482, 105000},
163 {3467, 110000},
164 {3452, 115000},
165 {3437, 120000},
166 {3421, 125000},
Caesar Wangcbac8f632014-11-24 12:58:59 +0800167};
168
169static u32 rk_tsadcv2_temp_to_code(long temp)
170{
171 int high, low, mid;
172
173 low = 0;
174 high = ARRAY_SIZE(v2_code_table) - 1;
175 mid = (high + low) / 2;
176
177 if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
178 return 0;
179
180 while (low <= high) {
181 if (temp == v2_code_table[mid].temp)
182 return v2_code_table[mid].code;
183 else if (temp < v2_code_table[mid].temp)
184 high = mid - 1;
185 else
186 low = mid + 1;
187 mid = (low + high) / 2;
188 }
189
190 return 0;
191}
192
Dmitry Torokhovd9a241c2015-08-07 13:59:23 -0700193static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800194{
Dmitry Torokhovd9a241c2015-08-07 13:59:23 -0700195 unsigned int low = 1;
Caesar Wang1e9a1ae2015-01-25 10:11:11 +0800196 unsigned int high = ARRAY_SIZE(v2_code_table) - 1;
197 unsigned int mid = (low + high) / 2;
198 unsigned int num;
199 unsigned long denom;
Caesar Wangcbac8f632014-11-24 12:58:59 +0800200
Dmitry Torokhovd9a241c2015-08-07 13:59:23 -0700201 BUILD_BUG_ON(ARRAY_SIZE(v2_code_table) < 2);
Caesar Wangcbac8f632014-11-24 12:58:59 +0800202
Dmitry Torokhovd9a241c2015-08-07 13:59:23 -0700203 code &= TSADCV2_DATA_MASK;
204 if (code < v2_code_table[high].code)
205 return -EAGAIN; /* Incorrect reading */
206
207 while (low <= high) {
Caesar Wang1e9a1ae2015-01-25 10:11:11 +0800208 if (code >= v2_code_table[mid].code &&
209 code < v2_code_table[mid - 1].code)
210 break;
Caesar Wangcbac8f632014-11-24 12:58:59 +0800211 else if (code < v2_code_table[mid].code)
212 low = mid + 1;
213 else
214 high = mid - 1;
215 mid = (low + high) / 2;
216 }
217
Caesar Wang1e9a1ae2015-01-25 10:11:11 +0800218 /*
219 * The 5C granularity provided by the table is too much. Let's
220 * assume that the relationship between sensor readings and
221 * temperature between 2 table entries is linear and interpolate
222 * to produce less granular result.
223 */
224 num = v2_code_table[mid].temp - v2_code_table[mid - 1].temp;
225 num *= v2_code_table[mid - 1].code - code;
226 denom = v2_code_table[mid - 1].code - v2_code_table[mid].code;
Dmitry Torokhovd9a241c2015-08-07 13:59:23 -0700227 *temp = v2_code_table[mid - 1].temp + (num / denom);
228
229 return 0;
Caesar Wangcbac8f632014-11-24 12:58:59 +0800230}
231
232/**
233 * rk_tsadcv2_initialize - initialize TASDC Controller
234 * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
235 * every two accessing of TSADC in normal operation.
236 * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
237 * every two accessing of TSADC after the temperature is higher
238 * than COM_SHUT or COM_INT.
239 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
240 * if the temperature is higher than COMP_INT or COMP_SHUT for
241 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
242 */
243static void rk_tsadcv2_initialize(void __iomem *regs,
244 enum tshut_polarity tshut_polarity)
245{
246 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
247 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
248 regs + TSADCV2_AUTO_CON);
249 else
250 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_LOW),
251 regs + TSADCV2_AUTO_CON);
252
253 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
254 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
255 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
256 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
257 regs + TSADCV2_AUTO_PERIOD_HT);
258 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
259 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
260}
261
262static void rk_tsadcv2_irq_ack(void __iomem *regs)
263{
264 u32 val;
265
266 val = readl_relaxed(regs + TSADCV2_INT_PD);
267 writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
268}
269
270static void rk_tsadcv2_control(void __iomem *regs, bool enable)
271{
272 u32 val;
273
274 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
275 if (enable)
276 val |= TSADCV2_AUTO_EN;
277 else
278 val &= ~TSADCV2_AUTO_EN;
279
280 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
281}
282
Sascha Hauer17e83512015-07-24 08:12:54 +0200283static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, int *temp)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800284{
285 u32 val;
286
Caesar Wangcbac8f632014-11-24 12:58:59 +0800287 val = readl_relaxed(regs + TSADCV2_DATA(chn));
Caesar Wangcbac8f632014-11-24 12:58:59 +0800288
Dmitry Torokhovd9a241c2015-08-07 13:59:23 -0700289 return rk_tsadcv2_code_to_temp(val, temp);
Caesar Wangcbac8f632014-11-24 12:58:59 +0800290}
291
292static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
293{
294 u32 tshut_value, val;
295
296 tshut_value = rk_tsadcv2_temp_to_code(temp);
297 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
298
299 /* TSHUT will be valid */
300 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
301 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
302}
303
304static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
305 enum tshut_mode mode)
306{
307 u32 val;
308
309 val = readl_relaxed(regs + TSADCV2_INT_EN);
310 if (mode == TSHUT_MODE_GPIO) {
311 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
312 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
313 } else {
314 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
315 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
316 }
317
318 writel_relaxed(val, regs + TSADCV2_INT_EN);
319}
320
321static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
322 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
323 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
324 .tshut_temp = 95000,
325
326 .initialize = rk_tsadcv2_initialize,
327 .irq_ack = rk_tsadcv2_irq_ack,
328 .control = rk_tsadcv2_control,
329 .get_temp = rk_tsadcv2_get_temp,
330 .set_tshut_temp = rk_tsadcv2_tshut_temp,
331 .set_tshut_mode = rk_tsadcv2_tshut_mode,
332};
333
334static const struct of_device_id of_rockchip_thermal_match[] = {
335 {
336 .compatible = "rockchip,rk3288-tsadc",
337 .data = (void *)&rk3288_tsadc_data,
338 },
339 { /* end */ },
340};
341MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
342
343static void
344rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
345{
346 struct thermal_zone_device *tzd = sensor->tzd;
347
348 tzd->ops->set_mode(tzd,
349 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
350}
351
352static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
353{
354 struct rockchip_thermal_data *thermal = dev;
355 int i;
356
357 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
358
359 thermal->chip->irq_ack(thermal->regs);
360
361 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
362 thermal_zone_device_update(thermal->sensors[i].tzd);
363
364 return IRQ_HANDLED;
365}
366
Sascha Hauer17e83512015-07-24 08:12:54 +0200367static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
Caesar Wangcbac8f632014-11-24 12:58:59 +0800368{
369 struct rockchip_thermal_sensor *sensor = _sensor;
370 struct rockchip_thermal_data *thermal = sensor->thermal;
371 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
372 int retval;
373
374 retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
Sascha Hauer17e83512015-07-24 08:12:54 +0200375 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
Caesar Wangcbac8f632014-11-24 12:58:59 +0800376 sensor->id, *out_temp, retval);
377
378 return retval;
379}
380
381static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
382 .get_temp = rockchip_thermal_get_temp,
383};
384
385static int rockchip_configure_from_dt(struct device *dev,
386 struct device_node *np,
387 struct rockchip_thermal_data *thermal)
388{
389 u32 shut_temp, tshut_mode, tshut_polarity;
390
391 if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
392 dev_warn(dev,
393 "Missing tshut temp property, using default %ld\n",
394 thermal->chip->tshut_temp);
395 thermal->tshut_temp = thermal->chip->tshut_temp;
396 } else {
397 thermal->tshut_temp = shut_temp;
398 }
399
400 if (thermal->tshut_temp > INT_MAX) {
401 dev_err(dev, "Invalid tshut temperature specified: %ld\n",
402 thermal->tshut_temp);
403 return -ERANGE;
404 }
405
406 if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
407 dev_warn(dev,
408 "Missing tshut mode property, using default (%s)\n",
409 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
410 "gpio" : "cru");
411 thermal->tshut_mode = thermal->chip->tshut_mode;
412 } else {
413 thermal->tshut_mode = tshut_mode;
414 }
415
416 if (thermal->tshut_mode > 1) {
417 dev_err(dev, "Invalid tshut mode specified: %d\n",
418 thermal->tshut_mode);
419 return -EINVAL;
420 }
421
422 if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
423 &tshut_polarity)) {
424 dev_warn(dev,
425 "Missing tshut-polarity property, using default (%s)\n",
426 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
427 "low" : "high");
428 thermal->tshut_polarity = thermal->chip->tshut_polarity;
429 } else {
430 thermal->tshut_polarity = tshut_polarity;
431 }
432
433 if (thermal->tshut_polarity > 1) {
434 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
435 thermal->tshut_polarity);
436 return -EINVAL;
437 }
438
439 return 0;
440}
441
442static int
443rockchip_thermal_register_sensor(struct platform_device *pdev,
444 struct rockchip_thermal_data *thermal,
445 struct rockchip_thermal_sensor *sensor,
446 enum sensor_id id)
447{
448 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
449 int error;
450
451 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
452 tsadc->set_tshut_temp(id, thermal->regs, thermal->tshut_temp);
453
454 sensor->thermal = thermal;
455 sensor->id = id;
456 sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
457 &rockchip_of_thermal_ops);
458 if (IS_ERR(sensor->tzd)) {
459 error = PTR_ERR(sensor->tzd);
460 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
461 id, error);
462 return error;
463 }
464
465 return 0;
466}
467
468/*
469 * Reset TSADC Controller, reset all tsadc registers.
470 */
471static void rockchip_thermal_reset_controller(struct reset_control *reset)
472{
473 reset_control_assert(reset);
474 usleep_range(10, 20);
475 reset_control_deassert(reset);
476}
477
478static int rockchip_thermal_probe(struct platform_device *pdev)
479{
480 struct device_node *np = pdev->dev.of_node;
481 struct rockchip_thermal_data *thermal;
482 const struct of_device_id *match;
483 struct resource *res;
484 int irq;
485 int i;
486 int error;
487
488 match = of_match_node(of_rockchip_thermal_match, np);
489 if (!match)
490 return -ENXIO;
491
492 irq = platform_get_irq(pdev, 0);
493 if (irq < 0) {
494 dev_err(&pdev->dev, "no irq resource?\n");
495 return -EINVAL;
496 }
497
498 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
499 GFP_KERNEL);
500 if (!thermal)
501 return -ENOMEM;
502
503 thermal->pdev = pdev;
504
505 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
506 if (!thermal->chip)
507 return -EINVAL;
508
509 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
510 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
511 if (IS_ERR(thermal->regs))
512 return PTR_ERR(thermal->regs);
513
514 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
515 if (IS_ERR(thermal->reset)) {
516 error = PTR_ERR(thermal->reset);
517 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
518 return error;
519 }
520
521 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
522 if (IS_ERR(thermal->clk)) {
523 error = PTR_ERR(thermal->clk);
524 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
525 return error;
526 }
527
528 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
529 if (IS_ERR(thermal->pclk)) {
Dan Carpenter0d0a2bf2015-04-21 12:34:10 +0300530 error = PTR_ERR(thermal->pclk);
Caesar Wangcbac8f632014-11-24 12:58:59 +0800531 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
532 error);
533 return error;
534 }
535
536 error = clk_prepare_enable(thermal->clk);
537 if (error) {
538 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
539 error);
540 return error;
541 }
542
543 error = clk_prepare_enable(thermal->pclk);
544 if (error) {
545 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
546 goto err_disable_clk;
547 }
548
549 rockchip_thermal_reset_controller(thermal->reset);
550
551 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
552 if (error) {
553 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
554 error);
555 goto err_disable_pclk;
556 }
557
558 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
559
560 error = rockchip_thermal_register_sensor(pdev, thermal,
561 &thermal->sensors[0],
562 SENSOR_CPU);
563 if (error) {
564 dev_err(&pdev->dev,
565 "failed to register CPU thermal sensor: %d\n", error);
566 goto err_disable_pclk;
567 }
568
569 error = rockchip_thermal_register_sensor(pdev, thermal,
570 &thermal->sensors[1],
571 SENSOR_GPU);
572 if (error) {
573 dev_err(&pdev->dev,
574 "failed to register GPU thermal sensor: %d\n", error);
575 goto err_unregister_cpu_sensor;
576 }
577
578 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
579 &rockchip_thermal_alarm_irq_thread,
580 IRQF_ONESHOT,
581 "rockchip_thermal", thermal);
582 if (error) {
583 dev_err(&pdev->dev,
584 "failed to request tsadc irq: %d\n", error);
585 goto err_unregister_gpu_sensor;
586 }
587
588 thermal->chip->control(thermal->regs, true);
589
590 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
591 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
592
593 platform_set_drvdata(pdev, thermal);
594
595 return 0;
596
597err_unregister_gpu_sensor:
598 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
599err_unregister_cpu_sensor:
600 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
601err_disable_pclk:
602 clk_disable_unprepare(thermal->pclk);
603err_disable_clk:
604 clk_disable_unprepare(thermal->clk);
605
606 return error;
607}
608
609static int rockchip_thermal_remove(struct platform_device *pdev)
610{
611 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
612 int i;
613
614 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
615 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
616
617 rockchip_thermal_toggle_sensor(sensor, false);
618 thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
619 }
620
621 thermal->chip->control(thermal->regs, false);
622
623 clk_disable_unprepare(thermal->pclk);
624 clk_disable_unprepare(thermal->clk);
625
626 return 0;
627}
628
629static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
630{
631 struct platform_device *pdev = to_platform_device(dev);
632 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
633 int i;
634
635 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
636 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
637
638 thermal->chip->control(thermal->regs, false);
639
640 clk_disable(thermal->pclk);
641 clk_disable(thermal->clk);
642
643 return 0;
644}
645
646static int __maybe_unused rockchip_thermal_resume(struct device *dev)
647{
648 struct platform_device *pdev = to_platform_device(dev);
649 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
650 int i;
651 int error;
652
653 error = clk_enable(thermal->clk);
654 if (error)
655 return error;
656
657 error = clk_enable(thermal->pclk);
658 if (error)
659 return error;
660
661 rockchip_thermal_reset_controller(thermal->reset);
662
663 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
664
665 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
666 enum sensor_id id = thermal->sensors[i].id;
667
668 thermal->chip->set_tshut_mode(id, thermal->regs,
669 thermal->tshut_mode);
670 thermal->chip->set_tshut_temp(id, thermal->regs,
671 thermal->tshut_temp);
672 }
673
674 thermal->chip->control(thermal->regs, true);
675
676 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
677 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
678
679 return 0;
680}
681
682static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
683 rockchip_thermal_suspend, rockchip_thermal_resume);
684
685static struct platform_driver rockchip_thermal_driver = {
686 .driver = {
687 .name = "rockchip-thermal",
Caesar Wangcbac8f632014-11-24 12:58:59 +0800688 .pm = &rockchip_thermal_pm_ops,
689 .of_match_table = of_rockchip_thermal_match,
690 },
691 .probe = rockchip_thermal_probe,
692 .remove = rockchip_thermal_remove,
693};
694
695module_platform_driver(rockchip_thermal_driver);
696
697MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
698MODULE_AUTHOR("Rockchip, Inc.");
699MODULE_LICENSE("GPL v2");
700MODULE_ALIAS("platform:rockchip-thermal");