Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Microchip ENC28J60 ethernet driver (MAC + PHY) |
| 3 | * |
| 4 | * Copyright (C) 2007 Eurek srl |
| 5 | * Author: Claudio Lanconelli <lanconelli.claudio@eptar.com> |
| 6 | * based on enc28j60.c written by David Anders for 2.4 kernel version |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * $Id: enc28j60.c,v 1.22 2007/12/20 10:47:01 claudio Exp $ |
| 14 | */ |
| 15 | |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/types.h> |
| 19 | #include <linux/fcntl.h> |
| 20 | #include <linux/interrupt.h> |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 21 | #include <linux/string.h> |
| 22 | #include <linux/errno.h> |
| 23 | #include <linux/init.h> |
| 24 | #include <linux/netdevice.h> |
| 25 | #include <linux/etherdevice.h> |
| 26 | #include <linux/ethtool.h> |
| 27 | #include <linux/tcp.h> |
| 28 | #include <linux/skbuff.h> |
| 29 | #include <linux/delay.h> |
| 30 | #include <linux/spi/spi.h> |
| 31 | |
| 32 | #include "enc28j60_hw.h" |
| 33 | |
| 34 | #define DRV_NAME "enc28j60" |
| 35 | #define DRV_VERSION "1.01" |
| 36 | |
| 37 | #define SPI_OPLEN 1 |
| 38 | |
| 39 | #define ENC28J60_MSG_DEFAULT \ |
| 40 | (NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN | NETIF_MSG_LINK) |
| 41 | |
| 42 | /* Buffer size required for the largest SPI transfer (i.e., reading a |
| 43 | * frame). */ |
| 44 | #define SPI_TRANSFER_BUF_LEN (4 + MAX_FRAMELEN) |
| 45 | |
| 46 | #define TX_TIMEOUT (4 * HZ) |
| 47 | |
| 48 | /* Max TX retries in case of collision as suggested by errata datasheet */ |
| 49 | #define MAX_TX_RETRYCOUNT 16 |
| 50 | |
| 51 | enum { |
| 52 | RXFILTER_NORMAL, |
| 53 | RXFILTER_MULTI, |
| 54 | RXFILTER_PROMISC |
| 55 | }; |
| 56 | |
| 57 | /* Driver local data */ |
| 58 | struct enc28j60_net { |
| 59 | struct net_device *netdev; |
| 60 | struct spi_device *spi; |
| 61 | struct mutex lock; |
| 62 | struct sk_buff *tx_skb; |
| 63 | struct work_struct tx_work; |
| 64 | struct work_struct irq_work; |
| 65 | struct work_struct setrx_work; |
| 66 | struct work_struct restart_work; |
| 67 | u8 bank; /* current register bank selected */ |
| 68 | u16 next_pk_ptr; /* next packet pointer within FIFO */ |
| 69 | u16 max_pk_counter; /* statistics: max packet counter */ |
| 70 | u16 tx_retry_count; |
| 71 | bool hw_enable; |
| 72 | bool full_duplex; |
| 73 | int rxfilter; |
| 74 | u32 msg_enable; |
| 75 | u8 spi_transfer_buf[SPI_TRANSFER_BUF_LEN]; |
| 76 | }; |
| 77 | |
| 78 | /* use ethtool to change the level for any given device */ |
| 79 | static struct { |
| 80 | u32 msg_enable; |
| 81 | } debug = { -1 }; |
| 82 | |
| 83 | /* |
| 84 | * SPI read buffer |
| 85 | * wait for the SPI transfer and copy received data to destination |
| 86 | */ |
| 87 | static int |
| 88 | spi_read_buf(struct enc28j60_net *priv, int len, u8 *data) |
| 89 | { |
| 90 | u8 *rx_buf = priv->spi_transfer_buf + 4; |
| 91 | u8 *tx_buf = priv->spi_transfer_buf; |
| 92 | struct spi_transfer t = { |
| 93 | .tx_buf = tx_buf, |
| 94 | .rx_buf = rx_buf, |
| 95 | .len = SPI_OPLEN + len, |
| 96 | }; |
| 97 | struct spi_message msg; |
| 98 | int ret; |
| 99 | |
| 100 | tx_buf[0] = ENC28J60_READ_BUF_MEM; |
| 101 | tx_buf[1] = tx_buf[2] = tx_buf[3] = 0; /* don't care */ |
| 102 | |
| 103 | spi_message_init(&msg); |
| 104 | spi_message_add_tail(&t, &msg); |
| 105 | ret = spi_sync(priv->spi, &msg); |
| 106 | if (ret == 0) { |
| 107 | memcpy(data, &rx_buf[SPI_OPLEN], len); |
| 108 | ret = msg.status; |
| 109 | } |
| 110 | if (ret && netif_msg_drv(priv)) |
| 111 | printk(KERN_DEBUG DRV_NAME ": %s() failed: ret = %d\n", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 112 | __func__, ret); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 113 | |
| 114 | return ret; |
| 115 | } |
| 116 | |
| 117 | /* |
| 118 | * SPI write buffer |
| 119 | */ |
| 120 | static int spi_write_buf(struct enc28j60_net *priv, int len, |
| 121 | const u8 *data) |
| 122 | { |
| 123 | int ret; |
| 124 | |
| 125 | if (len > SPI_TRANSFER_BUF_LEN - 1 || len <= 0) |
| 126 | ret = -EINVAL; |
| 127 | else { |
| 128 | priv->spi_transfer_buf[0] = ENC28J60_WRITE_BUF_MEM; |
| 129 | memcpy(&priv->spi_transfer_buf[1], data, len); |
| 130 | ret = spi_write(priv->spi, priv->spi_transfer_buf, len + 1); |
| 131 | if (ret && netif_msg_drv(priv)) |
| 132 | printk(KERN_DEBUG DRV_NAME ": %s() failed: ret = %d\n", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 133 | __func__, ret); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 134 | } |
| 135 | return ret; |
| 136 | } |
| 137 | |
| 138 | /* |
| 139 | * basic SPI read operation |
| 140 | */ |
| 141 | static u8 spi_read_op(struct enc28j60_net *priv, u8 op, |
| 142 | u8 addr) |
| 143 | { |
| 144 | u8 tx_buf[2]; |
| 145 | u8 rx_buf[4]; |
| 146 | u8 val = 0; |
| 147 | int ret; |
| 148 | int slen = SPI_OPLEN; |
| 149 | |
| 150 | /* do dummy read if needed */ |
| 151 | if (addr & SPRD_MASK) |
| 152 | slen++; |
| 153 | |
| 154 | tx_buf[0] = op | (addr & ADDR_MASK); |
| 155 | ret = spi_write_then_read(priv->spi, tx_buf, 1, rx_buf, slen); |
| 156 | if (ret) |
| 157 | printk(KERN_DEBUG DRV_NAME ": %s() failed: ret = %d\n", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 158 | __func__, ret); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 159 | else |
| 160 | val = rx_buf[slen - 1]; |
| 161 | |
| 162 | return val; |
| 163 | } |
| 164 | |
| 165 | /* |
| 166 | * basic SPI write operation |
| 167 | */ |
| 168 | static int spi_write_op(struct enc28j60_net *priv, u8 op, |
| 169 | u8 addr, u8 val) |
| 170 | { |
| 171 | int ret; |
| 172 | |
| 173 | priv->spi_transfer_buf[0] = op | (addr & ADDR_MASK); |
| 174 | priv->spi_transfer_buf[1] = val; |
| 175 | ret = spi_write(priv->spi, priv->spi_transfer_buf, 2); |
| 176 | if (ret && netif_msg_drv(priv)) |
| 177 | printk(KERN_DEBUG DRV_NAME ": %s() failed: ret = %d\n", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 178 | __func__, ret); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 179 | return ret; |
| 180 | } |
| 181 | |
| 182 | static void enc28j60_soft_reset(struct enc28j60_net *priv) |
| 183 | { |
| 184 | if (netif_msg_hw(priv)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 185 | printk(KERN_DEBUG DRV_NAME ": %s() enter\n", __func__); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 186 | |
| 187 | spi_write_op(priv, ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET); |
| 188 | /* Errata workaround #1, CLKRDY check is unreliable, |
| 189 | * delay at least 1 mS instead */ |
| 190 | udelay(2000); |
| 191 | } |
| 192 | |
| 193 | /* |
| 194 | * select the current register bank if necessary |
| 195 | */ |
| 196 | static void enc28j60_set_bank(struct enc28j60_net *priv, u8 addr) |
| 197 | { |
Baruch Siach | 5664dd5 | 2008-12-18 19:39:14 -0800 | [diff] [blame] | 198 | u8 b = (addr & BANK_MASK) >> 5; |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 199 | |
Baruch Siach | 5664dd5 | 2008-12-18 19:39:14 -0800 | [diff] [blame] | 200 | /* These registers (EIE, EIR, ESTAT, ECON2, ECON1) |
| 201 | * are present in all banks, no need to switch bank |
| 202 | */ |
| 203 | if (addr >= EIE && addr <= ECON1) |
| 204 | return; |
| 205 | |
| 206 | /* Clear or set each bank selection bit as needed */ |
| 207 | if ((b & ECON1_BSEL0) != (priv->bank & ECON1_BSEL0)) { |
| 208 | if (b & ECON1_BSEL0) |
| 209 | spi_write_op(priv, ENC28J60_BIT_FIELD_SET, ECON1, |
| 210 | ECON1_BSEL0); |
| 211 | else |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 212 | spi_write_op(priv, ENC28J60_BIT_FIELD_CLR, ECON1, |
Baruch Siach | 5664dd5 | 2008-12-18 19:39:14 -0800 | [diff] [blame] | 213 | ECON1_BSEL0); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 214 | } |
Baruch Siach | 5664dd5 | 2008-12-18 19:39:14 -0800 | [diff] [blame] | 215 | if ((b & ECON1_BSEL1) != (priv->bank & ECON1_BSEL1)) { |
| 216 | if (b & ECON1_BSEL1) |
| 217 | spi_write_op(priv, ENC28J60_BIT_FIELD_SET, ECON1, |
| 218 | ECON1_BSEL1); |
| 219 | else |
| 220 | spi_write_op(priv, ENC28J60_BIT_FIELD_CLR, ECON1, |
| 221 | ECON1_BSEL1); |
| 222 | } |
| 223 | priv->bank = b; |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 224 | } |
| 225 | |
| 226 | /* |
| 227 | * Register access routines through the SPI bus. |
| 228 | * Every register access comes in two flavours: |
| 229 | * - nolock_xxx: caller needs to invoke mutex_lock, usually to access |
| 230 | * atomically more than one register |
| 231 | * - locked_xxx: caller doesn't need to invoke mutex_lock, single access |
| 232 | * |
| 233 | * Some registers can be accessed through the bit field clear and |
| 234 | * bit field set to avoid a read modify write cycle. |
| 235 | */ |
| 236 | |
| 237 | /* |
| 238 | * Register bit field Set |
| 239 | */ |
| 240 | static void nolock_reg_bfset(struct enc28j60_net *priv, |
| 241 | u8 addr, u8 mask) |
| 242 | { |
| 243 | enc28j60_set_bank(priv, addr); |
| 244 | spi_write_op(priv, ENC28J60_BIT_FIELD_SET, addr, mask); |
| 245 | } |
| 246 | |
| 247 | static void locked_reg_bfset(struct enc28j60_net *priv, |
| 248 | u8 addr, u8 mask) |
| 249 | { |
| 250 | mutex_lock(&priv->lock); |
| 251 | nolock_reg_bfset(priv, addr, mask); |
| 252 | mutex_unlock(&priv->lock); |
| 253 | } |
| 254 | |
| 255 | /* |
| 256 | * Register bit field Clear |
| 257 | */ |
| 258 | static void nolock_reg_bfclr(struct enc28j60_net *priv, |
| 259 | u8 addr, u8 mask) |
| 260 | { |
| 261 | enc28j60_set_bank(priv, addr); |
| 262 | spi_write_op(priv, ENC28J60_BIT_FIELD_CLR, addr, mask); |
| 263 | } |
| 264 | |
| 265 | static void locked_reg_bfclr(struct enc28j60_net *priv, |
| 266 | u8 addr, u8 mask) |
| 267 | { |
| 268 | mutex_lock(&priv->lock); |
| 269 | nolock_reg_bfclr(priv, addr, mask); |
| 270 | mutex_unlock(&priv->lock); |
| 271 | } |
| 272 | |
| 273 | /* |
| 274 | * Register byte read |
| 275 | */ |
| 276 | static int nolock_regb_read(struct enc28j60_net *priv, |
| 277 | u8 address) |
| 278 | { |
| 279 | enc28j60_set_bank(priv, address); |
| 280 | return spi_read_op(priv, ENC28J60_READ_CTRL_REG, address); |
| 281 | } |
| 282 | |
| 283 | static int locked_regb_read(struct enc28j60_net *priv, |
| 284 | u8 address) |
| 285 | { |
| 286 | int ret; |
| 287 | |
| 288 | mutex_lock(&priv->lock); |
| 289 | ret = nolock_regb_read(priv, address); |
| 290 | mutex_unlock(&priv->lock); |
| 291 | |
| 292 | return ret; |
| 293 | } |
| 294 | |
| 295 | /* |
| 296 | * Register word read |
| 297 | */ |
| 298 | static int nolock_regw_read(struct enc28j60_net *priv, |
| 299 | u8 address) |
| 300 | { |
| 301 | int rl, rh; |
| 302 | |
| 303 | enc28j60_set_bank(priv, address); |
| 304 | rl = spi_read_op(priv, ENC28J60_READ_CTRL_REG, address); |
| 305 | rh = spi_read_op(priv, ENC28J60_READ_CTRL_REG, address + 1); |
| 306 | |
| 307 | return (rh << 8) | rl; |
| 308 | } |
| 309 | |
| 310 | static int locked_regw_read(struct enc28j60_net *priv, |
| 311 | u8 address) |
| 312 | { |
| 313 | int ret; |
| 314 | |
| 315 | mutex_lock(&priv->lock); |
| 316 | ret = nolock_regw_read(priv, address); |
| 317 | mutex_unlock(&priv->lock); |
| 318 | |
| 319 | return ret; |
| 320 | } |
| 321 | |
| 322 | /* |
| 323 | * Register byte write |
| 324 | */ |
| 325 | static void nolock_regb_write(struct enc28j60_net *priv, |
| 326 | u8 address, u8 data) |
| 327 | { |
| 328 | enc28j60_set_bank(priv, address); |
| 329 | spi_write_op(priv, ENC28J60_WRITE_CTRL_REG, address, data); |
| 330 | } |
| 331 | |
| 332 | static void locked_regb_write(struct enc28j60_net *priv, |
| 333 | u8 address, u8 data) |
| 334 | { |
| 335 | mutex_lock(&priv->lock); |
| 336 | nolock_regb_write(priv, address, data); |
| 337 | mutex_unlock(&priv->lock); |
| 338 | } |
| 339 | |
| 340 | /* |
| 341 | * Register word write |
| 342 | */ |
| 343 | static void nolock_regw_write(struct enc28j60_net *priv, |
| 344 | u8 address, u16 data) |
| 345 | { |
| 346 | enc28j60_set_bank(priv, address); |
| 347 | spi_write_op(priv, ENC28J60_WRITE_CTRL_REG, address, (u8) data); |
| 348 | spi_write_op(priv, ENC28J60_WRITE_CTRL_REG, address + 1, |
| 349 | (u8) (data >> 8)); |
| 350 | } |
| 351 | |
| 352 | static void locked_regw_write(struct enc28j60_net *priv, |
| 353 | u8 address, u16 data) |
| 354 | { |
| 355 | mutex_lock(&priv->lock); |
| 356 | nolock_regw_write(priv, address, data); |
| 357 | mutex_unlock(&priv->lock); |
| 358 | } |
| 359 | |
| 360 | /* |
| 361 | * Buffer memory read |
| 362 | * Select the starting address and execute a SPI buffer read |
| 363 | */ |
| 364 | static void enc28j60_mem_read(struct enc28j60_net *priv, |
| 365 | u16 addr, int len, u8 *data) |
| 366 | { |
| 367 | mutex_lock(&priv->lock); |
| 368 | nolock_regw_write(priv, ERDPTL, addr); |
| 369 | #ifdef CONFIG_ENC28J60_WRITEVERIFY |
| 370 | if (netif_msg_drv(priv)) { |
| 371 | u16 reg; |
| 372 | reg = nolock_regw_read(priv, ERDPTL); |
| 373 | if (reg != addr) |
| 374 | printk(KERN_DEBUG DRV_NAME ": %s() error writing ERDPT " |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 375 | "(0x%04x - 0x%04x)\n", __func__, reg, addr); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 376 | } |
| 377 | #endif |
| 378 | spi_read_buf(priv, len, data); |
| 379 | mutex_unlock(&priv->lock); |
| 380 | } |
| 381 | |
| 382 | /* |
| 383 | * Write packet to enc28j60 TX buffer memory |
| 384 | */ |
| 385 | static void |
| 386 | enc28j60_packet_write(struct enc28j60_net *priv, int len, const u8 *data) |
| 387 | { |
| 388 | mutex_lock(&priv->lock); |
| 389 | /* Set the write pointer to start of transmit buffer area */ |
| 390 | nolock_regw_write(priv, EWRPTL, TXSTART_INIT); |
| 391 | #ifdef CONFIG_ENC28J60_WRITEVERIFY |
| 392 | if (netif_msg_drv(priv)) { |
| 393 | u16 reg; |
| 394 | reg = nolock_regw_read(priv, EWRPTL); |
| 395 | if (reg != TXSTART_INIT) |
| 396 | printk(KERN_DEBUG DRV_NAME |
| 397 | ": %s() ERWPT:0x%04x != 0x%04x\n", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 398 | __func__, reg, TXSTART_INIT); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 399 | } |
| 400 | #endif |
| 401 | /* Set the TXND pointer to correspond to the packet size given */ |
| 402 | nolock_regw_write(priv, ETXNDL, TXSTART_INIT + len); |
| 403 | /* write per-packet control byte */ |
| 404 | spi_write_op(priv, ENC28J60_WRITE_BUF_MEM, 0, 0x00); |
| 405 | if (netif_msg_hw(priv)) |
| 406 | printk(KERN_DEBUG DRV_NAME |
| 407 | ": %s() after control byte ERWPT:0x%04x\n", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 408 | __func__, nolock_regw_read(priv, EWRPTL)); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 409 | /* copy the packet into the transmit buffer */ |
| 410 | spi_write_buf(priv, len, data); |
| 411 | if (netif_msg_hw(priv)) |
| 412 | printk(KERN_DEBUG DRV_NAME |
| 413 | ": %s() after write packet ERWPT:0x%04x, len=%d\n", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 414 | __func__, nolock_regw_read(priv, EWRPTL), len); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 415 | mutex_unlock(&priv->lock); |
| 416 | } |
| 417 | |
David Brownell | 7dac6f8 | 2008-06-12 21:38:06 -0700 | [diff] [blame] | 418 | static unsigned long msec20_to_jiffies; |
| 419 | |
| 420 | static int poll_ready(struct enc28j60_net *priv, u8 reg, u8 mask, u8 val) |
| 421 | { |
| 422 | unsigned long timeout = jiffies + msec20_to_jiffies; |
| 423 | |
| 424 | /* 20 msec timeout read */ |
| 425 | while ((nolock_regb_read(priv, reg) & mask) != val) { |
| 426 | if (time_after(jiffies, timeout)) { |
| 427 | if (netif_msg_drv(priv)) |
| 428 | dev_dbg(&priv->spi->dev, |
| 429 | "reg %02x ready timeout!\n", reg); |
| 430 | return -ETIMEDOUT; |
| 431 | } |
| 432 | cpu_relax(); |
| 433 | } |
| 434 | return 0; |
| 435 | } |
| 436 | |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 437 | /* |
| 438 | * Wait until the PHY operation is complete. |
| 439 | */ |
| 440 | static int wait_phy_ready(struct enc28j60_net *priv) |
| 441 | { |
David Brownell | 7dac6f8 | 2008-06-12 21:38:06 -0700 | [diff] [blame] | 442 | return poll_ready(priv, MISTAT, MISTAT_BUSY, 0) ? 0 : 1; |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 443 | } |
| 444 | |
| 445 | /* |
| 446 | * PHY register read |
| 447 | * PHY registers are not accessed directly, but through the MII |
| 448 | */ |
| 449 | static u16 enc28j60_phy_read(struct enc28j60_net *priv, u8 address) |
| 450 | { |
| 451 | u16 ret; |
| 452 | |
| 453 | mutex_lock(&priv->lock); |
| 454 | /* set the PHY register address */ |
| 455 | nolock_regb_write(priv, MIREGADR, address); |
| 456 | /* start the register read operation */ |
| 457 | nolock_regb_write(priv, MICMD, MICMD_MIIRD); |
| 458 | /* wait until the PHY read completes */ |
| 459 | wait_phy_ready(priv); |
| 460 | /* quit reading */ |
| 461 | nolock_regb_write(priv, MICMD, 0x00); |
| 462 | /* return the data */ |
| 463 | ret = nolock_regw_read(priv, MIRDL); |
| 464 | mutex_unlock(&priv->lock); |
| 465 | |
| 466 | return ret; |
| 467 | } |
| 468 | |
| 469 | static int enc28j60_phy_write(struct enc28j60_net *priv, u8 address, u16 data) |
| 470 | { |
| 471 | int ret; |
| 472 | |
| 473 | mutex_lock(&priv->lock); |
| 474 | /* set the PHY register address */ |
| 475 | nolock_regb_write(priv, MIREGADR, address); |
| 476 | /* write the PHY data */ |
| 477 | nolock_regw_write(priv, MIWRL, data); |
| 478 | /* wait until the PHY write completes and return */ |
| 479 | ret = wait_phy_ready(priv); |
| 480 | mutex_unlock(&priv->lock); |
| 481 | |
| 482 | return ret; |
| 483 | } |
| 484 | |
| 485 | /* |
| 486 | * Program the hardware MAC address from dev->dev_addr. |
| 487 | */ |
| 488 | static int enc28j60_set_hw_macaddr(struct net_device *ndev) |
| 489 | { |
| 490 | int ret; |
| 491 | struct enc28j60_net *priv = netdev_priv(ndev); |
| 492 | |
| 493 | mutex_lock(&priv->lock); |
| 494 | if (!priv->hw_enable) { |
Johannes Berg | e174961 | 2008-10-27 15:59:26 -0700 | [diff] [blame] | 495 | if (netif_msg_drv(priv)) |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 496 | printk(KERN_INFO DRV_NAME |
Johannes Berg | e174961 | 2008-10-27 15:59:26 -0700 | [diff] [blame] | 497 | ": %s: Setting MAC address to %pM\n", |
| 498 | ndev->name, ndev->dev_addr); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 499 | /* NOTE: MAC address in ENC28J60 is byte-backward */ |
| 500 | nolock_regb_write(priv, MAADR5, ndev->dev_addr[0]); |
| 501 | nolock_regb_write(priv, MAADR4, ndev->dev_addr[1]); |
| 502 | nolock_regb_write(priv, MAADR3, ndev->dev_addr[2]); |
| 503 | nolock_regb_write(priv, MAADR2, ndev->dev_addr[3]); |
| 504 | nolock_regb_write(priv, MAADR1, ndev->dev_addr[4]); |
| 505 | nolock_regb_write(priv, MAADR0, ndev->dev_addr[5]); |
| 506 | ret = 0; |
| 507 | } else { |
| 508 | if (netif_msg_drv(priv)) |
| 509 | printk(KERN_DEBUG DRV_NAME |
| 510 | ": %s() Hardware must be disabled to set " |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 511 | "Mac address\n", __func__); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 512 | ret = -EBUSY; |
| 513 | } |
| 514 | mutex_unlock(&priv->lock); |
| 515 | return ret; |
| 516 | } |
| 517 | |
| 518 | /* |
| 519 | * Store the new hardware address in dev->dev_addr, and update the MAC. |
| 520 | */ |
| 521 | static int enc28j60_set_mac_address(struct net_device *dev, void *addr) |
| 522 | { |
| 523 | struct sockaddr *address = addr; |
| 524 | |
| 525 | if (netif_running(dev)) |
| 526 | return -EBUSY; |
| 527 | if (!is_valid_ether_addr(address->sa_data)) |
| 528 | return -EADDRNOTAVAIL; |
| 529 | |
Danny Kukawka | 7ce5d22 | 2012-02-15 06:45:40 +0000 | [diff] [blame] | 530 | dev->addr_assign_type &= ~NET_ADDR_RANDOM; |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 531 | memcpy(dev->dev_addr, address->sa_data, dev->addr_len); |
| 532 | return enc28j60_set_hw_macaddr(dev); |
| 533 | } |
| 534 | |
| 535 | /* |
| 536 | * Debug routine to dump useful register contents |
| 537 | */ |
| 538 | static void enc28j60_dump_regs(struct enc28j60_net *priv, const char *msg) |
| 539 | { |
| 540 | mutex_lock(&priv->lock); |
| 541 | printk(KERN_DEBUG DRV_NAME " %s\n" |
| 542 | "HwRevID: 0x%02x\n" |
| 543 | "Cntrl: ECON1 ECON2 ESTAT EIR EIE\n" |
| 544 | " 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n" |
| 545 | "MAC : MACON1 MACON3 MACON4\n" |
| 546 | " 0x%02x 0x%02x 0x%02x\n" |
| 547 | "Rx : ERXST ERXND ERXWRPT ERXRDPT ERXFCON EPKTCNT MAMXFL\n" |
| 548 | " 0x%04x 0x%04x 0x%04x 0x%04x " |
| 549 | "0x%02x 0x%02x 0x%04x\n" |
| 550 | "Tx : ETXST ETXND MACLCON1 MACLCON2 MAPHSUP\n" |
| 551 | " 0x%04x 0x%04x 0x%02x 0x%02x 0x%02x\n", |
| 552 | msg, nolock_regb_read(priv, EREVID), |
| 553 | nolock_regb_read(priv, ECON1), nolock_regb_read(priv, ECON2), |
| 554 | nolock_regb_read(priv, ESTAT), nolock_regb_read(priv, EIR), |
| 555 | nolock_regb_read(priv, EIE), nolock_regb_read(priv, MACON1), |
| 556 | nolock_regb_read(priv, MACON3), nolock_regb_read(priv, MACON4), |
| 557 | nolock_regw_read(priv, ERXSTL), nolock_regw_read(priv, ERXNDL), |
| 558 | nolock_regw_read(priv, ERXWRPTL), |
| 559 | nolock_regw_read(priv, ERXRDPTL), |
| 560 | nolock_regb_read(priv, ERXFCON), |
| 561 | nolock_regb_read(priv, EPKTCNT), |
| 562 | nolock_regw_read(priv, MAMXFLL), nolock_regw_read(priv, ETXSTL), |
| 563 | nolock_regw_read(priv, ETXNDL), |
| 564 | nolock_regb_read(priv, MACLCON1), |
| 565 | nolock_regb_read(priv, MACLCON2), |
| 566 | nolock_regb_read(priv, MAPHSUP)); |
| 567 | mutex_unlock(&priv->lock); |
| 568 | } |
| 569 | |
| 570 | /* |
| 571 | * ERXRDPT need to be set always at odd addresses, refer to errata datasheet |
| 572 | */ |
| 573 | static u16 erxrdpt_workaround(u16 next_packet_ptr, u16 start, u16 end) |
| 574 | { |
| 575 | u16 erxrdpt; |
| 576 | |
| 577 | if ((next_packet_ptr - 1 < start) || (next_packet_ptr - 1 > end)) |
| 578 | erxrdpt = end; |
| 579 | else |
| 580 | erxrdpt = next_packet_ptr - 1; |
| 581 | |
| 582 | return erxrdpt; |
| 583 | } |
| 584 | |
Baruch Siach | 5176da7 | 2008-12-02 05:07:01 +0000 | [diff] [blame] | 585 | /* |
| 586 | * Calculate wrap around when reading beyond the end of the RX buffer |
| 587 | */ |
| 588 | static u16 rx_packet_start(u16 ptr) |
| 589 | { |
| 590 | if (ptr + RSV_SIZE > RXEND_INIT) |
| 591 | return (ptr + RSV_SIZE) - (RXEND_INIT - RXSTART_INIT + 1); |
| 592 | else |
| 593 | return ptr + RSV_SIZE; |
| 594 | } |
| 595 | |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 596 | static void nolock_rxfifo_init(struct enc28j60_net *priv, u16 start, u16 end) |
| 597 | { |
| 598 | u16 erxrdpt; |
| 599 | |
| 600 | if (start > 0x1FFF || end > 0x1FFF || start > end) { |
| 601 | if (netif_msg_drv(priv)) |
| 602 | printk(KERN_ERR DRV_NAME ": %s(%d, %d) RXFIFO " |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 603 | "bad parameters!\n", __func__, start, end); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 604 | return; |
| 605 | } |
| 606 | /* set receive buffer start + end */ |
| 607 | priv->next_pk_ptr = start; |
| 608 | nolock_regw_write(priv, ERXSTL, start); |
| 609 | erxrdpt = erxrdpt_workaround(priv->next_pk_ptr, start, end); |
| 610 | nolock_regw_write(priv, ERXRDPTL, erxrdpt); |
| 611 | nolock_regw_write(priv, ERXNDL, end); |
| 612 | } |
| 613 | |
| 614 | static void nolock_txfifo_init(struct enc28j60_net *priv, u16 start, u16 end) |
| 615 | { |
| 616 | if (start > 0x1FFF || end > 0x1FFF || start > end) { |
| 617 | if (netif_msg_drv(priv)) |
| 618 | printk(KERN_ERR DRV_NAME ": %s(%d, %d) TXFIFO " |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 619 | "bad parameters!\n", __func__, start, end); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 620 | return; |
| 621 | } |
| 622 | /* set transmit buffer start + end */ |
| 623 | nolock_regw_write(priv, ETXSTL, start); |
| 624 | nolock_regw_write(priv, ETXNDL, end); |
| 625 | } |
| 626 | |
David Brownell | 7dac6f8 | 2008-06-12 21:38:06 -0700 | [diff] [blame] | 627 | /* |
| 628 | * Low power mode shrinks power consumption about 100x, so we'd like |
| 629 | * the chip to be in that mode whenever it's inactive. (However, we |
| 630 | * can't stay in lowpower mode during suspend with WOL active.) |
| 631 | */ |
| 632 | static void enc28j60_lowpower(struct enc28j60_net *priv, bool is_low) |
| 633 | { |
| 634 | if (netif_msg_drv(priv)) |
| 635 | dev_dbg(&priv->spi->dev, "%s power...\n", |
| 636 | is_low ? "low" : "high"); |
| 637 | |
| 638 | mutex_lock(&priv->lock); |
| 639 | if (is_low) { |
| 640 | nolock_reg_bfclr(priv, ECON1, ECON1_RXEN); |
| 641 | poll_ready(priv, ESTAT, ESTAT_RXBUSY, 0); |
| 642 | poll_ready(priv, ECON1, ECON1_TXRTS, 0); |
| 643 | /* ECON2_VRPS was set during initialization */ |
| 644 | nolock_reg_bfset(priv, ECON2, ECON2_PWRSV); |
| 645 | } else { |
| 646 | nolock_reg_bfclr(priv, ECON2, ECON2_PWRSV); |
| 647 | poll_ready(priv, ESTAT, ESTAT_CLKRDY, ESTAT_CLKRDY); |
| 648 | /* caller sets ECON1_RXEN */ |
| 649 | } |
| 650 | mutex_unlock(&priv->lock); |
| 651 | } |
| 652 | |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 653 | static int enc28j60_hw_init(struct enc28j60_net *priv) |
| 654 | { |
| 655 | u8 reg; |
| 656 | |
| 657 | if (netif_msg_drv(priv)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 658 | printk(KERN_DEBUG DRV_NAME ": %s() - %s\n", __func__, |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 659 | priv->full_duplex ? "FullDuplex" : "HalfDuplex"); |
| 660 | |
| 661 | mutex_lock(&priv->lock); |
| 662 | /* first reset the chip */ |
| 663 | enc28j60_soft_reset(priv); |
| 664 | /* Clear ECON1 */ |
| 665 | spi_write_op(priv, ENC28J60_WRITE_CTRL_REG, ECON1, 0x00); |
| 666 | priv->bank = 0; |
| 667 | priv->hw_enable = false; |
| 668 | priv->tx_retry_count = 0; |
| 669 | priv->max_pk_counter = 0; |
| 670 | priv->rxfilter = RXFILTER_NORMAL; |
David Brownell | 7dac6f8 | 2008-06-12 21:38:06 -0700 | [diff] [blame] | 671 | /* enable address auto increment and voltage regulator powersave */ |
| 672 | nolock_regb_write(priv, ECON2, ECON2_AUTOINC | ECON2_VRPS); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 673 | |
| 674 | nolock_rxfifo_init(priv, RXSTART_INIT, RXEND_INIT); |
| 675 | nolock_txfifo_init(priv, TXSTART_INIT, TXEND_INIT); |
| 676 | mutex_unlock(&priv->lock); |
| 677 | |
| 678 | /* |
| 679 | * Check the RevID. |
| 680 | * If it's 0x00 or 0xFF probably the enc28j60 is not mounted or |
| 681 | * damaged |
| 682 | */ |
| 683 | reg = locked_regb_read(priv, EREVID); |
| 684 | if (netif_msg_drv(priv)) |
| 685 | printk(KERN_INFO DRV_NAME ": chip RevID: 0x%02x\n", reg); |
| 686 | if (reg == 0x00 || reg == 0xff) { |
| 687 | if (netif_msg_drv(priv)) |
| 688 | printk(KERN_DEBUG DRV_NAME ": %s() Invalid RevId %d\n", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 689 | __func__, reg); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 690 | return 0; |
| 691 | } |
| 692 | |
| 693 | /* default filter mode: (unicast OR broadcast) AND crc valid */ |
| 694 | locked_regb_write(priv, ERXFCON, |
| 695 | ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_BCEN); |
| 696 | |
| 697 | /* enable MAC receive */ |
| 698 | locked_regb_write(priv, MACON1, |
| 699 | MACON1_MARXEN | MACON1_TXPAUS | MACON1_RXPAUS); |
| 700 | /* enable automatic padding and CRC operations */ |
| 701 | if (priv->full_duplex) { |
| 702 | locked_regb_write(priv, MACON3, |
| 703 | MACON3_PADCFG0 | MACON3_TXCRCEN | |
| 704 | MACON3_FRMLNEN | MACON3_FULDPX); |
| 705 | /* set inter-frame gap (non-back-to-back) */ |
| 706 | locked_regb_write(priv, MAIPGL, 0x12); |
| 707 | /* set inter-frame gap (back-to-back) */ |
| 708 | locked_regb_write(priv, MABBIPG, 0x15); |
| 709 | } else { |
| 710 | locked_regb_write(priv, MACON3, |
| 711 | MACON3_PADCFG0 | MACON3_TXCRCEN | |
| 712 | MACON3_FRMLNEN); |
| 713 | locked_regb_write(priv, MACON4, 1 << 6); /* DEFER bit */ |
| 714 | /* set inter-frame gap (non-back-to-back) */ |
| 715 | locked_regw_write(priv, MAIPGL, 0x0C12); |
| 716 | /* set inter-frame gap (back-to-back) */ |
| 717 | locked_regb_write(priv, MABBIPG, 0x12); |
| 718 | } |
| 719 | /* |
| 720 | * MACLCON1 (default) |
| 721 | * MACLCON2 (default) |
| 722 | * Set the maximum packet size which the controller will accept |
| 723 | */ |
| 724 | locked_regw_write(priv, MAMXFLL, MAX_FRAMELEN); |
| 725 | |
| 726 | /* Configure LEDs */ |
| 727 | if (!enc28j60_phy_write(priv, PHLCON, ENC28J60_LAMPS_MODE)) |
| 728 | return 0; |
| 729 | |
| 730 | if (priv->full_duplex) { |
| 731 | if (!enc28j60_phy_write(priv, PHCON1, PHCON1_PDPXMD)) |
| 732 | return 0; |
| 733 | if (!enc28j60_phy_write(priv, PHCON2, 0x00)) |
| 734 | return 0; |
| 735 | } else { |
| 736 | if (!enc28j60_phy_write(priv, PHCON1, 0x00)) |
| 737 | return 0; |
| 738 | if (!enc28j60_phy_write(priv, PHCON2, PHCON2_HDLDIS)) |
| 739 | return 0; |
| 740 | } |
| 741 | if (netif_msg_hw(priv)) |
| 742 | enc28j60_dump_regs(priv, "Hw initialized."); |
| 743 | |
| 744 | return 1; |
| 745 | } |
| 746 | |
| 747 | static void enc28j60_hw_enable(struct enc28j60_net *priv) |
| 748 | { |
David Brownell | 7dac6f8 | 2008-06-12 21:38:06 -0700 | [diff] [blame] | 749 | /* enable interrupts */ |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 750 | if (netif_msg_hw(priv)) |
| 751 | printk(KERN_DEBUG DRV_NAME ": %s() enabling interrupts.\n", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 752 | __func__); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 753 | |
| 754 | enc28j60_phy_write(priv, PHIE, PHIE_PGEIE | PHIE_PLNKIE); |
| 755 | |
| 756 | mutex_lock(&priv->lock); |
| 757 | nolock_reg_bfclr(priv, EIR, EIR_DMAIF | EIR_LINKIF | |
| 758 | EIR_TXIF | EIR_TXERIF | EIR_RXERIF | EIR_PKTIF); |
| 759 | nolock_regb_write(priv, EIE, EIE_INTIE | EIE_PKTIE | EIE_LINKIE | |
| 760 | EIE_TXIE | EIE_TXERIE | EIE_RXERIE); |
| 761 | |
| 762 | /* enable receive logic */ |
| 763 | nolock_reg_bfset(priv, ECON1, ECON1_RXEN); |
| 764 | priv->hw_enable = true; |
| 765 | mutex_unlock(&priv->lock); |
| 766 | } |
| 767 | |
| 768 | static void enc28j60_hw_disable(struct enc28j60_net *priv) |
| 769 | { |
| 770 | mutex_lock(&priv->lock); |
| 771 | /* disable interrutps and packet reception */ |
| 772 | nolock_regb_write(priv, EIE, 0x00); |
| 773 | nolock_reg_bfclr(priv, ECON1, ECON1_RXEN); |
| 774 | priv->hw_enable = false; |
| 775 | mutex_unlock(&priv->lock); |
| 776 | } |
| 777 | |
| 778 | static int |
| 779 | enc28j60_setlink(struct net_device *ndev, u8 autoneg, u16 speed, u8 duplex) |
| 780 | { |
| 781 | struct enc28j60_net *priv = netdev_priv(ndev); |
| 782 | int ret = 0; |
| 783 | |
| 784 | if (!priv->hw_enable) { |
David Brownell | 7dac6f8 | 2008-06-12 21:38:06 -0700 | [diff] [blame] | 785 | /* link is in low power mode now; duplex setting |
| 786 | * will take effect on next enc28j60_hw_init(). |
| 787 | */ |
| 788 | if (autoneg == AUTONEG_DISABLE && speed == SPEED_10) |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 789 | priv->full_duplex = (duplex == DUPLEX_FULL); |
David Brownell | 7dac6f8 | 2008-06-12 21:38:06 -0700 | [diff] [blame] | 790 | else { |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 791 | if (netif_msg_link(priv)) |
| 792 | dev_warn(&ndev->dev, |
| 793 | "unsupported link setting\n"); |
| 794 | ret = -EOPNOTSUPP; |
| 795 | } |
| 796 | } else { |
| 797 | if (netif_msg_link(priv)) |
| 798 | dev_warn(&ndev->dev, "Warning: hw must be disabled " |
| 799 | "to set link mode\n"); |
| 800 | ret = -EBUSY; |
| 801 | } |
| 802 | return ret; |
| 803 | } |
| 804 | |
| 805 | /* |
| 806 | * Read the Transmit Status Vector |
| 807 | */ |
| 808 | static void enc28j60_read_tsv(struct enc28j60_net *priv, u8 tsv[TSV_SIZE]) |
| 809 | { |
| 810 | int endptr; |
| 811 | |
| 812 | endptr = locked_regw_read(priv, ETXNDL); |
| 813 | if (netif_msg_hw(priv)) |
| 814 | printk(KERN_DEBUG DRV_NAME ": reading TSV at addr:0x%04x\n", |
| 815 | endptr + 1); |
Stefan Weil | fca540a | 2011-01-31 20:56:54 -0800 | [diff] [blame] | 816 | enc28j60_mem_read(priv, endptr + 1, TSV_SIZE, tsv); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 817 | } |
| 818 | |
| 819 | static void enc28j60_dump_tsv(struct enc28j60_net *priv, const char *msg, |
| 820 | u8 tsv[TSV_SIZE]) |
| 821 | { |
| 822 | u16 tmp1, tmp2; |
| 823 | |
| 824 | printk(KERN_DEBUG DRV_NAME ": %s - TSV:\n", msg); |
| 825 | tmp1 = tsv[1]; |
| 826 | tmp1 <<= 8; |
| 827 | tmp1 |= tsv[0]; |
| 828 | |
| 829 | tmp2 = tsv[5]; |
| 830 | tmp2 <<= 8; |
| 831 | tmp2 |= tsv[4]; |
| 832 | |
| 833 | printk(KERN_DEBUG DRV_NAME ": ByteCount: %d, CollisionCount: %d," |
| 834 | " TotByteOnWire: %d\n", tmp1, tsv[2] & 0x0f, tmp2); |
| 835 | printk(KERN_DEBUG DRV_NAME ": TxDone: %d, CRCErr:%d, LenChkErr: %d," |
| 836 | " LenOutOfRange: %d\n", TSV_GETBIT(tsv, TSV_TXDONE), |
| 837 | TSV_GETBIT(tsv, TSV_TXCRCERROR), |
| 838 | TSV_GETBIT(tsv, TSV_TXLENCHKERROR), |
| 839 | TSV_GETBIT(tsv, TSV_TXLENOUTOFRANGE)); |
| 840 | printk(KERN_DEBUG DRV_NAME ": Multicast: %d, Broadcast: %d, " |
| 841 | "PacketDefer: %d, ExDefer: %d\n", |
| 842 | TSV_GETBIT(tsv, TSV_TXMULTICAST), |
| 843 | TSV_GETBIT(tsv, TSV_TXBROADCAST), |
| 844 | TSV_GETBIT(tsv, TSV_TXPACKETDEFER), |
| 845 | TSV_GETBIT(tsv, TSV_TXEXDEFER)); |
| 846 | printk(KERN_DEBUG DRV_NAME ": ExCollision: %d, LateCollision: %d, " |
| 847 | "Giant: %d, Underrun: %d\n", |
| 848 | TSV_GETBIT(tsv, TSV_TXEXCOLLISION), |
| 849 | TSV_GETBIT(tsv, TSV_TXLATECOLLISION), |
| 850 | TSV_GETBIT(tsv, TSV_TXGIANT), TSV_GETBIT(tsv, TSV_TXUNDERRUN)); |
| 851 | printk(KERN_DEBUG DRV_NAME ": ControlFrame: %d, PauseFrame: %d, " |
| 852 | "BackPressApp: %d, VLanTagFrame: %d\n", |
| 853 | TSV_GETBIT(tsv, TSV_TXCONTROLFRAME), |
| 854 | TSV_GETBIT(tsv, TSV_TXPAUSEFRAME), |
| 855 | TSV_GETBIT(tsv, TSV_BACKPRESSUREAPP), |
| 856 | TSV_GETBIT(tsv, TSV_TXVLANTAGFRAME)); |
| 857 | } |
| 858 | |
| 859 | /* |
| 860 | * Receive Status vector |
| 861 | */ |
| 862 | static void enc28j60_dump_rsv(struct enc28j60_net *priv, const char *msg, |
| 863 | u16 pk_ptr, int len, u16 sts) |
| 864 | { |
| 865 | printk(KERN_DEBUG DRV_NAME ": %s - NextPk: 0x%04x - RSV:\n", |
| 866 | msg, pk_ptr); |
| 867 | printk(KERN_DEBUG DRV_NAME ": ByteCount: %d, DribbleNibble: %d\n", len, |
| 868 | RSV_GETBIT(sts, RSV_DRIBBLENIBBLE)); |
| 869 | printk(KERN_DEBUG DRV_NAME ": RxOK: %d, CRCErr:%d, LenChkErr: %d," |
| 870 | " LenOutOfRange: %d\n", RSV_GETBIT(sts, RSV_RXOK), |
| 871 | RSV_GETBIT(sts, RSV_CRCERROR), |
| 872 | RSV_GETBIT(sts, RSV_LENCHECKERR), |
| 873 | RSV_GETBIT(sts, RSV_LENOUTOFRANGE)); |
| 874 | printk(KERN_DEBUG DRV_NAME ": Multicast: %d, Broadcast: %d, " |
| 875 | "LongDropEvent: %d, CarrierEvent: %d\n", |
| 876 | RSV_GETBIT(sts, RSV_RXMULTICAST), |
| 877 | RSV_GETBIT(sts, RSV_RXBROADCAST), |
| 878 | RSV_GETBIT(sts, RSV_RXLONGEVDROPEV), |
| 879 | RSV_GETBIT(sts, RSV_CARRIEREV)); |
| 880 | printk(KERN_DEBUG DRV_NAME ": ControlFrame: %d, PauseFrame: %d," |
| 881 | " UnknownOp: %d, VLanTagFrame: %d\n", |
| 882 | RSV_GETBIT(sts, RSV_RXCONTROLFRAME), |
| 883 | RSV_GETBIT(sts, RSV_RXPAUSEFRAME), |
| 884 | RSV_GETBIT(sts, RSV_RXUNKNOWNOPCODE), |
| 885 | RSV_GETBIT(sts, RSV_RXTYPEVLAN)); |
| 886 | } |
| 887 | |
| 888 | static void dump_packet(const char *msg, int len, const char *data) |
| 889 | { |
| 890 | printk(KERN_DEBUG DRV_NAME ": %s - packet len:%d\n", msg, len); |
| 891 | print_hex_dump(KERN_DEBUG, "pk data: ", DUMP_PREFIX_OFFSET, 16, 1, |
| 892 | data, len, true); |
| 893 | } |
| 894 | |
| 895 | /* |
| 896 | * Hardware receive function. |
| 897 | * Read the buffer memory, update the FIFO pointer to free the buffer, |
| 898 | * check the status vector and decrement the packet counter. |
| 899 | */ |
| 900 | static void enc28j60_hw_rx(struct net_device *ndev) |
| 901 | { |
| 902 | struct enc28j60_net *priv = netdev_priv(ndev); |
| 903 | struct sk_buff *skb = NULL; |
| 904 | u16 erxrdpt, next_packet, rxstat; |
| 905 | u8 rsv[RSV_SIZE]; |
| 906 | int len; |
| 907 | |
| 908 | if (netif_msg_rx_status(priv)) |
| 909 | printk(KERN_DEBUG DRV_NAME ": RX pk_addr:0x%04x\n", |
| 910 | priv->next_pk_ptr); |
| 911 | |
| 912 | if (unlikely(priv->next_pk_ptr > RXEND_INIT)) { |
| 913 | if (netif_msg_rx_err(priv)) |
| 914 | dev_err(&ndev->dev, |
| 915 | "%s() Invalid packet address!! 0x%04x\n", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 916 | __func__, priv->next_pk_ptr); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 917 | /* packet address corrupted: reset RX logic */ |
| 918 | mutex_lock(&priv->lock); |
| 919 | nolock_reg_bfclr(priv, ECON1, ECON1_RXEN); |
| 920 | nolock_reg_bfset(priv, ECON1, ECON1_RXRST); |
| 921 | nolock_reg_bfclr(priv, ECON1, ECON1_RXRST); |
| 922 | nolock_rxfifo_init(priv, RXSTART_INIT, RXEND_INIT); |
| 923 | nolock_reg_bfclr(priv, EIR, EIR_RXERIF); |
| 924 | nolock_reg_bfset(priv, ECON1, ECON1_RXEN); |
| 925 | mutex_unlock(&priv->lock); |
| 926 | ndev->stats.rx_errors++; |
| 927 | return; |
| 928 | } |
| 929 | /* Read next packet pointer and rx status vector */ |
| 930 | enc28j60_mem_read(priv, priv->next_pk_ptr, sizeof(rsv), rsv); |
| 931 | |
| 932 | next_packet = rsv[1]; |
| 933 | next_packet <<= 8; |
| 934 | next_packet |= rsv[0]; |
| 935 | |
| 936 | len = rsv[3]; |
| 937 | len <<= 8; |
| 938 | len |= rsv[2]; |
| 939 | |
| 940 | rxstat = rsv[5]; |
| 941 | rxstat <<= 8; |
| 942 | rxstat |= rsv[4]; |
| 943 | |
| 944 | if (netif_msg_rx_status(priv)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 945 | enc28j60_dump_rsv(priv, __func__, next_packet, len, rxstat); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 946 | |
Baruch Siach | 2269201 | 2009-01-04 16:23:01 -0800 | [diff] [blame] | 947 | if (!RSV_GETBIT(rxstat, RSV_RXOK) || len > MAX_FRAMELEN) { |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 948 | if (netif_msg_rx_err(priv)) |
| 949 | dev_err(&ndev->dev, "Rx Error (%04x)\n", rxstat); |
| 950 | ndev->stats.rx_errors++; |
| 951 | if (RSV_GETBIT(rxstat, RSV_CRCERROR)) |
| 952 | ndev->stats.rx_crc_errors++; |
| 953 | if (RSV_GETBIT(rxstat, RSV_LENCHECKERR)) |
| 954 | ndev->stats.rx_frame_errors++; |
Baruch Siach | 2269201 | 2009-01-04 16:23:01 -0800 | [diff] [blame] | 955 | if (len > MAX_FRAMELEN) |
| 956 | ndev->stats.rx_over_errors++; |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 957 | } else { |
Pradeep A Dalvi | c056b73 | 2012-02-05 02:50:38 +0000 | [diff] [blame] | 958 | skb = netdev_alloc_skb(ndev, len + NET_IP_ALIGN); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 959 | if (!skb) { |
| 960 | if (netif_msg_rx_err(priv)) |
| 961 | dev_err(&ndev->dev, |
| 962 | "out of memory for Rx'd frame\n"); |
| 963 | ndev->stats.rx_dropped++; |
| 964 | } else { |
David Brownell | 02ff05c | 2008-03-05 18:51:19 -0800 | [diff] [blame] | 965 | skb_reserve(skb, NET_IP_ALIGN); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 966 | /* copy the packet from the receive buffer */ |
Baruch Siach | 5176da7 | 2008-12-02 05:07:01 +0000 | [diff] [blame] | 967 | enc28j60_mem_read(priv, |
| 968 | rx_packet_start(priv->next_pk_ptr), |
| 969 | len, skb_put(skb, len)); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 970 | if (netif_msg_pktdata(priv)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 971 | dump_packet(__func__, skb->len, skb->data); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 972 | skb->protocol = eth_type_trans(skb, ndev); |
| 973 | /* update statistics */ |
| 974 | ndev->stats.rx_packets++; |
| 975 | ndev->stats.rx_bytes += len; |
Baruch Siach | 2c413a6 | 2008-12-15 20:18:52 +0000 | [diff] [blame] | 976 | netif_rx_ni(skb); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 977 | } |
| 978 | } |
| 979 | /* |
| 980 | * Move the RX read pointer to the start of the next |
| 981 | * received packet. |
| 982 | * This frees the memory we just read out |
| 983 | */ |
| 984 | erxrdpt = erxrdpt_workaround(next_packet, RXSTART_INIT, RXEND_INIT); |
| 985 | if (netif_msg_hw(priv)) |
| 986 | printk(KERN_DEBUG DRV_NAME ": %s() ERXRDPT:0x%04x\n", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 987 | __func__, erxrdpt); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 988 | |
| 989 | mutex_lock(&priv->lock); |
| 990 | nolock_regw_write(priv, ERXRDPTL, erxrdpt); |
| 991 | #ifdef CONFIG_ENC28J60_WRITEVERIFY |
| 992 | if (netif_msg_drv(priv)) { |
| 993 | u16 reg; |
| 994 | reg = nolock_regw_read(priv, ERXRDPTL); |
| 995 | if (reg != erxrdpt) |
| 996 | printk(KERN_DEBUG DRV_NAME ": %s() ERXRDPT verify " |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 997 | "error (0x%04x - 0x%04x)\n", __func__, |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 998 | reg, erxrdpt); |
| 999 | } |
| 1000 | #endif |
| 1001 | priv->next_pk_ptr = next_packet; |
| 1002 | /* we are done with this packet, decrement the packet counter */ |
| 1003 | nolock_reg_bfset(priv, ECON2, ECON2_PKTDEC); |
| 1004 | mutex_unlock(&priv->lock); |
| 1005 | } |
| 1006 | |
| 1007 | /* |
| 1008 | * Calculate free space in RxFIFO |
| 1009 | */ |
| 1010 | static int enc28j60_get_free_rxfifo(struct enc28j60_net *priv) |
| 1011 | { |
| 1012 | int epkcnt, erxst, erxnd, erxwr, erxrd; |
| 1013 | int free_space; |
| 1014 | |
| 1015 | mutex_lock(&priv->lock); |
| 1016 | epkcnt = nolock_regb_read(priv, EPKTCNT); |
| 1017 | if (epkcnt >= 255) |
| 1018 | free_space = -1; |
| 1019 | else { |
| 1020 | erxst = nolock_regw_read(priv, ERXSTL); |
| 1021 | erxnd = nolock_regw_read(priv, ERXNDL); |
| 1022 | erxwr = nolock_regw_read(priv, ERXWRPTL); |
| 1023 | erxrd = nolock_regw_read(priv, ERXRDPTL); |
| 1024 | |
| 1025 | if (erxwr > erxrd) |
| 1026 | free_space = (erxnd - erxst) - (erxwr - erxrd); |
| 1027 | else if (erxwr == erxrd) |
| 1028 | free_space = (erxnd - erxst); |
| 1029 | else |
| 1030 | free_space = erxrd - erxwr - 1; |
| 1031 | } |
| 1032 | mutex_unlock(&priv->lock); |
| 1033 | if (netif_msg_rx_status(priv)) |
| 1034 | printk(KERN_DEBUG DRV_NAME ": %s() free_space = %d\n", |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 1035 | __func__, free_space); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1036 | return free_space; |
| 1037 | } |
| 1038 | |
| 1039 | /* |
| 1040 | * Access the PHY to determine link status |
| 1041 | */ |
| 1042 | static void enc28j60_check_link_status(struct net_device *ndev) |
| 1043 | { |
| 1044 | struct enc28j60_net *priv = netdev_priv(ndev); |
| 1045 | u16 reg; |
| 1046 | int duplex; |
| 1047 | |
| 1048 | reg = enc28j60_phy_read(priv, PHSTAT2); |
| 1049 | if (netif_msg_hw(priv)) |
| 1050 | printk(KERN_DEBUG DRV_NAME ": %s() PHSTAT1: %04x, " |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 1051 | "PHSTAT2: %04x\n", __func__, |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1052 | enc28j60_phy_read(priv, PHSTAT1), reg); |
| 1053 | duplex = reg & PHSTAT2_DPXSTAT; |
| 1054 | |
| 1055 | if (reg & PHSTAT2_LSTAT) { |
| 1056 | netif_carrier_on(ndev); |
| 1057 | if (netif_msg_ifup(priv)) |
| 1058 | dev_info(&ndev->dev, "link up - %s\n", |
| 1059 | duplex ? "Full duplex" : "Half duplex"); |
| 1060 | } else { |
| 1061 | if (netif_msg_ifdown(priv)) |
| 1062 | dev_info(&ndev->dev, "link down\n"); |
| 1063 | netif_carrier_off(ndev); |
| 1064 | } |
| 1065 | } |
| 1066 | |
| 1067 | static void enc28j60_tx_clear(struct net_device *ndev, bool err) |
| 1068 | { |
| 1069 | struct enc28j60_net *priv = netdev_priv(ndev); |
| 1070 | |
| 1071 | if (err) |
| 1072 | ndev->stats.tx_errors++; |
| 1073 | else |
| 1074 | ndev->stats.tx_packets++; |
| 1075 | |
| 1076 | if (priv->tx_skb) { |
| 1077 | if (!err) |
| 1078 | ndev->stats.tx_bytes += priv->tx_skb->len; |
| 1079 | dev_kfree_skb(priv->tx_skb); |
| 1080 | priv->tx_skb = NULL; |
| 1081 | } |
| 1082 | locked_reg_bfclr(priv, ECON1, ECON1_TXRTS); |
| 1083 | netif_wake_queue(ndev); |
| 1084 | } |
| 1085 | |
| 1086 | /* |
| 1087 | * RX handler |
| 1088 | * ignore PKTIF because is unreliable! (look at the errata datasheet) |
| 1089 | * check EPKTCNT is the suggested workaround. |
| 1090 | * We don't need to clear interrupt flag, automatically done when |
| 1091 | * enc28j60_hw_rx() decrements the packet counter. |
| 1092 | * Returns how many packet processed. |
| 1093 | */ |
| 1094 | static int enc28j60_rx_interrupt(struct net_device *ndev) |
| 1095 | { |
| 1096 | struct enc28j60_net *priv = netdev_priv(ndev); |
| 1097 | int pk_counter, ret; |
| 1098 | |
| 1099 | pk_counter = locked_regb_read(priv, EPKTCNT); |
| 1100 | if (pk_counter && netif_msg_intr(priv)) |
| 1101 | printk(KERN_DEBUG DRV_NAME ": intRX, pk_cnt: %d\n", pk_counter); |
| 1102 | if (pk_counter > priv->max_pk_counter) { |
| 1103 | /* update statistics */ |
| 1104 | priv->max_pk_counter = pk_counter; |
| 1105 | if (netif_msg_rx_status(priv) && priv->max_pk_counter > 1) |
| 1106 | printk(KERN_DEBUG DRV_NAME ": RX max_pk_cnt: %d\n", |
| 1107 | priv->max_pk_counter); |
| 1108 | } |
| 1109 | ret = pk_counter; |
| 1110 | while (pk_counter-- > 0) |
| 1111 | enc28j60_hw_rx(ndev); |
| 1112 | |
| 1113 | return ret; |
| 1114 | } |
| 1115 | |
| 1116 | static void enc28j60_irq_work_handler(struct work_struct *work) |
| 1117 | { |
| 1118 | struct enc28j60_net *priv = |
| 1119 | container_of(work, struct enc28j60_net, irq_work); |
| 1120 | struct net_device *ndev = priv->netdev; |
| 1121 | int intflags, loop; |
| 1122 | |
| 1123 | if (netif_msg_intr(priv)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 1124 | printk(KERN_DEBUG DRV_NAME ": %s() enter\n", __func__); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1125 | /* disable further interrupts */ |
| 1126 | locked_reg_bfclr(priv, EIE, EIE_INTIE); |
| 1127 | |
| 1128 | do { |
| 1129 | loop = 0; |
| 1130 | intflags = locked_regb_read(priv, EIR); |
| 1131 | /* DMA interrupt handler (not currently used) */ |
| 1132 | if ((intflags & EIR_DMAIF) != 0) { |
| 1133 | loop++; |
| 1134 | if (netif_msg_intr(priv)) |
| 1135 | printk(KERN_DEBUG DRV_NAME |
| 1136 | ": intDMA(%d)\n", loop); |
| 1137 | locked_reg_bfclr(priv, EIR, EIR_DMAIF); |
| 1138 | } |
| 1139 | /* LINK changed handler */ |
| 1140 | if ((intflags & EIR_LINKIF) != 0) { |
| 1141 | loop++; |
| 1142 | if (netif_msg_intr(priv)) |
| 1143 | printk(KERN_DEBUG DRV_NAME |
| 1144 | ": intLINK(%d)\n", loop); |
| 1145 | enc28j60_check_link_status(ndev); |
| 1146 | /* read PHIR to clear the flag */ |
| 1147 | enc28j60_phy_read(priv, PHIR); |
| 1148 | } |
| 1149 | /* TX complete handler */ |
| 1150 | if ((intflags & EIR_TXIF) != 0) { |
| 1151 | bool err = false; |
| 1152 | loop++; |
| 1153 | if (netif_msg_intr(priv)) |
| 1154 | printk(KERN_DEBUG DRV_NAME |
| 1155 | ": intTX(%d)\n", loop); |
| 1156 | priv->tx_retry_count = 0; |
| 1157 | if (locked_regb_read(priv, ESTAT) & ESTAT_TXABRT) { |
| 1158 | if (netif_msg_tx_err(priv)) |
| 1159 | dev_err(&ndev->dev, |
| 1160 | "Tx Error (aborted)\n"); |
| 1161 | err = true; |
| 1162 | } |
| 1163 | if (netif_msg_tx_done(priv)) { |
| 1164 | u8 tsv[TSV_SIZE]; |
| 1165 | enc28j60_read_tsv(priv, tsv); |
| 1166 | enc28j60_dump_tsv(priv, "Tx Done", tsv); |
| 1167 | } |
| 1168 | enc28j60_tx_clear(ndev, err); |
| 1169 | locked_reg_bfclr(priv, EIR, EIR_TXIF); |
| 1170 | } |
| 1171 | /* TX Error handler */ |
| 1172 | if ((intflags & EIR_TXERIF) != 0) { |
| 1173 | u8 tsv[TSV_SIZE]; |
| 1174 | |
| 1175 | loop++; |
| 1176 | if (netif_msg_intr(priv)) |
| 1177 | printk(KERN_DEBUG DRV_NAME |
| 1178 | ": intTXErr(%d)\n", loop); |
| 1179 | locked_reg_bfclr(priv, ECON1, ECON1_TXRTS); |
| 1180 | enc28j60_read_tsv(priv, tsv); |
| 1181 | if (netif_msg_tx_err(priv)) |
| 1182 | enc28j60_dump_tsv(priv, "Tx Error", tsv); |
| 1183 | /* Reset TX logic */ |
| 1184 | mutex_lock(&priv->lock); |
| 1185 | nolock_reg_bfset(priv, ECON1, ECON1_TXRST); |
| 1186 | nolock_reg_bfclr(priv, ECON1, ECON1_TXRST); |
| 1187 | nolock_txfifo_init(priv, TXSTART_INIT, TXEND_INIT); |
| 1188 | mutex_unlock(&priv->lock); |
| 1189 | /* Transmit Late collision check for retransmit */ |
| 1190 | if (TSV_GETBIT(tsv, TSV_TXLATECOLLISION)) { |
| 1191 | if (netif_msg_tx_err(priv)) |
| 1192 | printk(KERN_DEBUG DRV_NAME |
| 1193 | ": LateCollision TXErr (%d)\n", |
| 1194 | priv->tx_retry_count); |
| 1195 | if (priv->tx_retry_count++ < MAX_TX_RETRYCOUNT) |
| 1196 | locked_reg_bfset(priv, ECON1, |
| 1197 | ECON1_TXRTS); |
| 1198 | else |
| 1199 | enc28j60_tx_clear(ndev, true); |
| 1200 | } else |
| 1201 | enc28j60_tx_clear(ndev, true); |
| 1202 | locked_reg_bfclr(priv, EIR, EIR_TXERIF); |
| 1203 | } |
| 1204 | /* RX Error handler */ |
| 1205 | if ((intflags & EIR_RXERIF) != 0) { |
| 1206 | loop++; |
| 1207 | if (netif_msg_intr(priv)) |
| 1208 | printk(KERN_DEBUG DRV_NAME |
| 1209 | ": intRXErr(%d)\n", loop); |
| 1210 | /* Check free FIFO space to flag RX overrun */ |
| 1211 | if (enc28j60_get_free_rxfifo(priv) <= 0) { |
| 1212 | if (netif_msg_rx_err(priv)) |
| 1213 | printk(KERN_DEBUG DRV_NAME |
| 1214 | ": RX Overrun\n"); |
| 1215 | ndev->stats.rx_dropped++; |
| 1216 | } |
| 1217 | locked_reg_bfclr(priv, EIR, EIR_RXERIF); |
| 1218 | } |
| 1219 | /* RX handler */ |
| 1220 | if (enc28j60_rx_interrupt(ndev)) |
| 1221 | loop++; |
| 1222 | } while (loop); |
| 1223 | |
| 1224 | /* re-enable interrupts */ |
| 1225 | locked_reg_bfset(priv, EIE, EIE_INTIE); |
| 1226 | if (netif_msg_intr(priv)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 1227 | printk(KERN_DEBUG DRV_NAME ": %s() exit\n", __func__); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1228 | } |
| 1229 | |
| 1230 | /* |
| 1231 | * Hardware transmit function. |
| 1232 | * Fill the buffer memory and send the contents of the transmit buffer |
| 1233 | * onto the network |
| 1234 | */ |
| 1235 | static void enc28j60_hw_tx(struct enc28j60_net *priv) |
| 1236 | { |
| 1237 | if (netif_msg_tx_queued(priv)) |
| 1238 | printk(KERN_DEBUG DRV_NAME |
| 1239 | ": Tx Packet Len:%d\n", priv->tx_skb->len); |
| 1240 | |
| 1241 | if (netif_msg_pktdata(priv)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 1242 | dump_packet(__func__, |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1243 | priv->tx_skb->len, priv->tx_skb->data); |
| 1244 | enc28j60_packet_write(priv, priv->tx_skb->len, priv->tx_skb->data); |
| 1245 | |
| 1246 | #ifdef CONFIG_ENC28J60_WRITEVERIFY |
| 1247 | /* readback and verify written data */ |
| 1248 | if (netif_msg_drv(priv)) { |
| 1249 | int test_len, k; |
| 1250 | u8 test_buf[64]; /* limit the test to the first 64 bytes */ |
| 1251 | int okflag; |
| 1252 | |
| 1253 | test_len = priv->tx_skb->len; |
| 1254 | if (test_len > sizeof(test_buf)) |
| 1255 | test_len = sizeof(test_buf); |
| 1256 | |
| 1257 | /* + 1 to skip control byte */ |
| 1258 | enc28j60_mem_read(priv, TXSTART_INIT + 1, test_len, test_buf); |
| 1259 | okflag = 1; |
| 1260 | for (k = 0; k < test_len; k++) { |
| 1261 | if (priv->tx_skb->data[k] != test_buf[k]) { |
| 1262 | printk(KERN_DEBUG DRV_NAME |
| 1263 | ": Error, %d location differ: " |
| 1264 | "0x%02x-0x%02x\n", k, |
| 1265 | priv->tx_skb->data[k], test_buf[k]); |
| 1266 | okflag = 0; |
| 1267 | } |
| 1268 | } |
| 1269 | if (!okflag) |
| 1270 | printk(KERN_DEBUG DRV_NAME ": Tx write buffer, " |
| 1271 | "verify ERROR!\n"); |
| 1272 | } |
| 1273 | #endif |
| 1274 | /* set TX request flag */ |
| 1275 | locked_reg_bfset(priv, ECON1, ECON1_TXRTS); |
| 1276 | } |
| 1277 | |
Stephen Hemminger | 61357325 | 2009-08-31 19:50:58 +0000 | [diff] [blame] | 1278 | static netdev_tx_t enc28j60_send_packet(struct sk_buff *skb, |
| 1279 | struct net_device *dev) |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1280 | { |
| 1281 | struct enc28j60_net *priv = netdev_priv(dev); |
| 1282 | |
| 1283 | if (netif_msg_tx_queued(priv)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 1284 | printk(KERN_DEBUG DRV_NAME ": %s() enter\n", __func__); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1285 | |
| 1286 | /* If some error occurs while trying to transmit this |
| 1287 | * packet, you should return '1' from this function. |
| 1288 | * In such a case you _may not_ do anything to the |
| 1289 | * SKB, it is still owned by the network queueing |
| 1290 | * layer when an error is returned. This means you |
| 1291 | * may not modify any SKB fields, you may not free |
| 1292 | * the SKB, etc. |
| 1293 | */ |
| 1294 | netif_stop_queue(dev); |
| 1295 | |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1296 | /* Remember the skb for deferred processing */ |
| 1297 | priv->tx_skb = skb; |
| 1298 | schedule_work(&priv->tx_work); |
| 1299 | |
Patrick McHardy | 6ed1065 | 2009-06-23 06:03:08 +0000 | [diff] [blame] | 1300 | return NETDEV_TX_OK; |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1301 | } |
| 1302 | |
| 1303 | static void enc28j60_tx_work_handler(struct work_struct *work) |
| 1304 | { |
| 1305 | struct enc28j60_net *priv = |
| 1306 | container_of(work, struct enc28j60_net, tx_work); |
| 1307 | |
| 1308 | /* actual delivery of data */ |
| 1309 | enc28j60_hw_tx(priv); |
| 1310 | } |
| 1311 | |
| 1312 | static irqreturn_t enc28j60_irq(int irq, void *dev_id) |
| 1313 | { |
| 1314 | struct enc28j60_net *priv = dev_id; |
| 1315 | |
| 1316 | /* |
| 1317 | * Can't do anything in interrupt context because we need to |
| 1318 | * block (spi_sync() is blocking) so fire of the interrupt |
| 1319 | * handling workqueue. |
| 1320 | * Remember that we access enc28j60 registers through SPI bus |
| 1321 | * via spi_sync() call. |
| 1322 | */ |
| 1323 | schedule_work(&priv->irq_work); |
| 1324 | |
| 1325 | return IRQ_HANDLED; |
| 1326 | } |
| 1327 | |
| 1328 | static void enc28j60_tx_timeout(struct net_device *ndev) |
| 1329 | { |
| 1330 | struct enc28j60_net *priv = netdev_priv(ndev); |
| 1331 | |
| 1332 | if (netif_msg_timer(priv)) |
| 1333 | dev_err(&ndev->dev, DRV_NAME " tx timeout\n"); |
| 1334 | |
| 1335 | ndev->stats.tx_errors++; |
| 1336 | /* can't restart safely under softirq */ |
| 1337 | schedule_work(&priv->restart_work); |
| 1338 | } |
| 1339 | |
| 1340 | /* |
| 1341 | * Open/initialize the board. This is called (in the current kernel) |
| 1342 | * sometime after booting when the 'ifconfig' program is run. |
| 1343 | * |
| 1344 | * This routine should set everything up anew at each open, even |
| 1345 | * registers that "should" only need to be set once at boot, so that |
| 1346 | * there is non-reboot way to recover if something goes wrong. |
| 1347 | */ |
| 1348 | static int enc28j60_net_open(struct net_device *dev) |
| 1349 | { |
| 1350 | struct enc28j60_net *priv = netdev_priv(dev); |
| 1351 | |
| 1352 | if (netif_msg_drv(priv)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 1353 | printk(KERN_DEBUG DRV_NAME ": %s() enter\n", __func__); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1354 | |
| 1355 | if (!is_valid_ether_addr(dev->dev_addr)) { |
Johannes Berg | e174961 | 2008-10-27 15:59:26 -0700 | [diff] [blame] | 1356 | if (netif_msg_ifup(priv)) |
| 1357 | dev_err(&dev->dev, "invalid MAC address %pM\n", |
| 1358 | dev->dev_addr); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1359 | return -EADDRNOTAVAIL; |
| 1360 | } |
David Brownell | 7dac6f8 | 2008-06-12 21:38:06 -0700 | [diff] [blame] | 1361 | /* Reset the hardware here (and take it out of low power mode) */ |
| 1362 | enc28j60_lowpower(priv, false); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1363 | enc28j60_hw_disable(priv); |
| 1364 | if (!enc28j60_hw_init(priv)) { |
| 1365 | if (netif_msg_ifup(priv)) |
| 1366 | dev_err(&dev->dev, "hw_reset() failed\n"); |
| 1367 | return -EINVAL; |
| 1368 | } |
| 1369 | /* Update the MAC address (in case user has changed it) */ |
| 1370 | enc28j60_set_hw_macaddr(dev); |
| 1371 | /* Enable interrupts */ |
| 1372 | enc28j60_hw_enable(priv); |
| 1373 | /* check link status */ |
| 1374 | enc28j60_check_link_status(dev); |
| 1375 | /* We are now ready to accept transmit requests from |
| 1376 | * the queueing layer of the networking. |
| 1377 | */ |
| 1378 | netif_start_queue(dev); |
| 1379 | |
| 1380 | return 0; |
| 1381 | } |
| 1382 | |
| 1383 | /* The inverse routine to net_open(). */ |
| 1384 | static int enc28j60_net_close(struct net_device *dev) |
| 1385 | { |
| 1386 | struct enc28j60_net *priv = netdev_priv(dev); |
| 1387 | |
| 1388 | if (netif_msg_drv(priv)) |
Harvey Harrison | b39d66a | 2008-08-20 16:52:04 -0700 | [diff] [blame] | 1389 | printk(KERN_DEBUG DRV_NAME ": %s() enter\n", __func__); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1390 | |
| 1391 | enc28j60_hw_disable(priv); |
David Brownell | 7dac6f8 | 2008-06-12 21:38:06 -0700 | [diff] [blame] | 1392 | enc28j60_lowpower(priv, true); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1393 | netif_stop_queue(dev); |
| 1394 | |
| 1395 | return 0; |
| 1396 | } |
| 1397 | |
| 1398 | /* |
| 1399 | * Set or clear the multicast filter for this adapter |
| 1400 | * num_addrs == -1 Promiscuous mode, receive all packets |
| 1401 | * num_addrs == 0 Normal mode, filter out multicast packets |
| 1402 | * num_addrs > 0 Multicast mode, receive normal and MC packets |
| 1403 | */ |
| 1404 | static void enc28j60_set_multicast_list(struct net_device *dev) |
| 1405 | { |
| 1406 | struct enc28j60_net *priv = netdev_priv(dev); |
| 1407 | int oldfilter = priv->rxfilter; |
| 1408 | |
| 1409 | if (dev->flags & IFF_PROMISC) { |
| 1410 | if (netif_msg_link(priv)) |
| 1411 | dev_info(&dev->dev, "promiscuous mode\n"); |
| 1412 | priv->rxfilter = RXFILTER_PROMISC; |
Jiri Pirko | 4cd24ea | 2010-02-08 04:30:35 +0000 | [diff] [blame] | 1413 | } else if ((dev->flags & IFF_ALLMULTI) || !netdev_mc_empty(dev)) { |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1414 | if (netif_msg_link(priv)) |
| 1415 | dev_info(&dev->dev, "%smulticast mode\n", |
| 1416 | (dev->flags & IFF_ALLMULTI) ? "all-" : ""); |
| 1417 | priv->rxfilter = RXFILTER_MULTI; |
| 1418 | } else { |
| 1419 | if (netif_msg_link(priv)) |
| 1420 | dev_info(&dev->dev, "normal mode\n"); |
| 1421 | priv->rxfilter = RXFILTER_NORMAL; |
| 1422 | } |
| 1423 | |
| 1424 | if (oldfilter != priv->rxfilter) |
| 1425 | schedule_work(&priv->setrx_work); |
| 1426 | } |
| 1427 | |
| 1428 | static void enc28j60_setrx_work_handler(struct work_struct *work) |
| 1429 | { |
| 1430 | struct enc28j60_net *priv = |
| 1431 | container_of(work, struct enc28j60_net, setrx_work); |
| 1432 | |
| 1433 | if (priv->rxfilter == RXFILTER_PROMISC) { |
| 1434 | if (netif_msg_drv(priv)) |
| 1435 | printk(KERN_DEBUG DRV_NAME ": promiscuous mode\n"); |
| 1436 | locked_regb_write(priv, ERXFCON, 0x00); |
| 1437 | } else if (priv->rxfilter == RXFILTER_MULTI) { |
| 1438 | if (netif_msg_drv(priv)) |
| 1439 | printk(KERN_DEBUG DRV_NAME ": multicast mode\n"); |
| 1440 | locked_regb_write(priv, ERXFCON, |
| 1441 | ERXFCON_UCEN | ERXFCON_CRCEN | |
| 1442 | ERXFCON_BCEN | ERXFCON_MCEN); |
| 1443 | } else { |
| 1444 | if (netif_msg_drv(priv)) |
| 1445 | printk(KERN_DEBUG DRV_NAME ": normal mode\n"); |
| 1446 | locked_regb_write(priv, ERXFCON, |
| 1447 | ERXFCON_UCEN | ERXFCON_CRCEN | |
| 1448 | ERXFCON_BCEN); |
| 1449 | } |
| 1450 | } |
| 1451 | |
| 1452 | static void enc28j60_restart_work_handler(struct work_struct *work) |
| 1453 | { |
| 1454 | struct enc28j60_net *priv = |
| 1455 | container_of(work, struct enc28j60_net, restart_work); |
| 1456 | struct net_device *ndev = priv->netdev; |
| 1457 | int ret; |
| 1458 | |
| 1459 | rtnl_lock(); |
| 1460 | if (netif_running(ndev)) { |
| 1461 | enc28j60_net_close(ndev); |
| 1462 | ret = enc28j60_net_open(ndev); |
| 1463 | if (unlikely(ret)) { |
| 1464 | dev_info(&ndev->dev, " could not restart %d\n", ret); |
| 1465 | dev_close(ndev); |
| 1466 | } |
| 1467 | } |
| 1468 | rtnl_unlock(); |
| 1469 | } |
| 1470 | |
| 1471 | /* ......................... ETHTOOL SUPPORT ........................... */ |
| 1472 | |
| 1473 | static void |
| 1474 | enc28j60_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
| 1475 | { |
| 1476 | strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); |
| 1477 | strlcpy(info->version, DRV_VERSION, sizeof(info->version)); |
| 1478 | strlcpy(info->bus_info, |
Kay Sievers | fb28ad3 | 2008-11-10 13:55:14 -0800 | [diff] [blame] | 1479 | dev_name(dev->dev.parent), sizeof(info->bus_info)); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1480 | } |
| 1481 | |
| 1482 | static int |
| 1483 | enc28j60_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 1484 | { |
| 1485 | struct enc28j60_net *priv = netdev_priv(dev); |
| 1486 | |
| 1487 | cmd->transceiver = XCVR_INTERNAL; |
| 1488 | cmd->supported = SUPPORTED_10baseT_Half |
| 1489 | | SUPPORTED_10baseT_Full |
| 1490 | | SUPPORTED_TP; |
David Decotigny | 7073949 | 2011-04-27 18:32:40 +0000 | [diff] [blame] | 1491 | ethtool_cmd_speed_set(cmd, SPEED_10); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1492 | cmd->duplex = priv->full_duplex ? DUPLEX_FULL : DUPLEX_HALF; |
| 1493 | cmd->port = PORT_TP; |
| 1494 | cmd->autoneg = AUTONEG_DISABLE; |
| 1495 | |
| 1496 | return 0; |
| 1497 | } |
| 1498 | |
| 1499 | static int |
| 1500 | enc28j60_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 1501 | { |
David Decotigny | 25db033 | 2011-04-27 18:32:39 +0000 | [diff] [blame] | 1502 | return enc28j60_setlink(dev, cmd->autoneg, |
| 1503 | ethtool_cmd_speed(cmd), cmd->duplex); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1504 | } |
| 1505 | |
| 1506 | static u32 enc28j60_get_msglevel(struct net_device *dev) |
| 1507 | { |
| 1508 | struct enc28j60_net *priv = netdev_priv(dev); |
| 1509 | return priv->msg_enable; |
| 1510 | } |
| 1511 | |
| 1512 | static void enc28j60_set_msglevel(struct net_device *dev, u32 val) |
| 1513 | { |
| 1514 | struct enc28j60_net *priv = netdev_priv(dev); |
| 1515 | priv->msg_enable = val; |
| 1516 | } |
| 1517 | |
| 1518 | static const struct ethtool_ops enc28j60_ethtool_ops = { |
| 1519 | .get_settings = enc28j60_get_settings, |
| 1520 | .set_settings = enc28j60_set_settings, |
| 1521 | .get_drvinfo = enc28j60_get_drvinfo, |
| 1522 | .get_msglevel = enc28j60_get_msglevel, |
| 1523 | .set_msglevel = enc28j60_set_msglevel, |
| 1524 | }; |
| 1525 | |
| 1526 | static int enc28j60_chipset_init(struct net_device *dev) |
| 1527 | { |
| 1528 | struct enc28j60_net *priv = netdev_priv(dev); |
| 1529 | |
| 1530 | return enc28j60_hw_init(priv); |
| 1531 | } |
| 1532 | |
Stephen Hemminger | 1f5ec79 | 2009-01-07 17:30:09 -0800 | [diff] [blame] | 1533 | static const struct net_device_ops enc28j60_netdev_ops = { |
| 1534 | .ndo_open = enc28j60_net_open, |
| 1535 | .ndo_stop = enc28j60_net_close, |
| 1536 | .ndo_start_xmit = enc28j60_send_packet, |
Jiri Pirko | afc4b13 | 2011-08-16 06:29:01 +0000 | [diff] [blame] | 1537 | .ndo_set_rx_mode = enc28j60_set_multicast_list, |
Stephen Hemminger | 1f5ec79 | 2009-01-07 17:30:09 -0800 | [diff] [blame] | 1538 | .ndo_set_mac_address = enc28j60_set_mac_address, |
| 1539 | .ndo_tx_timeout = enc28j60_tx_timeout, |
| 1540 | .ndo_change_mtu = eth_change_mtu, |
| 1541 | .ndo_validate_addr = eth_validate_addr, |
| 1542 | }; |
| 1543 | |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1544 | static int __devinit enc28j60_probe(struct spi_device *spi) |
| 1545 | { |
| 1546 | struct net_device *dev; |
| 1547 | struct enc28j60_net *priv; |
| 1548 | int ret = 0; |
| 1549 | |
| 1550 | if (netif_msg_drv(&debug)) |
| 1551 | dev_info(&spi->dev, DRV_NAME " Ethernet driver %s loaded\n", |
| 1552 | DRV_VERSION); |
| 1553 | |
| 1554 | dev = alloc_etherdev(sizeof(struct enc28j60_net)); |
| 1555 | if (!dev) { |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1556 | ret = -ENOMEM; |
| 1557 | goto error_alloc; |
| 1558 | } |
| 1559 | priv = netdev_priv(dev); |
| 1560 | |
| 1561 | priv->netdev = dev; /* priv to netdev reference */ |
| 1562 | priv->spi = spi; /* priv to spi reference */ |
| 1563 | priv->msg_enable = netif_msg_init(debug.msg_enable, |
| 1564 | ENC28J60_MSG_DEFAULT); |
| 1565 | mutex_init(&priv->lock); |
| 1566 | INIT_WORK(&priv->tx_work, enc28j60_tx_work_handler); |
| 1567 | INIT_WORK(&priv->setrx_work, enc28j60_setrx_work_handler); |
| 1568 | INIT_WORK(&priv->irq_work, enc28j60_irq_work_handler); |
| 1569 | INIT_WORK(&priv->restart_work, enc28j60_restart_work_handler); |
| 1570 | dev_set_drvdata(&spi->dev, priv); /* spi to priv reference */ |
| 1571 | SET_NETDEV_DEV(dev, &spi->dev); |
| 1572 | |
| 1573 | if (!enc28j60_chipset_init(dev)) { |
| 1574 | if (netif_msg_probe(priv)) |
| 1575 | dev_info(&spi->dev, DRV_NAME " chip not found\n"); |
| 1576 | ret = -EIO; |
| 1577 | goto error_irq; |
| 1578 | } |
Danny Kukawka | 7ce5d22 | 2012-02-15 06:45:40 +0000 | [diff] [blame] | 1579 | eth_hw_addr_random(dev); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1580 | enc28j60_set_hw_macaddr(dev); |
| 1581 | |
David Brownell | c7b7b04 | 2008-07-24 17:47:56 -0700 | [diff] [blame] | 1582 | /* Board setup must set the relevant edge trigger type; |
| 1583 | * level triggers won't currently work. |
| 1584 | */ |
| 1585 | ret = request_irq(spi->irq, enc28j60_irq, 0, DRV_NAME, priv); |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1586 | if (ret < 0) { |
| 1587 | if (netif_msg_probe(priv)) |
| 1588 | dev_err(&spi->dev, DRV_NAME ": request irq %d failed " |
| 1589 | "(ret = %d)\n", spi->irq, ret); |
| 1590 | goto error_irq; |
| 1591 | } |
| 1592 | |
| 1593 | dev->if_port = IF_PORT_10BASET; |
| 1594 | dev->irq = spi->irq; |
Stephen Hemminger | 1f5ec79 | 2009-01-07 17:30:09 -0800 | [diff] [blame] | 1595 | dev->netdev_ops = &enc28j60_netdev_ops; |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1596 | dev->watchdog_timeo = TX_TIMEOUT; |
| 1597 | SET_ETHTOOL_OPS(dev, &enc28j60_ethtool_ops); |
| 1598 | |
David Brownell | 7dac6f8 | 2008-06-12 21:38:06 -0700 | [diff] [blame] | 1599 | enc28j60_lowpower(priv, true); |
| 1600 | |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1601 | ret = register_netdev(dev); |
| 1602 | if (ret) { |
| 1603 | if (netif_msg_probe(priv)) |
| 1604 | dev_err(&spi->dev, "register netdev " DRV_NAME |
| 1605 | " failed (ret = %d)\n", ret); |
| 1606 | goto error_register; |
| 1607 | } |
| 1608 | dev_info(&dev->dev, DRV_NAME " driver registered\n"); |
| 1609 | |
| 1610 | return 0; |
| 1611 | |
| 1612 | error_register: |
| 1613 | free_irq(spi->irq, priv); |
| 1614 | error_irq: |
| 1615 | free_netdev(dev); |
| 1616 | error_alloc: |
| 1617 | return ret; |
| 1618 | } |
| 1619 | |
David Brownell | 6fd6588 | 2008-06-12 21:36:24 -0700 | [diff] [blame] | 1620 | static int __devexit enc28j60_remove(struct spi_device *spi) |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1621 | { |
| 1622 | struct enc28j60_net *priv = dev_get_drvdata(&spi->dev); |
| 1623 | |
| 1624 | if (netif_msg_drv(priv)) |
| 1625 | printk(KERN_DEBUG DRV_NAME ": remove\n"); |
| 1626 | |
| 1627 | unregister_netdev(priv->netdev); |
| 1628 | free_irq(spi->irq, priv); |
| 1629 | free_netdev(priv->netdev); |
| 1630 | |
| 1631 | return 0; |
| 1632 | } |
| 1633 | |
| 1634 | static struct spi_driver enc28j60_driver = { |
| 1635 | .driver = { |
| 1636 | .name = DRV_NAME, |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1637 | .owner = THIS_MODULE, |
David Brownell | 6fd6588 | 2008-06-12 21:36:24 -0700 | [diff] [blame] | 1638 | }, |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1639 | .probe = enc28j60_probe, |
| 1640 | .remove = __devexit_p(enc28j60_remove), |
| 1641 | }; |
| 1642 | |
| 1643 | static int __init enc28j60_init(void) |
| 1644 | { |
David Brownell | 7dac6f8 | 2008-06-12 21:38:06 -0700 | [diff] [blame] | 1645 | msec20_to_jiffies = msecs_to_jiffies(20); |
| 1646 | |
Claudio Lanconelli | 3ec9c11 | 2008-01-14 11:00:28 +0100 | [diff] [blame] | 1647 | return spi_register_driver(&enc28j60_driver); |
| 1648 | } |
| 1649 | |
| 1650 | module_init(enc28j60_init); |
| 1651 | |
| 1652 | static void __exit enc28j60_exit(void) |
| 1653 | { |
| 1654 | spi_unregister_driver(&enc28j60_driver); |
| 1655 | } |
| 1656 | |
| 1657 | module_exit(enc28j60_exit); |
| 1658 | |
| 1659 | MODULE_DESCRIPTION(DRV_NAME " ethernet driver"); |
| 1660 | MODULE_AUTHOR("Claudio Lanconelli <lanconelli.claudio@eptar.com>"); |
| 1661 | MODULE_LICENSE("GPL"); |
| 1662 | module_param_named(debug, debug.msg_enable, int, 0); |
| 1663 | MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., ffff=all)"); |
Anton Vorontsov | e0626e3 | 2009-09-22 16:46:08 -0700 | [diff] [blame] | 1664 | MODULE_ALIAS("spi:" DRV_NAME); |