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Pete Popove3ad1c22005-03-01 06:33:16 +00001/*
2 * BRIEF MODULE DESCRIPTION
3 * Au1xxx irq map table
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25#include <linux/errno.h>
26#include <linux/init.h>
27#include <linux/irq.h>
28#include <linux/kernel_stat.h>
29#include <linux/module.h>
30#include <linux/signal.h>
31#include <linux/sched.h>
32#include <linux/types.h>
33#include <linux/interrupt.h>
34#include <linux/ioport.h>
35#include <linux/timex.h>
36#include <linux/slab.h>
37#include <linux/random.h>
38#include <linux/delay.h>
Jiri Slaby1977f032007-10-18 23:40:25 -070039#include <linux/bitops.h>
Pete Popove3ad1c22005-03-01 06:33:16 +000040
Pete Popove3ad1c22005-03-01 06:33:16 +000041#include <asm/bootinfo.h>
42#include <asm/io.h>
43#include <asm/mipsregs.h>
44#include <asm/system.h>
45#include <asm/mach-au1x00/au1000.h>
46
47#ifdef CONFIG_MIPS_PB1200
48#include <asm/mach-pb1x00/pb1200.h>
49#endif
50
51#ifdef CONFIG_MIPS_DB1200
52#include <asm/mach-db1x00/db1200.h>
53#define PB1200_INT_BEGIN DB1200_INT_BEGIN
54#define PB1200_INT_END DB1200_INT_END
55#endif
56
Ralf Baechle0e6799e2007-10-15 01:07:39 +010057struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
Pete Popove3ad1c22005-03-01 06:33:16 +000058 { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
59};
60
Herbert Valerio Riedela643d2b2006-05-07 15:48:25 +020061int __initdata au1xxx_nr_irqs = ARRAY_SIZE(au1xxx_irq_map);
Pete Popove3ad1c22005-03-01 06:33:16 +000062
63/*
64 * Support for External interrupts on the PbAu1200 Development platform.
65 */
66static volatile int pb1200_cascade_en=0;
67
Ralf Baechle937a8012006-10-07 19:44:33 +010068irqreturn_t pb1200_cascade_handler( int irq, void *dev_id)
Pete Popove3ad1c22005-03-01 06:33:16 +000069{
70 unsigned short bisr = bcsr->int_status;
71 int extirq_nr = 0;
72
73 /* Clear all the edge interrupts. This has no effect on level */
74 bcsr->int_status = bisr;
75 for( ; bisr; bisr &= (bisr-1) )
76 {
Ralf Baechle820b2d82007-10-17 15:37:44 +010077 extirq_nr = PB1200_INT_BEGIN + ffs(bisr);
Pete Popove3ad1c22005-03-01 06:33:16 +000078 /* Ack and dispatch IRQ */
Ralf Baechle937a8012006-10-07 19:44:33 +010079 do_IRQ(extirq_nr);
Pete Popove3ad1c22005-03-01 06:33:16 +000080 }
Ralf Baechle937a8012006-10-07 19:44:33 +010081
Pete Popov26a940e2005-09-15 08:03:12 +000082 return IRQ_RETVAL(1);
Pete Popove3ad1c22005-03-01 06:33:16 +000083}
84
85inline void pb1200_enable_irq(unsigned int irq_nr)
86{
87 bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
88 bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
89}
90
91inline void pb1200_disable_irq(unsigned int irq_nr)
92{
93 bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
94 bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
95}
96
Ralf Baechledb0c19e2007-11-01 12:59:18 +000097static unsigned int pb1200_setup_cascade(void)
Pete Popove3ad1c22005-03-01 06:33:16 +000098{
Ralf Baechledb0c19e2007-11-01 12:59:18 +000099 int err;
100
101 err = request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
102 0, "Pb1200 Cascade", &pb1200_cascade_handler);
103 if (err)
104 return err;
105
Pete Popove3ad1c22005-03-01 06:33:16 +0000106 return 0;
107}
108
Ralf Baechledb0c19e2007-11-01 12:59:18 +0000109static unsigned int pb1200_startup_irq(unsigned int irq)
Pete Popove3ad1c22005-03-01 06:33:16 +0000110{
Ralf Baechledb0c19e2007-11-01 12:59:18 +0000111 if (++pb1200_cascade_en == 1) {
112 int res;
113
114 res = pb1200_setup_cascade();
115 if (res)
116 return res;
Pete Popove3ad1c22005-03-01 06:33:16 +0000117 }
Ralf Baechledb0c19e2007-11-01 12:59:18 +0000118
119 pb1200_enable_irq(irq);
120
121 return 0;
Pete Popove3ad1c22005-03-01 06:33:16 +0000122}
123
Ralf Baechledb0c19e2007-11-01 12:59:18 +0000124static void pb1200_shutdown_irq(unsigned int irq)
Pete Popove3ad1c22005-03-01 06:33:16 +0000125{
Ralf Baechledb0c19e2007-11-01 12:59:18 +0000126 pb1200_disable_irq(irq);
127 if (--pb1200_cascade_en == 0)
128 free_irq(AU1000_GPIO_7, &pb1200_cascade_handler);
129}
130
131static struct irq_chip external_irq_type = {
Pete Popove3ad1c22005-03-01 06:33:16 +0000132#ifdef CONFIG_MIPS_PB1200
Atsushi Nemoto19487f12007-02-04 00:57:25 +0900133 .name = "Pb1200 Ext",
Pete Popove3ad1c22005-03-01 06:33:16 +0000134#endif
135#ifdef CONFIG_MIPS_DB1200
Atsushi Nemoto19487f12007-02-04 00:57:25 +0900136 .name = "Db1200 Ext",
Pete Popove3ad1c22005-03-01 06:33:16 +0000137#endif
Atsushi Nemoto19487f12007-02-04 00:57:25 +0900138 .startup = pb1200_startup_irq,
139 .shutdown = pb1200_shutdown_irq,
140 .ack = pb1200_disable_irq,
141 .mask = pb1200_disable_irq,
142 .mask_ack = pb1200_disable_irq,
143 .unmask = pb1200_enable_irq,
Pete Popove3ad1c22005-03-01 06:33:16 +0000144};
145
146void _board_init_irq(void)
147{
Ralf Baechledb0c19e2007-11-01 12:59:18 +0000148 unsigned int irq;
Pete Popove3ad1c22005-03-01 06:33:16 +0000149
Ralf Baechledb0c19e2007-11-01 12:59:18 +0000150#ifdef CONFIG_MIPS_PB1200
151 /* We have a problem with CPLD rev3. Enable a workaround */
152 if (((bcsr->whoami & BCSR_WHOAMI_CPLD) >> 4) <= 3) {
153 printk("\nWARNING!!!\n");
154 printk("\nWARNING!!!\n");
155 printk("\nWARNING!!!\n");
156 printk("\nWARNING!!!\n");
157 printk("\nWARNING!!!\n");
158 printk("\nWARNING!!!\n");
159 printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
160 printk("updated to latest revision. This software will not\n");
161 printk("work on anything less than CPLD rev4\n");
162 printk("\nWARNING!!!\n");
163 printk("\nWARNING!!!\n");
164 printk("\nWARNING!!!\n");
165 printk("\nWARNING!!!\n");
166 printk("\nWARNING!!!\n");
167 printk("\nWARNING!!!\n");
168 panic("Game over. Your score is 0.");
169 }
170#endif
171
172 for (irq = PB1200_INT_BEGIN; irq <= PB1200_INT_END; irq++) {
173 set_irq_chip_and_handler(irq, &external_irq_type,
Atsushi Nemoto19487f12007-02-04 00:57:25 +0900174 handle_level_irq);
Ralf Baechledb0c19e2007-11-01 12:59:18 +0000175 pb1200_disable_irq(irq);
Pete Popove3ad1c22005-03-01 06:33:16 +0000176 }
177
Ralf Baechledb0c19e2007-11-01 12:59:18 +0000178 /*
179 * GPIO_7 can not be hooked here, so it is hooked upon first
180 * request of any source attached to the cascade
181 */
Pete Popove3ad1c22005-03-01 06:33:16 +0000182}