Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * For documentation on the i460 AGP interface, see Chapter 7 (AGP Subsystem) of |
| 3 | * the "Intel 460GTX Chipset Software Developer's Manual": |
| 4 | * http://developer.intel.com/design/itanium/downloads/24870401s.htm |
| 5 | */ |
| 6 | /* |
| 7 | * 460GX support by Chris Ahna <christopher.j.ahna@intel.com> |
| 8 | * Clean up & simplification by David Mosberger-Tang <davidm@hpl.hp.com> |
| 9 | */ |
| 10 | #include <linux/module.h> |
| 11 | #include <linux/pci.h> |
| 12 | #include <linux/init.h> |
Tim Schmielau | 4e57b68 | 2005-10-30 15:03:48 -0800 | [diff] [blame] | 13 | #include <linux/string.h> |
| 14 | #include <linux/slab.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | #include <linux/agp_backend.h> |
Fengguang Wu | e57aa83 | 2007-10-16 23:26:25 -0700 | [diff] [blame] | 16 | #include <linux/log2.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | |
| 18 | #include "agp.h" |
| 19 | |
| 20 | #define INTEL_I460_BAPBASE 0x98 |
| 21 | #define INTEL_I460_GXBCTL 0xa0 |
| 22 | #define INTEL_I460_AGPSIZ 0xa2 |
| 23 | #define INTEL_I460_ATTBASE 0xfe200000 |
| 24 | #define INTEL_I460_GATT_VALID (1UL << 24) |
| 25 | #define INTEL_I460_GATT_COHERENT (1UL << 25) |
| 26 | |
| 27 | /* |
| 28 | * The i460 can operate with large (4MB) pages, but there is no sane way to support this |
| 29 | * within the current kernel/DRM environment, so we disable the relevant code for now. |
| 30 | * See also comments in ia64_alloc_page()... |
| 31 | */ |
| 32 | #define I460_LARGE_IO_PAGES 0 |
| 33 | |
| 34 | #if I460_LARGE_IO_PAGES |
| 35 | # define I460_IO_PAGE_SHIFT i460.io_page_shift |
| 36 | #else |
| 37 | # define I460_IO_PAGE_SHIFT 12 |
| 38 | #endif |
| 39 | |
| 40 | #define I460_IOPAGES_PER_KPAGE (PAGE_SIZE >> I460_IO_PAGE_SHIFT) |
| 41 | #define I460_KPAGES_PER_IOPAGE (1 << (I460_IO_PAGE_SHIFT - PAGE_SHIFT)) |
| 42 | #define I460_SRAM_IO_DISABLE (1 << 4) |
| 43 | #define I460_BAPBASE_ENABLE (1 << 3) |
| 44 | #define I460_AGPSIZ_MASK 0x7 |
| 45 | #define I460_4M_PS (1 << 1) |
| 46 | |
| 47 | /* Control bits for Out-Of-GART coherency and Burst Write Combining */ |
| 48 | #define I460_GXBCTL_OOG (1UL << 0) |
| 49 | #define I460_GXBCTL_BWC (1UL << 2) |
| 50 | |
| 51 | /* |
| 52 | * gatt_table entries are 32-bits wide on the i460; the generic code ought to declare the |
| 53 | * gatt_table and gatt_table_real pointers a "void *"... |
| 54 | */ |
| 55 | #define RD_GATT(index) readl((u32 *) i460.gatt + (index)) |
| 56 | #define WR_GATT(index, val) writel((val), (u32 *) i460.gatt + (index)) |
| 57 | /* |
| 58 | * The 460 spec says we have to read the last location written to make sure that all |
| 59 | * writes have taken effect |
| 60 | */ |
| 61 | #define WR_FLUSH_GATT(index) RD_GATT(index) |
| 62 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | static struct { |
| 64 | void *gatt; /* ioremap'd GATT area */ |
| 65 | |
| 66 | /* i460 supports multiple GART page sizes, so GART pageshift is dynamic: */ |
| 67 | u8 io_page_shift; |
| 68 | |
| 69 | /* BIOS configures chipset to one of 2 possible apbase values: */ |
| 70 | u8 dynamic_apbase; |
| 71 | |
| 72 | /* structure for tracking partial use of 4MB GART pages: */ |
| 73 | struct lp_desc { |
| 74 | unsigned long *alloced_map; /* bitmap of kernel-pages in use */ |
| 75 | int refcount; /* number of kernel pages using the large page */ |
| 76 | u64 paddr; /* physical address of large page */ |
| 77 | } *lp_desc; |
| 78 | } i460; |
| 79 | |
Dave Jones | e5524f3 | 2007-02-22 18:41:28 -0500 | [diff] [blame] | 80 | static const struct aper_size_info_8 i460_sizes[3] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | { |
| 82 | /* |
| 83 | * The 32GB aperture is only available with a 4M GART page size. Due to the |
| 84 | * dynamic GART page size, we can't figure out page_order or num_entries until |
| 85 | * runtime. |
| 86 | */ |
| 87 | {32768, 0, 0, 4}, |
| 88 | {1024, 0, 0, 2}, |
| 89 | {256, 0, 0, 1} |
| 90 | }; |
| 91 | |
| 92 | static struct gatt_mask i460_masks[] = |
| 93 | { |
| 94 | { |
| 95 | .mask = INTEL_I460_GATT_VALID | INTEL_I460_GATT_COHERENT, |
| 96 | .type = 0 |
| 97 | } |
| 98 | }; |
| 99 | |
| 100 | static int i460_fetch_size (void) |
| 101 | { |
| 102 | int i; |
| 103 | u8 temp; |
| 104 | struct aper_size_info_8 *values; |
| 105 | |
| 106 | /* Determine the GART page size */ |
| 107 | pci_read_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, &temp); |
| 108 | i460.io_page_shift = (temp & I460_4M_PS) ? 22 : 12; |
| 109 | pr_debug("i460_fetch_size: io_page_shift=%d\n", i460.io_page_shift); |
| 110 | |
| 111 | if (i460.io_page_shift != I460_IO_PAGE_SHIFT) { |
| 112 | printk(KERN_ERR PFX |
Andrew Morton | 49ebd7c | 2005-11-06 23:35:35 -0800 | [diff] [blame] | 113 | "I/O (GART) page-size %luKB doesn't match expected " |
| 114 | "size %luKB\n", |
| 115 | 1UL << (i460.io_page_shift - 10), |
| 116 | 1UL << (I460_IO_PAGE_SHIFT)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 117 | return 0; |
| 118 | } |
| 119 | |
| 120 | values = A_SIZE_8(agp_bridge->driver->aperture_sizes); |
| 121 | |
| 122 | pci_read_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, &temp); |
| 123 | |
| 124 | /* Exit now if the IO drivers for the GART SRAMS are turned off */ |
| 125 | if (temp & I460_SRAM_IO_DISABLE) { |
| 126 | printk(KERN_ERR PFX "GART SRAMS disabled on 460GX chipset\n"); |
| 127 | printk(KERN_ERR PFX "AGPGART operation not possible\n"); |
| 128 | return 0; |
| 129 | } |
| 130 | |
| 131 | /* Make sure we don't try to create an 2 ^ 23 entry GATT */ |
| 132 | if ((i460.io_page_shift == 0) && ((temp & I460_AGPSIZ_MASK) == 4)) { |
| 133 | printk(KERN_ERR PFX "We can't have a 32GB aperture with 4KB GART pages\n"); |
| 134 | return 0; |
| 135 | } |
| 136 | |
| 137 | /* Determine the proper APBASE register */ |
| 138 | if (temp & I460_BAPBASE_ENABLE) |
| 139 | i460.dynamic_apbase = INTEL_I460_BAPBASE; |
| 140 | else |
| 141 | i460.dynamic_apbase = AGP_APBASE; |
| 142 | |
| 143 | for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) { |
| 144 | /* |
| 145 | * Dynamically calculate the proper num_entries and page_order values for |
| 146 | * the define aperture sizes. Take care not to shift off the end of |
| 147 | * values[i].size. |
| 148 | */ |
| 149 | values[i].num_entries = (values[i].size << 8) >> (I460_IO_PAGE_SHIFT - 12); |
Fengguang Wu | e57aa83 | 2007-10-16 23:26:25 -0700 | [diff] [blame] | 150 | values[i].page_order = ilog2((sizeof(u32)*values[i].num_entries) >> PAGE_SHIFT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | } |
| 152 | |
| 153 | for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) { |
| 154 | /* Neglect control bits when matching up size_value */ |
| 155 | if ((temp & I460_AGPSIZ_MASK) == values[i].size_value) { |
| 156 | agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i); |
| 157 | agp_bridge->aperture_size_idx = i; |
| 158 | return values[i].size; |
| 159 | } |
| 160 | } |
| 161 | |
| 162 | return 0; |
| 163 | } |
| 164 | |
| 165 | /* There isn't anything to do here since 460 has no GART TLB. */ |
| 166 | static void i460_tlb_flush (struct agp_memory *mem) |
| 167 | { |
| 168 | return; |
| 169 | } |
| 170 | |
| 171 | /* |
| 172 | * This utility function is needed to prevent corruption of the control bits |
| 173 | * which are stored along with the aperture size in 460's AGPSIZ register |
| 174 | */ |
| 175 | static void i460_write_agpsiz (u8 size_value) |
| 176 | { |
| 177 | u8 temp; |
| 178 | |
| 179 | pci_read_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, &temp); |
| 180 | pci_write_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, |
| 181 | ((temp & ~I460_AGPSIZ_MASK) | size_value)); |
| 182 | } |
| 183 | |
| 184 | static void i460_cleanup (void) |
| 185 | { |
| 186 | struct aper_size_info_8 *previous_size; |
| 187 | |
| 188 | previous_size = A_SIZE_8(agp_bridge->previous_size); |
| 189 | i460_write_agpsiz(previous_size->size_value); |
| 190 | |
| 191 | if (I460_IO_PAGE_SHIFT > PAGE_SHIFT) |
| 192 | kfree(i460.lp_desc); |
| 193 | } |
| 194 | |
| 195 | static int i460_configure (void) |
| 196 | { |
| 197 | union { |
| 198 | u32 small[2]; |
| 199 | u64 large; |
| 200 | } temp; |
| 201 | size_t size; |
| 202 | u8 scratch; |
| 203 | struct aper_size_info_8 *current_size; |
| 204 | |
| 205 | temp.large = 0; |
| 206 | |
| 207 | current_size = A_SIZE_8(agp_bridge->current_size); |
| 208 | i460_write_agpsiz(current_size->size_value); |
| 209 | |
| 210 | /* |
| 211 | * Do the necessary rigmarole to read all eight bytes of APBASE. |
| 212 | * This has to be done since the AGP aperture can be above 4GB on |
| 213 | * 460 based systems. |
| 214 | */ |
| 215 | pci_read_config_dword(agp_bridge->dev, i460.dynamic_apbase, &(temp.small[0])); |
| 216 | pci_read_config_dword(agp_bridge->dev, i460.dynamic_apbase + 4, &(temp.small[1])); |
| 217 | |
| 218 | /* Clear BAR control bits */ |
| 219 | agp_bridge->gart_bus_addr = temp.large & ~((1UL << 3) - 1); |
| 220 | |
| 221 | pci_read_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, &scratch); |
| 222 | pci_write_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, |
| 223 | (scratch & 0x02) | I460_GXBCTL_OOG | I460_GXBCTL_BWC); |
| 224 | |
| 225 | /* |
| 226 | * Initialize partial allocation trackers if a GART page is bigger than a kernel |
| 227 | * page. |
| 228 | */ |
| 229 | if (I460_IO_PAGE_SHIFT > PAGE_SHIFT) { |
| 230 | size = current_size->num_entries * sizeof(i460.lp_desc[0]); |
Dave Jones | 0ea27d9 | 2005-10-20 15:12:16 -0700 | [diff] [blame] | 231 | i460.lp_desc = kzalloc(size, GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 232 | if (!i460.lp_desc) |
| 233 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | } |
| 235 | return 0; |
| 236 | } |
| 237 | |
| 238 | static int i460_create_gatt_table (struct agp_bridge_data *bridge) |
| 239 | { |
| 240 | int page_order, num_entries, i; |
| 241 | void *temp; |
| 242 | |
| 243 | /* |
| 244 | * Load up the fixed address of the GART SRAMS which hold our GATT table. |
| 245 | */ |
| 246 | temp = agp_bridge->current_size; |
| 247 | page_order = A_SIZE_8(temp)->page_order; |
| 248 | num_entries = A_SIZE_8(temp)->num_entries; |
| 249 | |
| 250 | i460.gatt = ioremap(INTEL_I460_ATTBASE, PAGE_SIZE << page_order); |
Scott Thompson | 5bdbc7d | 2007-08-25 18:14:00 +1000 | [diff] [blame] | 251 | if (!i460.gatt) { |
| 252 | printk(KERN_ERR PFX "ioremap failed\n"); |
| 253 | return -ENOMEM; |
| 254 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 255 | |
| 256 | /* These are no good, the should be removed from the agp_bridge strucure... */ |
| 257 | agp_bridge->gatt_table_real = NULL; |
| 258 | agp_bridge->gatt_table = NULL; |
| 259 | agp_bridge->gatt_bus_addr = 0; |
| 260 | |
| 261 | for (i = 0; i < num_entries; ++i) |
| 262 | WR_GATT(i, 0); |
| 263 | WR_FLUSH_GATT(i - 1); |
| 264 | return 0; |
| 265 | } |
| 266 | |
| 267 | static int i460_free_gatt_table (struct agp_bridge_data *bridge) |
| 268 | { |
| 269 | int num_entries, i; |
| 270 | void *temp; |
| 271 | |
| 272 | temp = agp_bridge->current_size; |
| 273 | |
| 274 | num_entries = A_SIZE_8(temp)->num_entries; |
| 275 | |
| 276 | for (i = 0; i < num_entries; ++i) |
| 277 | WR_GATT(i, 0); |
| 278 | WR_FLUSH_GATT(num_entries - 1); |
| 279 | |
| 280 | iounmap(i460.gatt); |
| 281 | return 0; |
| 282 | } |
| 283 | |
| 284 | /* |
| 285 | * The following functions are called when the I/O (GART) page size is smaller than |
| 286 | * PAGE_SIZE. |
| 287 | */ |
| 288 | |
| 289 | static int i460_insert_memory_small_io_page (struct agp_memory *mem, |
| 290 | off_t pg_start, int type) |
| 291 | { |
| 292 | unsigned long paddr, io_pg_start, io_page_size; |
| 293 | int i, j, k, num_entries; |
| 294 | void *temp; |
| 295 | |
| 296 | pr_debug("i460_insert_memory_small_io_page(mem=%p, pg_start=%ld, type=%d, paddr0=0x%lx)\n", |
| 297 | mem, pg_start, type, mem->memory[0]); |
| 298 | |
Thomas Hellstrom | a030ce4 | 2007-01-23 10:33:43 +0100 | [diff] [blame] | 299 | if (type >= AGP_USER_TYPES || mem->type >= AGP_USER_TYPES) |
| 300 | return -EINVAL; |
| 301 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | io_pg_start = I460_IOPAGES_PER_KPAGE * pg_start; |
| 303 | |
| 304 | temp = agp_bridge->current_size; |
| 305 | num_entries = A_SIZE_8(temp)->num_entries; |
| 306 | |
| 307 | if ((io_pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count) > num_entries) { |
| 308 | printk(KERN_ERR PFX "Looks like we're out of AGP memory\n"); |
| 309 | return -EINVAL; |
| 310 | } |
| 311 | |
| 312 | j = io_pg_start; |
| 313 | while (j < (io_pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count)) { |
| 314 | if (!PGE_EMPTY(agp_bridge, RD_GATT(j))) { |
| 315 | pr_debug("i460_insert_memory_small_io_page: GATT[%d]=0x%x is busy\n", |
| 316 | j, RD_GATT(j)); |
| 317 | return -EBUSY; |
| 318 | } |
| 319 | j++; |
| 320 | } |
| 321 | |
| 322 | io_page_size = 1UL << I460_IO_PAGE_SHIFT; |
| 323 | for (i = 0, j = io_pg_start; i < mem->page_count; i++) { |
| 324 | paddr = mem->memory[i]; |
| 325 | for (k = 0; k < I460_IOPAGES_PER_KPAGE; k++, j++, paddr += io_page_size) |
| 326 | WR_GATT(j, agp_bridge->driver->mask_memory(agp_bridge, |
| 327 | paddr, mem->type)); |
| 328 | } |
| 329 | WR_FLUSH_GATT(j - 1); |
| 330 | return 0; |
| 331 | } |
| 332 | |
| 333 | static int i460_remove_memory_small_io_page(struct agp_memory *mem, |
| 334 | off_t pg_start, int type) |
| 335 | { |
| 336 | int i; |
| 337 | |
| 338 | pr_debug("i460_remove_memory_small_io_page(mem=%p, pg_start=%ld, type=%d)\n", |
| 339 | mem, pg_start, type); |
| 340 | |
| 341 | pg_start = I460_IOPAGES_PER_KPAGE * pg_start; |
| 342 | |
| 343 | for (i = pg_start; i < (pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count); i++) |
| 344 | WR_GATT(i, 0); |
| 345 | WR_FLUSH_GATT(i - 1); |
| 346 | return 0; |
| 347 | } |
| 348 | |
| 349 | #if I460_LARGE_IO_PAGES |
| 350 | |
| 351 | /* |
| 352 | * These functions are called when the I/O (GART) page size exceeds PAGE_SIZE. |
| 353 | * |
| 354 | * This situation is interesting since AGP memory allocations that are smaller than a |
| 355 | * single GART page are possible. The i460.lp_desc array tracks partial allocation of the |
| 356 | * large GART pages to work around this issue. |
| 357 | * |
| 358 | * i460.lp_desc[pg_num].refcount tracks the number of kernel pages in use within GART page |
| 359 | * pg_num. i460.lp_desc[pg_num].paddr is the physical address of the large page and |
| 360 | * i460.lp_desc[pg_num].alloced_map is a bitmap of kernel pages that are in use (allocated). |
| 361 | */ |
| 362 | |
| 363 | static int i460_alloc_large_page (struct lp_desc *lp) |
| 364 | { |
| 365 | unsigned long order = I460_IO_PAGE_SHIFT - PAGE_SHIFT; |
| 366 | size_t map_size; |
| 367 | void *lpage; |
| 368 | |
| 369 | lpage = (void *) __get_free_pages(GFP_KERNEL, order); |
| 370 | if (!lpage) { |
| 371 | printk(KERN_ERR PFX "Couldn't alloc 4M GART page...\n"); |
| 372 | return -ENOMEM; |
| 373 | } |
| 374 | |
| 375 | map_size = ((I460_KPAGES_PER_IOPAGE + BITS_PER_LONG - 1) & -BITS_PER_LONG)/8; |
Dave Jones | 0ea27d9 | 2005-10-20 15:12:16 -0700 | [diff] [blame] | 376 | lp->alloced_map = kzalloc(map_size, GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 377 | if (!lp->alloced_map) { |
| 378 | free_pages((unsigned long) lpage, order); |
| 379 | printk(KERN_ERR PFX "Out of memory, we're in trouble...\n"); |
| 380 | return -ENOMEM; |
| 381 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 382 | |
Keir Fraser | 07eee78 | 2005-03-30 13:17:04 -0800 | [diff] [blame] | 383 | lp->paddr = virt_to_gart(lpage); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 384 | lp->refcount = 0; |
| 385 | atomic_add(I460_KPAGES_PER_IOPAGE, &agp_bridge->current_memory_agp); |
| 386 | return 0; |
| 387 | } |
| 388 | |
| 389 | static void i460_free_large_page (struct lp_desc *lp) |
| 390 | { |
| 391 | kfree(lp->alloced_map); |
| 392 | lp->alloced_map = NULL; |
| 393 | |
Keir Fraser | 07eee78 | 2005-03-30 13:17:04 -0800 | [diff] [blame] | 394 | free_pages((unsigned long) gart_to_virt(lp->paddr), I460_IO_PAGE_SHIFT - PAGE_SHIFT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 395 | atomic_sub(I460_KPAGES_PER_IOPAGE, &agp_bridge->current_memory_agp); |
| 396 | } |
| 397 | |
| 398 | static int i460_insert_memory_large_io_page (struct agp_memory *mem, |
| 399 | off_t pg_start, int type) |
| 400 | { |
| 401 | int i, start_offset, end_offset, idx, pg, num_entries; |
| 402 | struct lp_desc *start, *end, *lp; |
| 403 | void *temp; |
| 404 | |
Thomas Hellstrom | a030ce4 | 2007-01-23 10:33:43 +0100 | [diff] [blame] | 405 | if (type >= AGP_USER_TYPES || mem->type >= AGP_USER_TYPES) |
| 406 | return -EINVAL; |
| 407 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 408 | temp = agp_bridge->current_size; |
| 409 | num_entries = A_SIZE_8(temp)->num_entries; |
| 410 | |
| 411 | /* Figure out what pg_start means in terms of our large GART pages */ |
Dave Jones | 6a92a4e | 2006-02-28 00:54:25 -0500 | [diff] [blame] | 412 | start = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE]; |
| 413 | end = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE]; |
| 414 | start_offset = pg_start % I460_KPAGES_PER_IOPAGE; |
| 415 | end_offset = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 416 | |
| 417 | if (end > i460.lp_desc + num_entries) { |
| 418 | printk(KERN_ERR PFX "Looks like we're out of AGP memory\n"); |
| 419 | return -EINVAL; |
| 420 | } |
| 421 | |
| 422 | /* Check if the requested region of the aperture is free */ |
| 423 | for (lp = start; lp <= end; ++lp) { |
| 424 | if (!lp->alloced_map) |
| 425 | continue; /* OK, the entire large page is available... */ |
| 426 | |
| 427 | for (idx = ((lp == start) ? start_offset : 0); |
| 428 | idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE); |
| 429 | idx++) |
| 430 | { |
| 431 | if (test_bit(idx, lp->alloced_map)) |
| 432 | return -EBUSY; |
| 433 | } |
| 434 | } |
| 435 | |
| 436 | for (lp = start, i = 0; lp <= end; ++lp) { |
| 437 | if (!lp->alloced_map) { |
| 438 | /* Allocate new GART pages... */ |
| 439 | if (i460_alloc_large_page(lp) < 0) |
| 440 | return -ENOMEM; |
| 441 | pg = lp - i460.lp_desc; |
| 442 | WR_GATT(pg, agp_bridge->driver->mask_memory(agp_bridge, |
| 443 | lp->paddr, 0)); |
| 444 | WR_FLUSH_GATT(pg); |
| 445 | } |
| 446 | |
| 447 | for (idx = ((lp == start) ? start_offset : 0); |
| 448 | idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE); |
| 449 | idx++, i++) |
| 450 | { |
| 451 | mem->memory[i] = lp->paddr + idx*PAGE_SIZE; |
| 452 | __set_bit(idx, lp->alloced_map); |
| 453 | ++lp->refcount; |
| 454 | } |
| 455 | } |
| 456 | return 0; |
| 457 | } |
| 458 | |
| 459 | static int i460_remove_memory_large_io_page (struct agp_memory *mem, |
| 460 | off_t pg_start, int type) |
| 461 | { |
| 462 | int i, pg, start_offset, end_offset, idx, num_entries; |
| 463 | struct lp_desc *start, *end, *lp; |
| 464 | void *temp; |
| 465 | |
| 466 | temp = agp_bridge->driver->current_size; |
| 467 | num_entries = A_SIZE_8(temp)->num_entries; |
| 468 | |
| 469 | /* Figure out what pg_start means in terms of our large GART pages */ |
Dave Jones | 6a92a4e | 2006-02-28 00:54:25 -0500 | [diff] [blame] | 470 | start = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE]; |
| 471 | end = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE]; |
| 472 | start_offset = pg_start % I460_KPAGES_PER_IOPAGE; |
| 473 | end_offset = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 474 | |
| 475 | for (i = 0, lp = start; lp <= end; ++lp) { |
| 476 | for (idx = ((lp == start) ? start_offset : 0); |
| 477 | idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE); |
| 478 | idx++, i++) |
| 479 | { |
| 480 | mem->memory[i] = 0; |
| 481 | __clear_bit(idx, lp->alloced_map); |
| 482 | --lp->refcount; |
| 483 | } |
| 484 | |
| 485 | /* Free GART pages if they are unused */ |
| 486 | if (lp->refcount == 0) { |
| 487 | pg = lp - i460.lp_desc; |
| 488 | WR_GATT(pg, 0); |
| 489 | WR_FLUSH_GATT(pg); |
| 490 | i460_free_large_page(lp); |
| 491 | } |
| 492 | } |
| 493 | return 0; |
| 494 | } |
| 495 | |
| 496 | /* Wrapper routines to call the approriate {small_io_page,large_io_page} function */ |
| 497 | |
| 498 | static int i460_insert_memory (struct agp_memory *mem, |
| 499 | off_t pg_start, int type) |
| 500 | { |
| 501 | if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT) |
| 502 | return i460_insert_memory_small_io_page(mem, pg_start, type); |
| 503 | else |
| 504 | return i460_insert_memory_large_io_page(mem, pg_start, type); |
| 505 | } |
| 506 | |
| 507 | static int i460_remove_memory (struct agp_memory *mem, |
| 508 | off_t pg_start, int type) |
| 509 | { |
| 510 | if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT) |
| 511 | return i460_remove_memory_small_io_page(mem, pg_start, type); |
| 512 | else |
| 513 | return i460_remove_memory_large_io_page(mem, pg_start, type); |
| 514 | } |
| 515 | |
| 516 | /* |
| 517 | * If the I/O (GART) page size is bigger than the kernel page size, we don't want to |
| 518 | * allocate memory until we know where it is to be bound in the aperture (a |
| 519 | * multi-kernel-page alloc might fit inside of an already allocated GART page). |
| 520 | * |
| 521 | * Let's just hope nobody counts on the allocated AGP memory being there before bind time |
| 522 | * (I don't think current drivers do)... |
| 523 | */ |
| 524 | static void *i460_alloc_page (struct agp_bridge_data *bridge) |
| 525 | { |
| 526 | void *page; |
| 527 | |
Alan Hourihane | 88d5196 | 2005-11-06 23:35:34 -0800 | [diff] [blame] | 528 | if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 529 | page = agp_generic_alloc_page(agp_bridge); |
Alan Hourihane | 88d5196 | 2005-11-06 23:35:34 -0800 | [diff] [blame] | 530 | } else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 531 | /* Returning NULL would cause problems */ |
| 532 | /* AK: really dubious code. */ |
| 533 | page = (void *)~0UL; |
| 534 | return page; |
| 535 | } |
| 536 | |
Dave Airlie | a2721e9 | 2007-10-15 10:19:16 +1000 | [diff] [blame] | 537 | static void i460_destroy_page (void *page, int flags) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 538 | { |
Alan Hourihane | 88d5196 | 2005-11-06 23:35:34 -0800 | [diff] [blame] | 539 | if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT) { |
Dave Airlie | a2721e9 | 2007-10-15 10:19:16 +1000 | [diff] [blame] | 540 | agp_generic_destroy_page(page, flags); |
Alan Hourihane | 88d5196 | 2005-11-06 23:35:34 -0800 | [diff] [blame] | 541 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 542 | } |
| 543 | |
| 544 | #endif /* I460_LARGE_IO_PAGES */ |
| 545 | |
| 546 | static unsigned long i460_mask_memory (struct agp_bridge_data *bridge, |
| 547 | unsigned long addr, int type) |
| 548 | { |
| 549 | /* Make sure the returned address is a valid GATT entry */ |
| 550 | return bridge->driver->masks[0].mask |
Andrew Morton | 49ebd7c | 2005-11-06 23:35:35 -0800 | [diff] [blame] | 551 | | (((addr & ~((1 << I460_IO_PAGE_SHIFT) - 1)) & 0xfffff000) >> 12); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 552 | } |
| 553 | |
Ryusuke Konishi | e047d1c | 2007-02-27 14:13:02 +0900 | [diff] [blame] | 554 | const struct agp_bridge_driver intel_i460_driver = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 555 | .owner = THIS_MODULE, |
| 556 | .aperture_sizes = i460_sizes, |
| 557 | .size_type = U8_APER_SIZE, |
| 558 | .num_aperture_sizes = 3, |
| 559 | .configure = i460_configure, |
| 560 | .fetch_size = i460_fetch_size, |
| 561 | .cleanup = i460_cleanup, |
| 562 | .tlb_flush = i460_tlb_flush, |
| 563 | .mask_memory = i460_mask_memory, |
| 564 | .masks = i460_masks, |
| 565 | .agp_enable = agp_generic_enable, |
| 566 | .cache_flush = global_cache_flush, |
| 567 | .create_gatt_table = i460_create_gatt_table, |
| 568 | .free_gatt_table = i460_free_gatt_table, |
| 569 | #if I460_LARGE_IO_PAGES |
| 570 | .insert_memory = i460_insert_memory, |
| 571 | .remove_memory = i460_remove_memory, |
| 572 | .agp_alloc_page = i460_alloc_page, |
| 573 | .agp_destroy_page = i460_destroy_page, |
| 574 | #else |
| 575 | .insert_memory = i460_insert_memory_small_io_page, |
| 576 | .remove_memory = i460_remove_memory_small_io_page, |
| 577 | .agp_alloc_page = agp_generic_alloc_page, |
Rene Herman | 5f310b6 | 2008-08-21 19:15:46 +0200 | [diff] [blame] | 578 | .agp_alloc_pages = agp_generic_alloc_pages, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 579 | .agp_destroy_page = agp_generic_destroy_page, |
Rene Herman | 5f310b6 | 2008-08-21 19:15:46 +0200 | [diff] [blame] | 580 | .agp_destroy_pages = agp_generic_destroy_pages, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 581 | #endif |
| 582 | .alloc_by_type = agp_generic_alloc_by_type, |
| 583 | .free_by_type = agp_generic_free_by_type, |
Thomas Hellstrom | a030ce4 | 2007-01-23 10:33:43 +0100 | [diff] [blame] | 584 | .agp_type_to_mask_type = agp_generic_type_to_mask_type, |
Joe Perches | c725801 | 2008-03-26 14:10:02 -0700 | [diff] [blame] | 585 | .cant_use_aperture = true, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 586 | }; |
| 587 | |
| 588 | static int __devinit agp_intel_i460_probe(struct pci_dev *pdev, |
| 589 | const struct pci_device_id *ent) |
| 590 | { |
| 591 | struct agp_bridge_data *bridge; |
| 592 | u8 cap_ptr; |
| 593 | |
| 594 | cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP); |
| 595 | if (!cap_ptr) |
| 596 | return -ENODEV; |
| 597 | |
| 598 | bridge = agp_alloc_bridge(); |
| 599 | if (!bridge) |
| 600 | return -ENOMEM; |
| 601 | |
| 602 | bridge->driver = &intel_i460_driver; |
| 603 | bridge->dev = pdev; |
| 604 | bridge->capndx = cap_ptr; |
| 605 | |
| 606 | printk(KERN_INFO PFX "Detected Intel 460GX chipset\n"); |
| 607 | |
| 608 | pci_set_drvdata(pdev, bridge); |
| 609 | return agp_add_bridge(bridge); |
| 610 | } |
| 611 | |
| 612 | static void __devexit agp_intel_i460_remove(struct pci_dev *pdev) |
| 613 | { |
| 614 | struct agp_bridge_data *bridge = pci_get_drvdata(pdev); |
| 615 | |
| 616 | agp_remove_bridge(bridge); |
| 617 | agp_put_bridge(bridge); |
| 618 | } |
| 619 | |
| 620 | static struct pci_device_id agp_intel_i460_pci_table[] = { |
| 621 | { |
| 622 | .class = (PCI_CLASS_BRIDGE_HOST << 8), |
| 623 | .class_mask = ~0, |
| 624 | .vendor = PCI_VENDOR_ID_INTEL, |
| 625 | .device = PCI_DEVICE_ID_INTEL_84460GX, |
| 626 | .subvendor = PCI_ANY_ID, |
| 627 | .subdevice = PCI_ANY_ID, |
| 628 | }, |
| 629 | { } |
| 630 | }; |
| 631 | |
| 632 | MODULE_DEVICE_TABLE(pci, agp_intel_i460_pci_table); |
| 633 | |
| 634 | static struct pci_driver agp_intel_i460_pci_driver = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 635 | .name = "agpgart-intel-i460", |
| 636 | .id_table = agp_intel_i460_pci_table, |
| 637 | .probe = agp_intel_i460_probe, |
| 638 | .remove = __devexit_p(agp_intel_i460_remove), |
| 639 | }; |
| 640 | |
| 641 | static int __init agp_intel_i460_init(void) |
| 642 | { |
| 643 | if (agp_off) |
| 644 | return -EINVAL; |
| 645 | return pci_register_driver(&agp_intel_i460_pci_driver); |
| 646 | } |
| 647 | |
| 648 | static void __exit agp_intel_i460_cleanup(void) |
| 649 | { |
| 650 | pci_unregister_driver(&agp_intel_i460_pci_driver); |
| 651 | } |
| 652 | |
| 653 | module_init(agp_intel_i460_init); |
| 654 | module_exit(agp_intel_i460_cleanup); |
| 655 | |
| 656 | MODULE_AUTHOR("Chris Ahna <Christopher.J.Ahna@intel.com>"); |
| 657 | MODULE_LICENSE("GPL and additional rights"); |