David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #define pr_fmt(fmt) "GFX_LDO: %s: " fmt, __func__ |
| 15 | |
| 16 | #include <linux/bitops.h> |
| 17 | #include <linux/debugfs.h> |
| 18 | #include <linux/delay.h> |
| 19 | #include <linux/io.h> |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/module.h> |
| 22 | #include <linux/of.h> |
| 23 | #include <linux/of_device.h> |
| 24 | #include <linux/platform_device.h> |
| 25 | #include <linux/regulator/driver.h> |
| 26 | #include <linux/regulator/machine.h> |
| 27 | #include <linux/regulator/of_regulator.h> |
| 28 | #include <linux/slab.h> |
| 29 | #include <linux/uaccess.h> |
| 30 | #include <linux/regulator/msm-ldo-regulator.h> |
| 31 | |
| 32 | #define LDO_ATEST_REG 0x0 |
| 33 | #define LDO_CFG0_REG 0x4 |
| 34 | #define LDO_CFG1_REG 0x8 |
| 35 | #define LDO_CFG2_REG 0xC |
| 36 | #define LDO_LD_DATA_REG 0x10 |
| 37 | |
| 38 | #define LDO_VREF_TEST_CFG 0x14 |
| 39 | #define ENABLE_LDO_STATUS_BIT (BIT(8) | BIT(12)) |
| 40 | #define LDO_AUTOBYPASS_BIT BIT(20) |
| 41 | |
| 42 | #define LDO_VREF_SET_REG 0x18 |
| 43 | #define UPDATE_VREF_BIT BIT(31) |
| 44 | #define SEL_RST_BIT BIT(16) |
| 45 | #define VREF_VAL_MASK GENMASK(6, 0) |
| 46 | |
| 47 | #define PWRSWITCH_CTRL_REG 0x1C |
| 48 | #define LDO_CLAMP_IO_BIT BIT(31) |
| 49 | #define CPR_BYPASS_IN_LDO_MODE_BIT BIT(30) |
| 50 | #define EN_LDOAP_CTRL_CPR_BIT BIT(29) |
| 51 | #define CX_CPR_BYPASS_IN_LDO_MODE_BIT BIT(10) |
| 52 | #define PWR_SRC_SEL_BIT BIT(9) |
| 53 | #define ACK_SW_OVR_BIT BIT(8) |
| 54 | #define LDO_PREON_SW_OVR_BIT BIT(7) |
| 55 | #define LDO_BYPASS_BIT BIT(6) |
| 56 | #define LDO_PDN_BIT BIT(5) |
| 57 | #define LDO_UNDER_SW_CTRL_BIT BIT(4) |
| 58 | #define BHS_EN_REST_BIT BIT(2) |
| 59 | #define BHS_EN_FEW_BIT BIT(1) |
| 60 | #define BHS_UNDER_SW_CTL BIT(0) |
| 61 | |
| 62 | #define LDO_STATUS1_REG 0x24 |
| 63 | |
| 64 | #define PWRSWITCH_STATUS_REG 0x28 |
| 65 | #define LDO_VREF_SETTLED_BIT BIT(4) |
| 66 | #define LDO_READY_BIT BIT(2) |
| 67 | #define BHS_EN_REST_ACK_BIT BIT(1) |
| 68 | |
| 69 | #define REF_CURRENT_X1_REG 0x2C |
| 70 | #define REF_CURRENT_X2_REG 0x30 |
| 71 | #define ADC_CTL_REG 0x34 |
| 72 | |
| 73 | #define MIN_LDO_VOLTAGE 375000 |
| 74 | #define MAX_LDO_VOLTAGE 980000 |
| 75 | #define LDO_STEP_VOLATGE 5000 |
| 76 | |
| 77 | #define MAX_LDO_REGS 11 |
| 78 | |
| 79 | #define BYTES_PER_FUSE_ROW 8 |
| 80 | #define MAX_FUSE_ROW_BIT 63 |
| 81 | #define MIN_CORNER_OFFSET 1 |
| 82 | |
| 83 | #define GFX_LDO_FUSE_STEP_VOLT 10000 |
| 84 | #define GFX_LDO_FUSE_SIZE 5 |
| 85 | |
| 86 | enum direction { |
| 87 | NO_CHANGE, |
| 88 | UP, |
| 89 | DOWN, |
| 90 | }; |
| 91 | |
| 92 | enum voltage_handling { |
| 93 | VOLTAGE, |
| 94 | CORNER, |
| 95 | }; |
| 96 | |
| 97 | struct fuse_param { |
| 98 | unsigned int row; |
| 99 | unsigned int bit_start; |
| 100 | unsigned int bit_end; |
| 101 | }; |
| 102 | |
| 103 | struct ldo_config { |
| 104 | u32 offset; |
| 105 | u32 value; |
| 106 | }; |
| 107 | |
| 108 | struct msm_gfx_ldo { |
| 109 | struct device *dev; |
| 110 | struct regulator_desc rdesc; |
| 111 | struct regulator_dev *rdev; |
| 112 | struct regulator *vdd_cx; |
| 113 | struct regulator *mem_acc_vreg; |
| 114 | struct dentry *debugfs; |
| 115 | |
| 116 | u32 num_corners; |
| 117 | u32 num_ldo_corners; |
| 118 | u32 *open_loop_volt; |
| 119 | u32 *ceiling_volt; |
| 120 | u32 *floor_volt; |
| 121 | u32 *ldo_corner_en_map; |
| 122 | u32 *vdd_cx_corner_map; |
| 123 | u32 *mem_acc_corner_map; |
| 124 | const int *ref_volt; |
| 125 | const struct fuse_param *ldo_enable_param; |
| 126 | const struct fuse_param **init_volt_param; |
| 127 | bool ldo_fuse_enable; |
| 128 | bool ldo_mode_disable; |
| 129 | struct ldo_config *ldo_init_config; |
| 130 | |
| 131 | void __iomem *efuse_base; |
| 132 | phys_addr_t efuse_addr; |
| 133 | void __iomem *ldo_base; |
| 134 | phys_addr_t ldo_addr; |
| 135 | |
| 136 | bool vreg_enabled; |
| 137 | enum msm_ldo_supply_mode mode; |
| 138 | u32 corner; |
| 139 | int ldo_voltage_uv; |
| 140 | struct mutex ldo_mutex; |
| 141 | enum voltage_handling ops_type; |
| 142 | }; |
| 143 | |
| 144 | #define MSM8953_LDO_FUSE_CORNERS 3 |
| 145 | #define LDO_MAX_OFFSET 0xFFFF |
| 146 | static struct ldo_config msm8953_ldo_config[] = { |
| 147 | {LDO_ATEST_REG, 0x00000203}, |
| 148 | {LDO_CFG0_REG, 0x05008600}, |
| 149 | {LDO_CFG1_REG, 0x0}, |
| 150 | {LDO_CFG2_REG, 0x0000C3FC}, |
| 151 | {LDO_VREF_TEST_CFG, 0x004B1102}, |
| 152 | {LDO_MAX_OFFSET, LDO_MAX_OFFSET}, |
| 153 | }; |
| 154 | |
| 155 | static struct ldo_config sdm660_ldo_config[] = { |
| 156 | {LDO_ATEST_REG, 0x00000080}, |
| 157 | {LDO_CFG0_REG, 0x0100A600}, |
| 158 | {LDO_CFG1_REG, 0x000000A0}, |
| 159 | {LDO_CFG2_REG, 0x0000C3FE}, |
| 160 | {LDO_LD_DATA_REG, 0x00000000}, |
| 161 | {LDO_VREF_TEST_CFG, 0x00401100}, |
| 162 | {REF_CURRENT_X1_REG, 0x00000230}, |
| 163 | {REF_CURRENT_X2_REG, 0x00000048}, |
| 164 | {ADC_CTL_REG, 0x00000000}, |
| 165 | {LDO_MAX_OFFSET, LDO_MAX_OFFSET}, |
| 166 | }; |
| 167 | |
| 168 | static struct fuse_param msm8953_ldo_enable_param[] = { |
| 169 | {65, 11, 11}, |
| 170 | {}, |
| 171 | }; |
| 172 | |
| 173 | static const struct fuse_param |
| 174 | msm8953_init_voltage_param[MSM8953_LDO_FUSE_CORNERS][2] = { |
| 175 | { {73, 42, 46}, {} }, |
| 176 | { {73, 37, 41}, {} }, |
| 177 | { {73, 32, 36}, {} }, |
| 178 | }; |
| 179 | |
| 180 | static const int msm8953_fuse_ref_volt[MSM8953_LDO_FUSE_CORNERS] = { |
| 181 | 580000, |
| 182 | 650000, |
| 183 | 720000, |
| 184 | }; |
| 185 | |
| 186 | enum { |
| 187 | MSM8953_SOC_ID, |
| 188 | SDM660_SOC_ID, |
| 189 | }; |
| 190 | |
| 191 | static int convert_open_loop_voltage_fuse(int ref_volt, int step_volt, |
| 192 | u32 fuse, int fuse_len) |
| 193 | { |
| 194 | int sign, steps; |
| 195 | |
| 196 | sign = (fuse & (1 << (fuse_len - 1))) ? -1 : 1; |
| 197 | steps = fuse & ((1 << (fuse_len - 1)) - 1); |
| 198 | |
| 199 | return ref_volt + sign * steps * step_volt; |
| 200 | } |
| 201 | |
| 202 | static int read_fuse_param(void __iomem *fuse_base_addr, |
| 203 | const struct fuse_param *param, u64 *param_value) |
| 204 | { |
| 205 | u64 fuse_val, val; |
| 206 | int bits; |
| 207 | int bits_total = 0; |
| 208 | |
| 209 | *param_value = 0; |
| 210 | |
| 211 | while (param->row || param->bit_start || param->bit_end) { |
| 212 | if (param->bit_start > param->bit_end |
| 213 | || param->bit_end > MAX_FUSE_ROW_BIT) { |
| 214 | pr_err("Invalid fuse parameter segment: row=%u, start=%u, end=%u\n", |
| 215 | param->row, param->bit_start, param->bit_end); |
| 216 | return -EINVAL; |
| 217 | } |
| 218 | |
| 219 | bits = param->bit_end - param->bit_start + 1; |
| 220 | if (bits_total + bits > 64) { |
| 221 | pr_err("Invalid fuse parameter segments; total bits = %d\n", |
| 222 | bits_total + bits); |
| 223 | return -EINVAL; |
| 224 | } |
| 225 | |
| 226 | fuse_val = readq_relaxed(fuse_base_addr |
| 227 | + param->row * BYTES_PER_FUSE_ROW); |
| 228 | val = (fuse_val >> param->bit_start) & ((1ULL << bits) - 1); |
| 229 | *param_value |= val << bits_total; |
| 230 | bits_total += bits; |
| 231 | |
| 232 | param++; |
| 233 | } |
| 234 | |
| 235 | return 0; |
| 236 | } |
| 237 | |
| 238 | static enum msm_ldo_supply_mode get_operating_mode(struct msm_gfx_ldo *ldo_vreg, |
| 239 | int corner) |
| 240 | { |
| 241 | if (!ldo_vreg->ldo_mode_disable && ldo_vreg->ldo_fuse_enable |
| 242 | && ldo_vreg->ldo_corner_en_map[corner]) |
| 243 | return LDO_MODE; |
| 244 | |
| 245 | return BHS_MODE; |
| 246 | } |
| 247 | |
| 248 | static char *register_str[] = { |
| 249 | "LDO_ATEST", |
| 250 | "LDO_CFG0", |
| 251 | "LDO_CFG1", |
| 252 | "LDO_CFG2", |
| 253 | "LDO_LD_DATA", |
| 254 | "LDO_VREF_TEST_CFG", |
| 255 | "LDO_VREF_SET", |
| 256 | "PWRSWITCH_CTL", |
| 257 | "LDO_STATUS0", |
| 258 | "LDO_STATUS1", |
| 259 | "PWRSWITCH_STATUS", |
| 260 | }; |
| 261 | |
| 262 | static void dump_registers(struct msm_gfx_ldo *ldo_vreg, char *func) |
| 263 | { |
| 264 | u32 reg[MAX_LDO_REGS]; |
| 265 | int i; |
| 266 | |
| 267 | for (i = 0; i < MAX_LDO_REGS; i++) { |
| 268 | reg[i] = 0; |
| 269 | reg[i] = readl_relaxed(ldo_vreg->ldo_base + (i * 4)); |
| 270 | pr_debug("%s -- %s = 0x%x\n", func, register_str[i], reg[i]); |
| 271 | } |
| 272 | } |
| 273 | |
| 274 | #define GET_VREF(a) DIV_ROUND_UP(a - MIN_LDO_VOLTAGE, LDO_STEP_VOLATGE) |
| 275 | |
| 276 | static void configure_ldo_voltage(struct msm_gfx_ldo *ldo_vreg, int new_uv) |
| 277 | { |
| 278 | int val = 0; |
| 279 | u32 reg = 0; |
| 280 | |
| 281 | val = GET_VREF(new_uv); |
| 282 | reg = readl_relaxed(ldo_vreg->ldo_base + LDO_VREF_SET_REG); |
| 283 | |
| 284 | /* set the new voltage */ |
| 285 | reg &= ~VREF_VAL_MASK; |
| 286 | reg |= val & VREF_VAL_MASK; |
| 287 | writel_relaxed(reg, ldo_vreg->ldo_base + LDO_VREF_SET_REG); |
| 288 | |
| 289 | /* Initiate VREF update */ |
| 290 | reg |= UPDATE_VREF_BIT; |
| 291 | writel_relaxed(reg, ldo_vreg->ldo_base + LDO_VREF_SET_REG); |
| 292 | |
| 293 | /* complete the writes */ |
| 294 | mb(); |
| 295 | |
| 296 | reg &= ~UPDATE_VREF_BIT; |
| 297 | writel_relaxed(reg, ldo_vreg->ldo_base + LDO_VREF_SET_REG); |
| 298 | |
| 299 | ldo_vreg->ldo_voltage_uv = new_uv; |
| 300 | |
| 301 | /* complete the write sequence */ |
| 302 | mb(); |
| 303 | } |
| 304 | |
| 305 | static int ldo_update_voltage(struct msm_gfx_ldo *ldo_vreg, int new_uv) |
| 306 | { |
| 307 | int timeout = 50; |
| 308 | u32 reg = 0; |
| 309 | |
| 310 | configure_ldo_voltage(ldo_vreg, new_uv); |
| 311 | |
| 312 | while (--timeout) { |
| 313 | reg = readl_relaxed(ldo_vreg->ldo_base + |
| 314 | PWRSWITCH_STATUS_REG); |
| 315 | if (reg & (LDO_VREF_SETTLED_BIT | LDO_READY_BIT)) |
| 316 | break; |
| 317 | |
| 318 | udelay(10); |
| 319 | } |
| 320 | if (!timeout) { |
| 321 | pr_err("LDO_VREF_SETTLED not set PWRSWITCH_STATUS = 0x%x\n", |
| 322 | reg); |
| 323 | return -EBUSY; |
| 324 | } |
| 325 | |
| 326 | pr_debug("LDO voltage set to=%d uV VREF_REG=%x\n", |
| 327 | ldo_vreg->ldo_voltage_uv, |
| 328 | readl_relaxed(ldo_vreg->ldo_base + LDO_VREF_SET_REG)); |
| 329 | |
| 330 | return 0; |
| 331 | } |
| 332 | |
| 333 | static int enable_ldo_mode(struct msm_gfx_ldo *ldo_vreg, int new_uv) |
| 334 | { |
| 335 | u32 ctl = 0; |
| 336 | |
| 337 | /* set the ldo-vref */ |
| 338 | configure_ldo_voltage(ldo_vreg, new_uv); |
| 339 | |
| 340 | /* configure the LDO for power-up */ |
| 341 | ctl = readl_relaxed(ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 342 | |
| 343 | /* Move BHS under SW control */ |
| 344 | ctl |= BHS_UNDER_SW_CTL; |
| 345 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 346 | |
| 347 | /* Set LDO under gdsc control */ |
| 348 | ctl &= ~LDO_UNDER_SW_CTRL_BIT; |
| 349 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 350 | |
| 351 | /* enable hw_pre-on to gdsc */ |
| 352 | ctl |= LDO_PREON_SW_OVR_BIT; |
| 353 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 354 | |
| 355 | /* remove LDO bypass */ |
| 356 | ctl &= ~LDO_BYPASS_BIT; |
| 357 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 358 | |
| 359 | /* set power-source as LDO */ |
| 360 | ctl |= PWR_SRC_SEL_BIT; |
| 361 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 362 | |
| 363 | /* clear fake-sw ack to gdsc */ |
| 364 | ctl &= ~ACK_SW_OVR_BIT; |
| 365 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 366 | |
| 367 | /* put CPR in bypass mode */ |
| 368 | if (ldo_vreg->ops_type == CORNER) { |
| 369 | ctl |= CPR_BYPASS_IN_LDO_MODE_BIT; |
| 370 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 371 | } |
| 372 | |
| 373 | /* complete all writes */ |
| 374 | mb(); |
| 375 | |
| 376 | dump_registers(ldo_vreg, "enable_ldo_mode"); |
| 377 | |
| 378 | return 0; |
| 379 | } |
| 380 | |
| 381 | static int enable_bhs_mode(struct msm_gfx_ldo *ldo_vreg) |
| 382 | { |
| 383 | u32 ctl = 0; |
| 384 | |
| 385 | ctl = readl_relaxed(ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 386 | |
| 387 | /* Put LDO under SW control */ |
| 388 | ctl |= LDO_UNDER_SW_CTRL_BIT; |
| 389 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 390 | |
| 391 | /* set power-source as BHS */ |
| 392 | ctl &= ~PWR_SRC_SEL_BIT; |
| 393 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 394 | |
| 395 | if (ldo_vreg->ops_type == CORNER) { |
| 396 | /* clear GFX CPR in by-pass mode */ |
| 397 | ctl &= ~CPR_BYPASS_IN_LDO_MODE_BIT; |
| 398 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 399 | } |
| 400 | |
| 401 | /* Enable the BHS control signals to gdsc */ |
| 402 | ctl &= ~BHS_EN_FEW_BIT; |
| 403 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 404 | ctl &= ~BHS_EN_REST_BIT; |
| 405 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 406 | |
| 407 | /* Put BHS under GDSC control */ |
| 408 | ctl &= ~BHS_UNDER_SW_CTL; |
| 409 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 410 | |
| 411 | dump_registers(ldo_vreg, "enable_bhs_mode"); |
| 412 | |
| 413 | return 0; |
| 414 | } |
| 415 | |
| 416 | static int msm_gfx_ldo_corner_enable(struct regulator_dev *rdev) |
| 417 | { |
| 418 | struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev); |
| 419 | int rc = 0, new_uv; |
| 420 | enum msm_ldo_supply_mode enable_mode; |
| 421 | |
| 422 | mutex_lock(&ldo_vreg->ldo_mutex); |
| 423 | |
| 424 | pr_debug("regulator_enable requested. corner=%d\n", |
| 425 | ldo_vreg->corner + MIN_CORNER_OFFSET); |
| 426 | |
| 427 | if (ldo_vreg->vdd_cx) { |
| 428 | rc = regulator_set_voltage(ldo_vreg->vdd_cx, |
| 429 | ldo_vreg->vdd_cx_corner_map[ldo_vreg->corner], |
| 430 | INT_MAX); |
| 431 | if (rc) { |
| 432 | pr_err("Unable to set CX for corner %d rc=%d\n", |
| 433 | ldo_vreg->corner + MIN_CORNER_OFFSET, rc); |
| 434 | goto fail; |
| 435 | } |
| 436 | |
| 437 | rc = regulator_enable(ldo_vreg->vdd_cx); |
| 438 | if (rc) { |
| 439 | pr_err("regulator_enable: vdd_cx: failed rc=%d\n", rc); |
| 440 | goto fail; |
| 441 | } |
| 442 | } |
| 443 | |
| 444 | enable_mode = get_operating_mode(ldo_vreg, ldo_vreg->corner); |
| 445 | if (enable_mode == LDO_MODE) { |
| 446 | new_uv = ldo_vreg->open_loop_volt[ldo_vreg->corner]; |
| 447 | rc = enable_ldo_mode(ldo_vreg, new_uv); |
| 448 | pr_debug("LDO voltage configured =%d uV corner=%d\n", |
| 449 | ldo_vreg->ldo_voltage_uv, |
| 450 | ldo_vreg->corner + MIN_CORNER_OFFSET); |
| 451 | } else { |
| 452 | rc = enable_bhs_mode(ldo_vreg); |
| 453 | } |
| 454 | |
| 455 | if (rc) { |
| 456 | pr_err("Failed to enable regulator in %s mode rc=%d\n", |
| 457 | (enable_mode == LDO_MODE) ? "LDO" : "BHS", rc); |
| 458 | goto disable_cx; |
| 459 | } |
| 460 | |
| 461 | pr_debug("regulator_enable complete. mode=%s, corner=%d\n", |
| 462 | (enable_mode == LDO_MODE) ? "LDO" : "BHS", |
| 463 | ldo_vreg->corner + MIN_CORNER_OFFSET); |
| 464 | |
| 465 | ldo_vreg->mode = enable_mode; |
| 466 | ldo_vreg->vreg_enabled = true; |
| 467 | |
| 468 | disable_cx: |
| 469 | if (rc && ldo_vreg->vdd_cx) { |
| 470 | rc = regulator_disable(ldo_vreg->vdd_cx); |
| 471 | if (rc) |
| 472 | pr_err("regulator_enable: vdd_cx: failed rc=%d\n", rc); |
| 473 | } |
| 474 | fail: |
| 475 | mutex_unlock(&ldo_vreg->ldo_mutex); |
| 476 | return rc; |
| 477 | } |
| 478 | |
| 479 | static int msm_gfx_ldo_disable(struct regulator_dev *rdev) |
| 480 | { |
| 481 | int rc = 0; |
| 482 | struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev); |
| 483 | |
| 484 | mutex_lock(&ldo_vreg->ldo_mutex); |
| 485 | |
| 486 | if (ldo_vreg->vdd_cx) { |
| 487 | rc = regulator_disable(ldo_vreg->vdd_cx); |
| 488 | if (rc) { |
| 489 | pr_err("regulator_disable: vdd_cx: failed rc=%d\n", rc); |
| 490 | goto done; |
| 491 | } |
| 492 | rc = regulator_set_voltage(ldo_vreg->vdd_cx, 0, INT_MAX); |
| 493 | if (rc) |
| 494 | pr_err("failed to set voltage on CX rc=%d\n", rc); |
| 495 | } |
| 496 | |
| 497 | /* No additional configuration for LDO/BHS - taken care by gsdc */ |
| 498 | ldo_vreg->vreg_enabled = false; |
| 499 | |
| 500 | pr_debug("regulator_disabled complete\n"); |
| 501 | done: |
| 502 | mutex_unlock(&ldo_vreg->ldo_mutex); |
| 503 | return rc; |
| 504 | } |
| 505 | |
| 506 | static int switch_mode_to_ldo(struct msm_gfx_ldo *ldo_vreg, int new_uv) |
| 507 | { |
| 508 | u32 ctl = 0, status = 0, timeout = 50; |
| 509 | |
| 510 | ctl = readl_relaxed(ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 511 | |
| 512 | if (ldo_vreg->ops_type == CORNER) { |
| 513 | /* enable CPR bypass mode for LDO */ |
| 514 | ctl |= CPR_BYPASS_IN_LDO_MODE_BIT; |
| 515 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 516 | } |
| 517 | |
| 518 | /* fake ack to GDSC */ |
| 519 | ctl |= ACK_SW_OVR_BIT; |
| 520 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 521 | |
| 522 | /* set power-source as LDO */ |
| 523 | ctl |= PWR_SRC_SEL_BIT; |
| 524 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 525 | |
| 526 | /* Make sure BHS continues to power the rail */ |
| 527 | ctl |= BHS_EN_FEW_BIT; |
| 528 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 529 | ctl |= BHS_EN_REST_BIT; |
| 530 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 531 | |
| 532 | /* move BHS to SW control */ |
| 533 | ctl |= BHS_UNDER_SW_CTL; |
| 534 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 535 | |
| 536 | /* set LDO under SW control */ |
| 537 | ctl |= LDO_UNDER_SW_CTRL_BIT; |
| 538 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 539 | |
| 540 | /* bypass LDO */ |
| 541 | ctl |= LDO_BYPASS_BIT; |
| 542 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 543 | |
| 544 | /* power-on LDO */ |
| 545 | ctl &= ~LDO_PDN_BIT; |
| 546 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 547 | |
| 548 | /* set the new LDO voltage */ |
| 549 | ldo_update_voltage(ldo_vreg, new_uv); |
| 550 | |
| 551 | pr_debug("LDO voltage =%d uV\n", ldo_vreg->ldo_voltage_uv); |
| 552 | |
| 553 | /* make sure that the configuration is complete */ |
| 554 | mb(); |
| 555 | |
| 556 | /* power down BHS */ |
| 557 | ctl &= ~BHS_EN_FEW_BIT; |
| 558 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 559 | ctl &= ~BHS_EN_REST_BIT; |
| 560 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 561 | |
| 562 | /* make sure that the configuration is complete */ |
| 563 | mb(); |
| 564 | |
| 565 | /* wait for BHS to turn-off */ |
| 566 | while (--timeout) { |
| 567 | status = readl_relaxed(ldo_vreg->ldo_base + |
| 568 | PWRSWITCH_STATUS_REG); |
| 569 | if (!(status & BHS_EN_REST_ACK_BIT)) |
| 570 | break; |
| 571 | |
| 572 | udelay(10); |
| 573 | } |
| 574 | |
| 575 | if (!timeout) |
| 576 | pr_err("BHS_EN_RESET_ACK not clear PWRSWITCH_STATUS = 0x%x\n", |
| 577 | status); |
| 578 | |
| 579 | /* remove LDO bypass */ |
| 580 | ctl &= ~LDO_BYPASS_BIT; |
| 581 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 582 | |
| 583 | /* expose LDO to gdsc */ |
| 584 | ctl &= ~ACK_SW_OVR_BIT; |
| 585 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 586 | |
| 587 | ctl &= ~LDO_UNDER_SW_CTRL_BIT; |
| 588 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 589 | |
| 590 | dump_registers(ldo_vreg, "switch_mode_to_ldo"); |
| 591 | |
| 592 | return 0; |
| 593 | } |
| 594 | |
| 595 | static int switch_mode_to_bhs(struct msm_gfx_ldo *ldo_vreg) |
| 596 | { |
| 597 | u32 ctl = 0, status = 0, timeout = 50; |
| 598 | |
| 599 | ctl = readl_relaxed(ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 600 | |
| 601 | /* fake ack to gdsc */ |
| 602 | ctl |= ACK_SW_OVR_BIT; |
| 603 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 604 | |
| 605 | /* select BHS as power source */ |
| 606 | ctl &= ~PWR_SRC_SEL_BIT; |
| 607 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 608 | |
| 609 | /* LDO stays ON */ |
| 610 | ctl &= ~LDO_PDN_BIT; |
| 611 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 612 | |
| 613 | /* Move LDO to SW control */ |
| 614 | ctl |= LDO_UNDER_SW_CTRL_BIT; |
| 615 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 616 | |
| 617 | /* Power-up BHS */ |
| 618 | ctl |= BHS_EN_FEW_BIT; |
| 619 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 620 | ctl |= BHS_EN_REST_BIT; |
| 621 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 622 | |
| 623 | /* make sure that the configuration is complete */ |
| 624 | mb(); |
| 625 | |
| 626 | /* wait for BHS to power-up */ |
| 627 | while (--timeout) { |
| 628 | status = readl_relaxed(ldo_vreg->ldo_base + |
| 629 | PWRSWITCH_STATUS_REG); |
| 630 | if (status & BHS_EN_REST_ACK_BIT) |
| 631 | break; |
| 632 | |
| 633 | udelay(10); |
| 634 | } |
| 635 | if (!timeout) |
| 636 | pr_err("BHS_EN_RESET_ACK not set PWRSWITCH_STATUS = 0x%x\n", |
| 637 | status); |
| 638 | |
| 639 | /* bypass LDO */ |
| 640 | ctl |= LDO_BYPASS_BIT; |
| 641 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 642 | |
| 643 | /* pull-down LDO */ |
| 644 | ctl |= LDO_PDN_BIT; |
| 645 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 646 | |
| 647 | /* Expose BHS to gdsc */ |
| 648 | ctl &= ~ACK_SW_OVR_BIT; |
| 649 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 650 | ctl &= ~BHS_UNDER_SW_CTL; |
| 651 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 652 | |
| 653 | if (ldo_vreg->ops_type == CORNER) { |
| 654 | /* Enable CPR in BHS mode */ |
| 655 | ctl &= ~CPR_BYPASS_IN_LDO_MODE_BIT; |
| 656 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 657 | } |
| 658 | |
| 659 | /* make sure that all configuration is complete */ |
| 660 | mb(); |
| 661 | |
| 662 | dump_registers(ldo_vreg, "switch_mode_to_bhs"); |
| 663 | |
| 664 | return 0; |
| 665 | } |
| 666 | |
| 667 | static int msm_gfx_ldo_set_corner(struct regulator_dev *rdev, |
| 668 | int corner, int corner_max, unsigned int *selector) |
| 669 | { |
| 670 | struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev); |
| 671 | int rc = 0, mem_acc_corner, new_uv; |
| 672 | enum msm_ldo_supply_mode new_mode; |
| 673 | enum direction dir = NO_CHANGE; |
| 674 | |
| 675 | corner -= MIN_CORNER_OFFSET; |
| 676 | corner_max -= MIN_CORNER_OFFSET; |
| 677 | |
| 678 | mutex_lock(&ldo_vreg->ldo_mutex); |
| 679 | |
| 680 | if (corner == ldo_vreg->corner) |
| 681 | goto done; |
| 682 | |
| 683 | pr_debug("set-voltage requested: old_mode=%s old_corner=%d new_corner=%d vreg_enabled=%d\n", |
| 684 | ldo_vreg->mode == BHS_MODE ? "BHS" : "LDO", |
| 685 | ldo_vreg->corner + MIN_CORNER_OFFSET, |
| 686 | corner + MIN_CORNER_OFFSET, |
| 687 | ldo_vreg->vreg_enabled); |
| 688 | |
| 689 | if (corner > ldo_vreg->corner) |
| 690 | dir = UP; |
| 691 | else if (corner < ldo_vreg->corner) |
| 692 | dir = DOWN; |
| 693 | |
| 694 | if (ldo_vreg->mem_acc_vreg && dir == DOWN) { |
| 695 | mem_acc_corner = ldo_vreg->mem_acc_corner_map[corner]; |
| 696 | rc = regulator_set_voltage(ldo_vreg->mem_acc_vreg, |
| 697 | mem_acc_corner, mem_acc_corner); |
| 698 | } |
| 699 | |
| 700 | if (!ldo_vreg->vreg_enabled) { |
| 701 | ldo_vreg->corner = corner; |
| 702 | goto done; |
| 703 | } |
| 704 | |
| 705 | if (ldo_vreg->vdd_cx) { |
| 706 | rc = regulator_set_voltage(ldo_vreg->vdd_cx, |
| 707 | ldo_vreg->vdd_cx_corner_map[corner], |
| 708 | INT_MAX); |
| 709 | if (rc) { |
| 710 | pr_err("Unable to set CX for corner %d rc=%d\n", |
| 711 | corner + MIN_CORNER_OFFSET, rc); |
| 712 | goto done; |
| 713 | } |
| 714 | } |
| 715 | |
| 716 | new_mode = get_operating_mode(ldo_vreg, corner); |
| 717 | |
| 718 | if (new_mode == BHS_MODE) { |
| 719 | if (ldo_vreg->mode == LDO_MODE) { |
| 720 | rc = switch_mode_to_bhs(ldo_vreg); |
| 721 | if (rc) |
| 722 | pr_err("Switch to BHS corner=%d failed rc=%d\n", |
| 723 | corner + MIN_CORNER_OFFSET, rc); |
| 724 | } |
| 725 | } else { /* new mode - LDO */ |
| 726 | new_uv = ldo_vreg->open_loop_volt[ldo_vreg->corner]; |
| 727 | |
| 728 | if (ldo_vreg->mode == BHS_MODE) { |
| 729 | rc = switch_mode_to_ldo(ldo_vreg, new_uv); |
| 730 | if (rc) |
| 731 | pr_err("Switch to LDO failed corner=%d rc=%d\n", |
| 732 | corner + MIN_CORNER_OFFSET, rc); |
| 733 | } else { |
| 734 | rc = ldo_update_voltage(ldo_vreg, new_uv); |
| 735 | if (rc) |
| 736 | pr_err("Update voltage failed corner=%d rc=%d\n", |
| 737 | corner + MIN_CORNER_OFFSET, rc); |
| 738 | } |
| 739 | } |
| 740 | |
| 741 | if (!rc) { |
| 742 | pr_debug("set-voltage complete. old_mode=%s new_mode=%s old_corner=%d new_corner=%d\n", |
| 743 | ldo_vreg->mode == BHS_MODE ? "BHS" : "LDO", |
| 744 | new_mode == BHS_MODE ? "BHS" : "LDO", |
| 745 | ldo_vreg->corner + MIN_CORNER_OFFSET, |
| 746 | corner + MIN_CORNER_OFFSET); |
| 747 | |
| 748 | ldo_vreg->mode = new_mode; |
| 749 | ldo_vreg->corner = corner; |
| 750 | } |
| 751 | |
| 752 | done: |
| 753 | if (!rc && ldo_vreg->mem_acc_vreg && dir == UP) { |
| 754 | mem_acc_corner = ldo_vreg->mem_acc_corner_map[corner]; |
| 755 | rc = regulator_set_voltage(ldo_vreg->mem_acc_vreg, |
| 756 | mem_acc_corner, mem_acc_corner); |
| 757 | } |
| 758 | mutex_unlock(&ldo_vreg->ldo_mutex); |
| 759 | return rc; |
| 760 | } |
| 761 | |
| 762 | static int msm_gfx_ldo_get_corner(struct regulator_dev *rdev) |
| 763 | { |
| 764 | struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev); |
| 765 | |
| 766 | return ldo_vreg->corner + MIN_CORNER_OFFSET; |
| 767 | } |
| 768 | |
| 769 | static int msm_gfx_ldo_is_enabled(struct regulator_dev *rdev) |
| 770 | { |
| 771 | struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev); |
| 772 | |
| 773 | return ldo_vreg->vreg_enabled; |
| 774 | } |
| 775 | |
| 776 | static struct regulator_ops msm_gfx_ldo_corner_ops = { |
| 777 | .enable = msm_gfx_ldo_corner_enable, |
| 778 | .disable = msm_gfx_ldo_disable, |
| 779 | .is_enabled = msm_gfx_ldo_is_enabled, |
| 780 | .set_voltage = msm_gfx_ldo_set_corner, |
| 781 | .get_voltage = msm_gfx_ldo_get_corner, |
| 782 | }; |
| 783 | |
| 784 | static int msm_gfx_ldo_get_bypass(struct regulator_dev *rdev, |
| 785 | bool *enable) |
| 786 | { |
| 787 | struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev); |
| 788 | |
| 789 | *enable = ldo_vreg->mode; |
| 790 | |
| 791 | return 0; |
| 792 | } |
| 793 | |
| 794 | static int msm_gfx_ldo_set_bypass(struct regulator_dev *rdev, |
| 795 | bool mode) |
| 796 | { |
| 797 | struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev); |
| 798 | int rc = 0; |
| 799 | |
| 800 | mutex_lock(&ldo_vreg->ldo_mutex); |
| 801 | |
| 802 | if (ldo_vreg->mode == mode || !ldo_vreg->vreg_enabled) |
| 803 | goto done; |
| 804 | |
| 805 | if (mode == LDO_MODE) |
| 806 | rc = switch_mode_to_ldo(ldo_vreg, ldo_vreg->ldo_voltage_uv); |
| 807 | else |
| 808 | rc = switch_mode_to_bhs(ldo_vreg); |
| 809 | |
| 810 | if (rc) { |
| 811 | pr_err("Failed to configure regulator in %s mode rc=%d\n", |
| 812 | (mode == LDO_MODE) ? "LDO" : "BHS", rc); |
| 813 | goto done; |
| 814 | } |
| 815 | |
| 816 | pr_debug("regulator_set_bypass complete. mode=%s, voltage = %d uV\n", |
| 817 | (mode == LDO_MODE) ? "LDO" : "BHS", |
| 818 | (mode == LDO_MODE) ? ldo_vreg->ldo_voltage_uv : 0); |
| 819 | |
| 820 | ldo_vreg->mode = mode; |
| 821 | |
| 822 | done: |
| 823 | mutex_unlock(&ldo_vreg->ldo_mutex); |
| 824 | return rc; |
| 825 | } |
| 826 | |
| 827 | static int msm_gfx_ldo_voltage_enable(struct regulator_dev *rdev) |
| 828 | { |
| 829 | struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev); |
| 830 | int rc = 0; |
| 831 | enum msm_ldo_supply_mode enable_mode; |
| 832 | |
| 833 | mutex_lock(&ldo_vreg->ldo_mutex); |
| 834 | |
| 835 | pr_debug("regulator_enable requested. voltage=%d\n", |
| 836 | ldo_vreg->ldo_voltage_uv); |
| 837 | |
| 838 | enable_mode = ldo_vreg->mode; |
| 839 | |
| 840 | if (enable_mode == LDO_MODE) |
| 841 | rc = enable_ldo_mode(ldo_vreg, ldo_vreg->ldo_voltage_uv); |
| 842 | else |
| 843 | rc = enable_bhs_mode(ldo_vreg); |
| 844 | |
| 845 | if (rc) { |
| 846 | pr_err("Failed to enable regulator in %s mode rc=%d\n", |
| 847 | (enable_mode == LDO_MODE) ? "LDO" : "BHS", rc); |
| 848 | goto fail; |
| 849 | } |
| 850 | |
| 851 | pr_debug("regulator_enable complete. mode=%s, voltage = %d uV\n", |
| 852 | (enable_mode == LDO_MODE) ? "LDO" : "BHS", |
| 853 | (enable_mode == LDO_MODE) ? ldo_vreg->ldo_voltage_uv : 0); |
| 854 | |
| 855 | ldo_vreg->vreg_enabled = true; |
| 856 | |
| 857 | fail: |
| 858 | mutex_unlock(&ldo_vreg->ldo_mutex); |
| 859 | return rc; |
| 860 | } |
| 861 | |
| 862 | static int msm_gfx_ldo_set_voltage(struct regulator_dev *rdev, |
| 863 | int new_uv, int max_uv, unsigned int *selector) |
| 864 | { |
| 865 | struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev); |
| 866 | int rc = 0; |
| 867 | |
| 868 | mutex_lock(&ldo_vreg->ldo_mutex); |
| 869 | |
| 870 | if (new_uv == ldo_vreg->ldo_voltage_uv) |
| 871 | goto done; |
| 872 | |
| 873 | if (!ldo_vreg->vreg_enabled || ldo_vreg->mode != LDO_MODE) { |
| 874 | ldo_vreg->ldo_voltage_uv = new_uv; |
| 875 | goto done; |
| 876 | } |
| 877 | |
| 878 | /* update LDO voltage */ |
| 879 | rc = ldo_update_voltage(ldo_vreg, new_uv); |
| 880 | if (rc) |
| 881 | pr_err("Update voltage failed for [%d, %d], rc=%d\n", |
| 882 | new_uv, max_uv, rc); |
| 883 | done: |
| 884 | mutex_unlock(&ldo_vreg->ldo_mutex); |
| 885 | return rc; |
| 886 | } |
| 887 | |
| 888 | static int msm_gfx_ldo_get_voltage(struct regulator_dev *rdev) |
| 889 | { |
| 890 | struct msm_gfx_ldo *ldo_vreg = rdev_get_drvdata(rdev); |
| 891 | |
| 892 | return ldo_vreg->ldo_voltage_uv; |
| 893 | } |
| 894 | |
| 895 | static struct regulator_ops msm_gfx_ldo_voltage_ops = { |
| 896 | .enable = msm_gfx_ldo_voltage_enable, |
| 897 | .disable = msm_gfx_ldo_disable, |
| 898 | .is_enabled = msm_gfx_ldo_is_enabled, |
| 899 | .set_voltage = msm_gfx_ldo_set_voltage, |
| 900 | .get_voltage = msm_gfx_ldo_get_voltage, |
| 901 | .set_bypass = msm_gfx_ldo_set_bypass, |
| 902 | .get_bypass = msm_gfx_ldo_get_bypass, |
| 903 | }; |
| 904 | |
| 905 | static int msm_gfx_ldo_adjust_init_voltage(struct msm_gfx_ldo *ldo_vreg) |
| 906 | { |
| 907 | int rc, len, size, i; |
| 908 | u32 *volt_adjust; |
| 909 | struct device_node *of_node = ldo_vreg->dev->of_node; |
| 910 | char *prop_name = "qcom,ldo-init-voltage-adjustment"; |
| 911 | |
| 912 | if (!of_find_property(of_node, prop_name, &len)) { |
| 913 | /* No initial voltage adjustment needed. */ |
| 914 | return 0; |
| 915 | } |
| 916 | |
| 917 | size = len / sizeof(u32); |
| 918 | if (size != ldo_vreg->num_ldo_corners) { |
| 919 | pr_err("%s length=%d is invalid: required:%d\n", |
| 920 | prop_name, size, ldo_vreg->num_ldo_corners); |
| 921 | return -EINVAL; |
| 922 | } |
| 923 | |
| 924 | volt_adjust = devm_kcalloc(ldo_vreg->dev, size, sizeof(*volt_adjust), |
| 925 | GFP_KERNEL); |
| 926 | if (!volt_adjust) |
| 927 | return -ENOMEM; |
| 928 | |
| 929 | rc = of_property_read_u32_array(of_node, prop_name, volt_adjust, size); |
| 930 | if (rc) { |
| 931 | pr_err("failed to read %s property rc=%d\n", prop_name, rc); |
| 932 | return rc; |
| 933 | } |
| 934 | |
| 935 | for (i = 0; i < ldo_vreg->num_corners; i++) { |
| 936 | if (volt_adjust[i]) { |
| 937 | ldo_vreg->open_loop_volt[i] += volt_adjust[i]; |
| 938 | pr_info("adjusted the open-loop voltage[%d] %d -> %d\n", |
| 939 | i + MIN_CORNER_OFFSET, |
| 940 | ldo_vreg->open_loop_volt[i] - volt_adjust[i], |
| 941 | ldo_vreg->open_loop_volt[i]); |
| 942 | } |
| 943 | } |
| 944 | |
| 945 | return 0; |
| 946 | } |
| 947 | |
| 948 | static int msm_gfx_ldo_voltage_init(struct msm_gfx_ldo *ldo_vreg) |
| 949 | { |
| 950 | struct device_node *of_node = ldo_vreg->dev->of_node; |
| 951 | int i, rc, len; |
| 952 | u64 efuse_bits; |
| 953 | |
| 954 | len = ldo_vreg->num_ldo_corners; |
| 955 | |
| 956 | ldo_vreg->open_loop_volt = devm_kcalloc(ldo_vreg->dev, |
| 957 | len, sizeof(*ldo_vreg->open_loop_volt), |
| 958 | GFP_KERNEL); |
| 959 | ldo_vreg->ceiling_volt = devm_kcalloc(ldo_vreg->dev, |
| 960 | len, sizeof(*ldo_vreg->ceiling_volt), |
| 961 | GFP_KERNEL); |
| 962 | ldo_vreg->floor_volt = devm_kcalloc(ldo_vreg->dev, |
| 963 | len, sizeof(*ldo_vreg->floor_volt), |
| 964 | GFP_KERNEL); |
| 965 | |
| 966 | if (!ldo_vreg->open_loop_volt || !ldo_vreg->ceiling_volt |
| 967 | || !ldo_vreg->floor_volt) |
| 968 | return -ENOMEM; |
| 969 | |
| 970 | rc = of_property_read_u32_array(of_node, "qcom,ldo-voltage-ceiling", |
| 971 | ldo_vreg->ceiling_volt, len); |
| 972 | if (rc) { |
| 973 | pr_err("Unable to read qcom,ldo-voltage-ceiling rc=%d\n", rc); |
| 974 | return rc; |
| 975 | } |
| 976 | |
| 977 | rc = of_property_read_u32_array(of_node, "qcom,ldo-voltage-floor", |
| 978 | ldo_vreg->floor_volt, len); |
| 979 | if (rc) { |
| 980 | pr_err("Unable to read qcom,ldo-voltage-floor rc=%d\n", rc); |
| 981 | return rc; |
| 982 | } |
| 983 | |
| 984 | for (i = 0; i < ldo_vreg->num_ldo_corners; i++) { |
| 985 | rc = read_fuse_param(ldo_vreg->efuse_base, |
| 986 | ldo_vreg->init_volt_param[i], |
| 987 | &efuse_bits); |
| 988 | if (rc) { |
| 989 | pr_err("Unable to read init-voltage rc=%d\n", rc); |
| 990 | return rc; |
| 991 | } |
| 992 | ldo_vreg->open_loop_volt[i] = convert_open_loop_voltage_fuse( |
| 993 | ldo_vreg->ref_volt[i], |
| 994 | GFX_LDO_FUSE_STEP_VOLT, |
| 995 | efuse_bits, |
| 996 | GFX_LDO_FUSE_SIZE); |
| 997 | pr_info("LDO corner %d: target-volt = %d uV\n", |
| 998 | i + MIN_CORNER_OFFSET, ldo_vreg->open_loop_volt[i]); |
| 999 | } |
| 1000 | |
| 1001 | rc = msm_gfx_ldo_adjust_init_voltage(ldo_vreg); |
| 1002 | if (rc) { |
| 1003 | pr_err("Unable to adjust init voltages rc=%d\n", rc); |
| 1004 | return rc; |
| 1005 | } |
| 1006 | |
| 1007 | for (i = 0; i < ldo_vreg->num_ldo_corners; i++) { |
| 1008 | if (ldo_vreg->open_loop_volt[i] > ldo_vreg->ceiling_volt[i]) { |
| 1009 | pr_info("Warning: initial voltage[%d] %d above ceiling %d\n", |
| 1010 | i + MIN_CORNER_OFFSET, |
| 1011 | ldo_vreg->open_loop_volt[i], |
| 1012 | ldo_vreg->ceiling_volt[i]); |
| 1013 | ldo_vreg->open_loop_volt[i] = ldo_vreg->ceiling_volt[i]; |
| 1014 | } else if (ldo_vreg->open_loop_volt[i] < |
| 1015 | ldo_vreg->floor_volt[i]) { |
| 1016 | pr_info("Warning: initial voltage[%d] %d below floor %d\n", |
| 1017 | i + MIN_CORNER_OFFSET, |
| 1018 | ldo_vreg->open_loop_volt[i], |
| 1019 | ldo_vreg->floor_volt[i]); |
| 1020 | ldo_vreg->open_loop_volt[i] = ldo_vreg->floor_volt[i]; |
| 1021 | } |
| 1022 | } |
| 1023 | |
| 1024 | efuse_bits = 0; |
| 1025 | rc = read_fuse_param(ldo_vreg->efuse_base, ldo_vreg->ldo_enable_param, |
| 1026 | &efuse_bits); |
| 1027 | if (rc) { |
| 1028 | pr_err("Unable to read ldo_enable_param rc=%d\n", rc); |
| 1029 | return rc; |
| 1030 | } |
| 1031 | ldo_vreg->ldo_fuse_enable = !!efuse_bits; |
| 1032 | pr_info("LDO-mode fuse %s by default\n", ldo_vreg->ldo_fuse_enable ? |
| 1033 | "enabled" : "disabled"); |
| 1034 | |
| 1035 | return rc; |
| 1036 | } |
| 1037 | |
| 1038 | static int msm_gfx_ldo_efuse_init(struct platform_device *pdev, |
| 1039 | struct msm_gfx_ldo *ldo_vreg) |
| 1040 | { |
| 1041 | struct resource *res; |
| 1042 | u32 len; |
| 1043 | |
| 1044 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "efuse_addr"); |
| 1045 | if (!res || !res->start) { |
| 1046 | pr_err("efuse_addr missing: res=%p\n", res); |
| 1047 | return -EINVAL; |
| 1048 | } |
| 1049 | |
| 1050 | ldo_vreg->efuse_addr = res->start; |
| 1051 | len = res->end - res->start + 1; |
| 1052 | |
| 1053 | ldo_vreg->efuse_base = devm_ioremap(&pdev->dev, |
| 1054 | ldo_vreg->efuse_addr, len); |
| 1055 | if (!ldo_vreg->efuse_base) { |
| 1056 | pr_err("Unable to map efuse_addr %pa\n", |
| 1057 | &ldo_vreg->efuse_addr); |
| 1058 | return -EINVAL; |
| 1059 | } |
| 1060 | |
| 1061 | return 0; |
| 1062 | } |
| 1063 | |
| 1064 | static int msm_gfx_ldo_mem_acc_init(struct msm_gfx_ldo *ldo_vreg) |
| 1065 | { |
| 1066 | int rc; |
| 1067 | u32 len, size; |
| 1068 | struct device_node *of_node = ldo_vreg->dev->of_node; |
| 1069 | |
| 1070 | if (of_find_property(ldo_vreg->dev->of_node, "mem-acc-supply", NULL)) { |
| 1071 | ldo_vreg->mem_acc_vreg = devm_regulator_get(ldo_vreg->dev, |
| 1072 | "mem-acc"); |
| 1073 | if (IS_ERR_OR_NULL(ldo_vreg->mem_acc_vreg)) { |
| 1074 | rc = PTR_RET(ldo_vreg->mem_acc_vreg); |
| 1075 | if (rc != -EPROBE_DEFER) |
| 1076 | pr_err("devm_regulator_get: mem-acc: rc=%d\n", |
| 1077 | rc); |
| 1078 | return rc; |
| 1079 | } |
| 1080 | } else { |
| 1081 | pr_debug("mem-acc-supply not specified\n"); |
| 1082 | return 0; |
| 1083 | } |
| 1084 | |
| 1085 | if (!of_find_property(of_node, "qcom,mem-acc-corner-map", &len)) { |
| 1086 | pr_err("qcom,mem-acc-corner-map missing"); |
| 1087 | return -EINVAL; |
| 1088 | } |
| 1089 | |
| 1090 | size = len / sizeof(u32); |
| 1091 | if (size != ldo_vreg->num_corners) { |
| 1092 | pr_err("qcom,mem-acc-corner-map length=%d is invalid: required:%u\n", |
| 1093 | size, ldo_vreg->num_corners); |
| 1094 | return -EINVAL; |
| 1095 | } |
| 1096 | |
| 1097 | ldo_vreg->mem_acc_corner_map = devm_kcalloc(ldo_vreg->dev, size, |
| 1098 | sizeof(*ldo_vreg->mem_acc_corner_map), GFP_KERNEL); |
| 1099 | if (!ldo_vreg->mem_acc_corner_map) |
| 1100 | return -ENOMEM; |
| 1101 | |
| 1102 | rc = of_property_read_u32_array(of_node, "qcom,mem-acc-corner-map", |
| 1103 | ldo_vreg->mem_acc_corner_map, size); |
| 1104 | if (rc) |
| 1105 | pr_err("Unable to read qcom,mem-acc-corner-map rc=%d\n", rc); |
| 1106 | |
| 1107 | return rc; |
| 1108 | } |
| 1109 | |
| 1110 | static int msm_gfx_ldo_init(struct platform_device *pdev, |
| 1111 | struct msm_gfx_ldo *ldo_vreg) |
| 1112 | { |
| 1113 | struct resource *res; |
| 1114 | u32 len, ctl; |
| 1115 | int i = 0; |
| 1116 | |
| 1117 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ldo_addr"); |
| 1118 | if (!res || !res->start) { |
| 1119 | pr_err("ldo_addr missing: res=%p\n", res); |
| 1120 | return -EINVAL; |
| 1121 | } |
| 1122 | |
| 1123 | ldo_vreg->ldo_addr = res->start; |
| 1124 | len = res->end - res->start + 1; |
| 1125 | |
| 1126 | ldo_vreg->ldo_base = devm_ioremap(ldo_vreg->dev, |
| 1127 | ldo_vreg->ldo_addr, len); |
| 1128 | if (!ldo_vreg->ldo_base) { |
| 1129 | pr_err("Unable to map efuse_addr %pa\n", |
| 1130 | &ldo_vreg->ldo_addr); |
| 1131 | return -EINVAL; |
| 1132 | } |
| 1133 | |
| 1134 | /* HW initialization */ |
| 1135 | |
| 1136 | /* clear clamp_io, enable CPR in auto-bypass*/ |
| 1137 | ctl = readl_relaxed(ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 1138 | ctl &= ~LDO_CLAMP_IO_BIT; |
| 1139 | ctl |= EN_LDOAP_CTRL_CPR_BIT; |
| 1140 | writel_relaxed(ctl, ldo_vreg->ldo_base + PWRSWITCH_CTRL_REG); |
| 1141 | |
| 1142 | i = 0; |
| 1143 | while (ldo_vreg->ldo_init_config && |
| 1144 | ldo_vreg->ldo_init_config[i].offset != LDO_MAX_OFFSET) { |
| 1145 | writel_relaxed(ldo_vreg->ldo_init_config[i].value, |
| 1146 | ldo_vreg->ldo_base + |
| 1147 | ldo_vreg->ldo_init_config[i].offset); |
| 1148 | i++; |
| 1149 | } |
| 1150 | /* complete the writes */ |
| 1151 | mb(); |
| 1152 | |
| 1153 | return 0; |
| 1154 | } |
| 1155 | |
| 1156 | static int ldo_parse_cx_parameters(struct msm_gfx_ldo *ldo_vreg) |
| 1157 | { |
| 1158 | struct device_node *of_node = ldo_vreg->dev->of_node; |
| 1159 | int rc, len, size; |
| 1160 | |
| 1161 | if (of_find_property(of_node, "vdd-cx-supply", NULL)) { |
| 1162 | ldo_vreg->vdd_cx = devm_regulator_get(ldo_vreg->dev, "vdd-cx"); |
| 1163 | if (IS_ERR_OR_NULL(ldo_vreg->vdd_cx)) { |
| 1164 | rc = PTR_RET(ldo_vreg->vdd_cx); |
| 1165 | if (rc != -EPROBE_DEFER) |
| 1166 | pr_err("devm_regulator_get: vdd-cx: rc=%d\n", |
| 1167 | rc); |
| 1168 | return rc; |
| 1169 | } |
| 1170 | } else { |
| 1171 | pr_debug("vdd-cx-supply not specified\n"); |
| 1172 | return 0; |
| 1173 | } |
| 1174 | |
| 1175 | if (!of_find_property(of_node, "qcom,vdd-cx-corner-map", &len)) { |
| 1176 | pr_err("qcom,vdd-cx-corner-map missing"); |
| 1177 | return -EINVAL; |
| 1178 | } |
| 1179 | |
| 1180 | size = len / sizeof(u32); |
| 1181 | if (size != ldo_vreg->num_corners) { |
| 1182 | pr_err("qcom,vdd-cx-corner-map length=%d is invalid: required:%u\n", |
| 1183 | size, ldo_vreg->num_corners); |
| 1184 | return -EINVAL; |
| 1185 | } |
| 1186 | |
| 1187 | ldo_vreg->vdd_cx_corner_map = devm_kcalloc(ldo_vreg->dev, size, |
| 1188 | sizeof(*ldo_vreg->vdd_cx_corner_map), GFP_KERNEL); |
| 1189 | if (!ldo_vreg->vdd_cx_corner_map) |
| 1190 | return -ENOMEM; |
| 1191 | |
| 1192 | rc = of_property_read_u32_array(of_node, "qcom,vdd-cx-corner-map", |
| 1193 | ldo_vreg->vdd_cx_corner_map, size); |
| 1194 | if (rc) |
| 1195 | pr_err("Unable to read qcom,vdd-cx-corner-map rc=%d\n", rc); |
| 1196 | |
| 1197 | |
| 1198 | return rc; |
| 1199 | } |
| 1200 | |
| 1201 | static int msm_gfx_ldo_parse_dt(struct msm_gfx_ldo *ldo_vreg) |
| 1202 | { |
| 1203 | struct device_node *of_node = ldo_vreg->dev->of_node; |
| 1204 | int rc, size, len; |
| 1205 | |
| 1206 | rc = of_property_read_u32(of_node, "qcom,num-corners", |
| 1207 | &ldo_vreg->num_corners); |
| 1208 | if (rc < 0) { |
| 1209 | pr_err("Unable to read qcom,num-corners rc=%d\n", rc); |
| 1210 | return rc; |
| 1211 | } |
| 1212 | |
| 1213 | rc = of_property_read_u32(of_node, "qcom,num-ldo-corners", |
| 1214 | &ldo_vreg->num_ldo_corners); |
| 1215 | if (rc) { |
| 1216 | pr_err("Unable to read qcom,num-ldo-corners rc=%d\n", rc); |
| 1217 | return rc; |
| 1218 | } |
| 1219 | |
| 1220 | rc = of_property_read_u32(of_node, "qcom,init-corner", |
| 1221 | &ldo_vreg->corner); |
| 1222 | if (rc) { |
| 1223 | pr_err("Unable to read qcom,init-corner rc=%d\n", rc); |
| 1224 | return rc; |
| 1225 | } |
| 1226 | |
| 1227 | if (!of_find_property(of_node, "qcom,ldo-enable-corner-map", &len)) { |
| 1228 | pr_err("qcom,ldo-enable-corner-map missing\n"); |
| 1229 | return -EINVAL; |
| 1230 | } |
| 1231 | |
| 1232 | size = len / sizeof(u32); |
| 1233 | if (size != ldo_vreg->num_corners) { |
| 1234 | pr_err("qcom,ldo-enable-corner-map length=%d is invalid: required:%u\n", |
| 1235 | size, ldo_vreg->num_corners); |
| 1236 | return -EINVAL; |
| 1237 | } |
| 1238 | |
| 1239 | ldo_vreg->ldo_corner_en_map = devm_kcalloc(ldo_vreg->dev, size, |
| 1240 | sizeof(*ldo_vreg->ldo_corner_en_map), GFP_KERNEL); |
| 1241 | if (!ldo_vreg->ldo_corner_en_map) |
| 1242 | return -ENOMEM; |
| 1243 | |
| 1244 | rc = of_property_read_u32_array(of_node, "qcom,ldo-enable-corner-map", |
| 1245 | ldo_vreg->ldo_corner_en_map, size); |
| 1246 | if (rc) { |
| 1247 | pr_err("Unable to read qcom,ldo-enable-corner-map rc=%d\n", |
| 1248 | rc); |
| 1249 | return rc; |
| 1250 | } |
| 1251 | |
| 1252 | rc = ldo_parse_cx_parameters(ldo_vreg); |
| 1253 | if (rc) { |
| 1254 | pr_err("Unable to parse CX parameters rc=%d\n", rc); |
| 1255 | return rc; |
| 1256 | } |
| 1257 | |
| 1258 | return 0; |
| 1259 | } |
| 1260 | |
| 1261 | static int msm_gfx_ldo_target_init(struct msm_gfx_ldo *ldo_vreg) |
| 1262 | { |
| 1263 | int i; |
| 1264 | |
| 1265 | /* MSM8953 */ |
| 1266 | ldo_vreg->init_volt_param = devm_kzalloc(ldo_vreg->dev, |
| 1267 | (MSM8953_LDO_FUSE_CORNERS * |
| 1268 | sizeof(struct fuse_param *)), GFP_KERNEL); |
| 1269 | if (!ldo_vreg->init_volt_param) |
| 1270 | return -ENOMEM; |
| 1271 | |
| 1272 | for (i = 0; i < MSM8953_LDO_FUSE_CORNERS; i++) |
| 1273 | ldo_vreg->init_volt_param[i] = |
| 1274 | msm8953_init_voltage_param[i]; |
| 1275 | |
| 1276 | ldo_vreg->ref_volt = msm8953_fuse_ref_volt; |
| 1277 | ldo_vreg->ldo_enable_param = msm8953_ldo_enable_param; |
| 1278 | |
| 1279 | return 0; |
| 1280 | } |
| 1281 | |
| 1282 | static int debugfs_ldo_mode_disable_set(void *data, u64 val) |
| 1283 | { |
| 1284 | struct msm_gfx_ldo *ldo_vreg = data; |
| 1285 | |
| 1286 | ldo_vreg->ldo_mode_disable = !!val; |
| 1287 | |
| 1288 | pr_debug("LDO-mode %s\n", ldo_vreg->ldo_mode_disable ? |
| 1289 | "disabled" : "enabled"); |
| 1290 | |
| 1291 | return 0; |
| 1292 | } |
| 1293 | |
| 1294 | static int debugfs_ldo_mode_disable_get(void *data, u64 *val) |
| 1295 | { |
| 1296 | struct msm_gfx_ldo *ldo_vreg = data; |
| 1297 | |
| 1298 | *val = ldo_vreg->ldo_mode_disable; |
| 1299 | |
| 1300 | return 0; |
| 1301 | } |
| 1302 | |
| 1303 | DEFINE_SIMPLE_ATTRIBUTE(ldo_mode_disable_fops, debugfs_ldo_mode_disable_get, |
| 1304 | debugfs_ldo_mode_disable_set, "%llu\n"); |
| 1305 | |
| 1306 | static int debugfs_ldo_set_voltage(void *data, u64 val) |
| 1307 | { |
| 1308 | struct msm_gfx_ldo *ldo_vreg = data; |
| 1309 | int rc = 0, timeout = 50; |
| 1310 | u32 reg = 0, voltage = 0; |
| 1311 | |
| 1312 | mutex_lock(&ldo_vreg->ldo_mutex); |
| 1313 | |
| 1314 | if (ldo_vreg->mode == BHS_MODE || !ldo_vreg->vreg_enabled || |
| 1315 | val > MAX_LDO_VOLTAGE || val < MIN_LDO_VOLTAGE) { |
| 1316 | rc = -EINVAL; |
| 1317 | goto done; |
| 1318 | } |
| 1319 | voltage = GET_VREF((u32)val); |
| 1320 | |
| 1321 | reg = readl_relaxed(ldo_vreg->ldo_base + LDO_VREF_SET_REG); |
| 1322 | |
| 1323 | /* set the new voltage */ |
| 1324 | reg &= ~VREF_VAL_MASK; |
| 1325 | reg |= voltage & VREF_VAL_MASK; |
| 1326 | writel_relaxed(reg, ldo_vreg->ldo_base + LDO_VREF_SET_REG); |
| 1327 | |
| 1328 | /* Initiate VREF update */ |
| 1329 | reg |= UPDATE_VREF_BIT; |
| 1330 | writel_relaxed(reg, ldo_vreg->ldo_base + LDO_VREF_SET_REG); |
| 1331 | |
| 1332 | /* complete the writes */ |
| 1333 | mb(); |
| 1334 | |
| 1335 | reg &= ~UPDATE_VREF_BIT; |
| 1336 | writel_relaxed(reg, ldo_vreg->ldo_base + LDO_VREF_SET_REG); |
| 1337 | |
| 1338 | /* complete the writes */ |
| 1339 | mb(); |
| 1340 | |
| 1341 | while (--timeout) { |
| 1342 | reg = readl_relaxed(ldo_vreg->ldo_base + |
| 1343 | PWRSWITCH_STATUS_REG); |
| 1344 | if (reg & (LDO_VREF_SETTLED_BIT | LDO_READY_BIT)) |
| 1345 | break; |
| 1346 | |
| 1347 | udelay(10); |
| 1348 | } |
| 1349 | if (!timeout) { |
| 1350 | pr_err("LDO_VREF_SETTLED not set PWRSWITCH_STATUS = 0x%x\n", |
| 1351 | reg); |
| 1352 | rc = -EBUSY; |
| 1353 | } else { |
| 1354 | ldo_vreg->ldo_voltage_uv = val; |
| 1355 | pr_debug("LDO voltage set to %d uV\n", |
| 1356 | ldo_vreg->ldo_voltage_uv); |
| 1357 | } |
| 1358 | done: |
| 1359 | mutex_unlock(&ldo_vreg->ldo_mutex); |
| 1360 | return rc; |
| 1361 | } |
| 1362 | |
| 1363 | static int debugfs_ldo_get_voltage(void *data, u64 *val) |
| 1364 | { |
| 1365 | struct msm_gfx_ldo *ldo_vreg = data; |
| 1366 | int rc = 0; |
| 1367 | u32 reg; |
| 1368 | |
| 1369 | mutex_lock(&ldo_vreg->ldo_mutex); |
| 1370 | |
| 1371 | if (ldo_vreg->mode == BHS_MODE || !ldo_vreg->vreg_enabled) { |
| 1372 | rc = -EINVAL; |
| 1373 | goto done; |
| 1374 | } |
| 1375 | |
| 1376 | reg = readl_relaxed(ldo_vreg->ldo_base + LDO_VREF_SET_REG); |
| 1377 | reg &= VREF_VAL_MASK; |
| 1378 | |
| 1379 | *val = (reg * LDO_STEP_VOLATGE) + MIN_LDO_VOLTAGE; |
| 1380 | done: |
| 1381 | mutex_unlock(&ldo_vreg->ldo_mutex); |
| 1382 | return rc; |
| 1383 | } |
| 1384 | DEFINE_SIMPLE_ATTRIBUTE(ldo_voltage_fops, debugfs_ldo_get_voltage, |
| 1385 | debugfs_ldo_set_voltage, "%llu\n"); |
| 1386 | |
| 1387 | static int msm_gfx_ldo_debug_info_open(struct inode *inode, struct file *file) |
| 1388 | { |
| 1389 | file->private_data = inode->i_private; |
| 1390 | |
| 1391 | return 0; |
| 1392 | } |
| 1393 | |
| 1394 | static ssize_t msm_gfx_ldo_debug_info_read(struct file *file, char __user *buff, |
| 1395 | size_t count, loff_t *ppos) |
| 1396 | { |
| 1397 | struct msm_gfx_ldo *ldo_vreg = file->private_data; |
| 1398 | char *debugfs_buf; |
| 1399 | ssize_t len, ret = 0; |
| 1400 | u32 i = 0, reg[MAX_LDO_REGS]; |
| 1401 | |
| 1402 | debugfs_buf = kmalloc(PAGE_SIZE, GFP_KERNEL); |
| 1403 | if (!debugfs_buf) |
| 1404 | return -ENOMEM; |
| 1405 | |
| 1406 | mutex_lock(&ldo_vreg->ldo_mutex); |
| 1407 | |
| 1408 | len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret, |
| 1409 | "Regulator_enable = %d Regulator mode = %s Corner = %d LDO-voltage = %d uV\n", |
| 1410 | ldo_vreg->vreg_enabled, |
| 1411 | ldo_vreg->mode == BHS_MODE ? "BHS" : "LDO", |
| 1412 | ldo_vreg->corner + MIN_CORNER_OFFSET, |
| 1413 | ldo_vreg->ldo_voltage_uv); |
| 1414 | ret += len; |
| 1415 | |
| 1416 | for (i = 0; i < MAX_LDO_REGS; i++) { |
| 1417 | reg[i] = 0; |
| 1418 | reg[i] = readl_relaxed(ldo_vreg->ldo_base + (i * 4)); |
| 1419 | len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret, |
| 1420 | "%s = 0x%x\n", register_str[i], reg[i]); |
| 1421 | ret += len; |
| 1422 | } |
| 1423 | |
| 1424 | mutex_unlock(&ldo_vreg->ldo_mutex); |
| 1425 | |
| 1426 | ret = simple_read_from_buffer(buff, count, ppos, debugfs_buf, ret); |
| 1427 | kfree(debugfs_buf); |
| 1428 | |
| 1429 | return ret; |
| 1430 | } |
| 1431 | |
| 1432 | static const struct file_operations msm_gfx_ldo_debug_info_fops = { |
| 1433 | .open = msm_gfx_ldo_debug_info_open, |
| 1434 | .read = msm_gfx_ldo_debug_info_read, |
| 1435 | }; |
| 1436 | |
| 1437 | static void msm_gfx_ldo_debugfs_init(struct msm_gfx_ldo *ldo_vreg) |
| 1438 | { |
| 1439 | struct dentry *temp; |
| 1440 | |
| 1441 | ldo_vreg->debugfs = debugfs_create_dir("msm_gfx_ldo", NULL); |
| 1442 | if (!ldo_vreg->debugfs) { |
| 1443 | pr_err("Couldn't create debug dir\n"); |
| 1444 | return; |
| 1445 | } |
| 1446 | |
| 1447 | temp = debugfs_create_file("debug_info", 0444, ldo_vreg->debugfs, |
| 1448 | ldo_vreg, &msm_gfx_ldo_debug_info_fops); |
| 1449 | if (IS_ERR_OR_NULL(temp)) { |
| 1450 | pr_err("debug_info node creation failed\n"); |
| 1451 | return; |
| 1452 | } |
| 1453 | |
| 1454 | temp = debugfs_create_file("ldo_voltage", 0644, ldo_vreg->debugfs, |
| 1455 | ldo_vreg, &ldo_voltage_fops); |
| 1456 | if (IS_ERR_OR_NULL(temp)) { |
| 1457 | pr_err("ldo_voltage node creation failed\n"); |
| 1458 | return; |
| 1459 | } |
| 1460 | |
| 1461 | temp = debugfs_create_file("ldo_mode_disable", 0644, ldo_vreg->debugfs, |
| 1462 | ldo_vreg, &ldo_mode_disable_fops); |
| 1463 | if (IS_ERR_OR_NULL(temp)) { |
| 1464 | pr_err("ldo_mode_disable node creation failed\n"); |
| 1465 | return; |
| 1466 | } |
| 1467 | } |
| 1468 | |
| 1469 | static void msm_gfx_ldo_debugfs_remove(struct msm_gfx_ldo *ldo_vreg) |
| 1470 | { |
| 1471 | debugfs_remove_recursive(ldo_vreg->debugfs); |
| 1472 | } |
| 1473 | |
| 1474 | static int msm_gfx_ldo_corner_config_init(struct msm_gfx_ldo *ldo_vreg, |
| 1475 | struct platform_device *pdev) |
| 1476 | { |
| 1477 | int rc; |
| 1478 | |
| 1479 | rc = msm_gfx_ldo_target_init(ldo_vreg); |
| 1480 | if (rc) { |
| 1481 | pr_err("Unable to initialize target specific data rc=%d", rc); |
| 1482 | return rc; |
| 1483 | } |
| 1484 | |
| 1485 | rc = msm_gfx_ldo_parse_dt(ldo_vreg); |
| 1486 | if (rc) { |
| 1487 | pr_err("Unable to pasrse dt rc=%d\n", rc); |
| 1488 | return rc; |
| 1489 | } |
| 1490 | |
| 1491 | rc = msm_gfx_ldo_efuse_init(pdev, ldo_vreg); |
| 1492 | if (rc) { |
| 1493 | pr_err("efuse_init failed rc=%d\n", rc); |
| 1494 | return rc; |
| 1495 | } |
| 1496 | |
| 1497 | rc = msm_gfx_ldo_voltage_init(ldo_vreg); |
| 1498 | if (rc) { |
| 1499 | pr_err("ldo_voltage_init failed rc=%d\n", rc); |
| 1500 | return rc; |
| 1501 | } |
| 1502 | |
| 1503 | rc = msm_gfx_ldo_mem_acc_init(ldo_vreg); |
| 1504 | if (rc) { |
| 1505 | pr_err("Unable to initialize mem_acc rc=%d\n", rc); |
| 1506 | return rc; |
| 1507 | } |
| 1508 | |
| 1509 | return rc; |
| 1510 | }; |
| 1511 | |
| 1512 | /* Data corresponds to the SoC revision */ |
| 1513 | static const struct of_device_id msm_gfx_ldo_match_table[] = { |
| 1514 | { |
| 1515 | .compatible = "qcom,msm8953-gfx-ldo", |
| 1516 | .data = (void *)(uintptr_t)MSM8953_SOC_ID, |
| 1517 | }, |
| 1518 | { |
| 1519 | .compatible = "qcom,sdm660-gfx-ldo", |
| 1520 | .data = (void *)(uintptr_t)SDM660_SOC_ID, |
| 1521 | }, |
| 1522 | {} |
| 1523 | }; |
| 1524 | |
| 1525 | static int msm_gfx_ldo_probe(struct platform_device *pdev) |
| 1526 | { |
| 1527 | struct msm_gfx_ldo *ldo_vreg; |
| 1528 | struct regulator_config reg_config = {}; |
| 1529 | struct regulator_desc *rdesc; |
| 1530 | struct regulator_init_data *init_data = pdev->dev.platform_data; |
| 1531 | struct device *dev = &pdev->dev; |
| 1532 | const struct of_device_id *match; |
| 1533 | int soc_id, rc; |
| 1534 | |
| 1535 | match = of_match_device(msm_gfx_ldo_match_table, dev); |
| 1536 | if (!match) |
| 1537 | return -ENODEV; |
| 1538 | |
| 1539 | ldo_vreg = devm_kzalloc(dev, sizeof(*ldo_vreg), GFP_KERNEL); |
| 1540 | if (!ldo_vreg) |
| 1541 | return -ENOMEM; |
| 1542 | |
| 1543 | init_data = of_get_regulator_init_data(dev, dev->of_node, NULL); |
| 1544 | if (!init_data) { |
| 1545 | pr_err("regulator init data is missing\n"); |
| 1546 | return -EINVAL; |
| 1547 | } |
| 1548 | |
| 1549 | init_data->constraints.input_uV = init_data->constraints.max_uV; |
| 1550 | init_data->constraints.valid_ops_mask |
| 1551 | |= REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS; |
| 1552 | |
| 1553 | ldo_vreg->rdesc.name = init_data->constraints.name; |
| 1554 | if (ldo_vreg->rdesc.name == NULL) { |
| 1555 | dev_err(dev, "regulator-name missing\n"); |
| 1556 | return -EINVAL; |
| 1557 | } |
| 1558 | |
| 1559 | soc_id = (uintptr_t)match->data; |
| 1560 | ldo_vreg->dev = &pdev->dev; |
| 1561 | mutex_init(&ldo_vreg->ldo_mutex); |
| 1562 | platform_set_drvdata(pdev, ldo_vreg); |
| 1563 | |
| 1564 | switch (soc_id) { |
| 1565 | case MSM8953_SOC_ID: |
| 1566 | ldo_vreg->ldo_init_config = msm8953_ldo_config; |
| 1567 | ldo_vreg->ops_type = CORNER; |
| 1568 | rc = msm_gfx_ldo_corner_config_init(ldo_vreg, pdev); |
| 1569 | if (rc) { |
| 1570 | pr_err("ldo corner handling initialization failed, rc=%d\n", |
| 1571 | rc); |
| 1572 | return rc; |
| 1573 | } |
| 1574 | break; |
| 1575 | case SDM660_SOC_ID: |
| 1576 | ldo_vreg->ldo_init_config = sdm660_ldo_config; |
| 1577 | ldo_vreg->ops_type = VOLTAGE; |
| 1578 | init_data->constraints.valid_ops_mask |
| 1579 | |= REGULATOR_CHANGE_BYPASS; |
| 1580 | break; |
| 1581 | default: |
| 1582 | pr_err("invalid SOC ID = %d\n", soc_id); |
| 1583 | return -EINVAL; |
| 1584 | } |
| 1585 | |
| 1586 | /* HW initialization */ |
| 1587 | rc = msm_gfx_ldo_init(pdev, ldo_vreg); |
| 1588 | if (rc) { |
| 1589 | pr_err("ldo_init failed rc=%d\n", rc); |
| 1590 | return rc; |
| 1591 | } |
| 1592 | |
| 1593 | rdesc = &ldo_vreg->rdesc; |
| 1594 | rdesc->owner = THIS_MODULE; |
| 1595 | rdesc->type = REGULATOR_VOLTAGE; |
| 1596 | |
| 1597 | if (ldo_vreg->ops_type == CORNER) |
| 1598 | rdesc->ops = &msm_gfx_ldo_corner_ops; |
| 1599 | else |
| 1600 | rdesc->ops = &msm_gfx_ldo_voltage_ops; |
| 1601 | |
| 1602 | reg_config.dev = &pdev->dev; |
| 1603 | reg_config.init_data = init_data; |
| 1604 | reg_config.driver_data = ldo_vreg; |
| 1605 | reg_config.of_node = pdev->dev.of_node; |
| 1606 | ldo_vreg->rdev = regulator_register(rdesc, ®_config); |
| 1607 | if (IS_ERR(ldo_vreg->rdev)) { |
| 1608 | rc = PTR_ERR(ldo_vreg->rdev); |
| 1609 | pr_err("regulator_register failed: rc=%d\n", rc); |
| 1610 | return rc; |
| 1611 | } |
| 1612 | |
| 1613 | msm_gfx_ldo_debugfs_init(ldo_vreg); |
| 1614 | |
| 1615 | return 0; |
| 1616 | } |
| 1617 | |
| 1618 | static int msm_gfx_ldo_remove(struct platform_device *pdev) |
| 1619 | { |
| 1620 | struct msm_gfx_ldo *ldo_vreg = platform_get_drvdata(pdev); |
| 1621 | |
| 1622 | regulator_unregister(ldo_vreg->rdev); |
| 1623 | |
| 1624 | msm_gfx_ldo_debugfs_remove(ldo_vreg); |
| 1625 | |
| 1626 | return 0; |
| 1627 | } |
| 1628 | |
| 1629 | static struct platform_driver msm_gfx_ldo_driver = { |
| 1630 | .driver = { |
| 1631 | .name = "qcom,msm-gfx-ldo", |
| 1632 | .of_match_table = msm_gfx_ldo_match_table, |
| 1633 | .owner = THIS_MODULE, |
| 1634 | }, |
| 1635 | .probe = msm_gfx_ldo_probe, |
| 1636 | .remove = msm_gfx_ldo_remove, |
| 1637 | }; |
| 1638 | |
| 1639 | static int msm_gfx_ldo_platform_init(void) |
| 1640 | { |
| 1641 | return platform_driver_register(&msm_gfx_ldo_driver); |
| 1642 | } |
| 1643 | arch_initcall(msm_gfx_ldo_platform_init); |
| 1644 | |
| 1645 | static void msm_gfx_ldo_platform_exit(void) |
| 1646 | { |
| 1647 | platform_driver_unregister(&msm_gfx_ldo_driver); |
| 1648 | } |
| 1649 | module_exit(msm_gfx_ldo_platform_exit); |
| 1650 | |
| 1651 | MODULE_DESCRIPTION("MSM GFX LDO driver"); |
| 1652 | MODULE_LICENSE("GPL v2"); |