Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 1 | /******************************************************************************* |
| 2 | |
| 3 | Intel 82599 Virtual Function driver |
Mark Rustad | 06380db | 2014-03-04 03:02:23 +0000 | [diff] [blame] | 4 | Copyright(c) 1999 - 2014 Intel Corporation. |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 5 | |
| 6 | This program is free software; you can redistribute it and/or modify it |
| 7 | under the terms and conditions of the GNU General Public License, |
| 8 | version 2, as published by the Free Software Foundation. |
| 9 | |
| 10 | This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License along with |
| 16 | this program; if not, write to the Free Software Foundation, Inc., |
| 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 18 | |
| 19 | The full GNU General Public License is included in this distribution in |
| 20 | the file called "COPYING". |
| 21 | |
| 22 | Contact Information: |
| 23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
| 24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 25 | |
| 26 | *******************************************************************************/ |
| 27 | |
| 28 | #ifndef __IXGBE_VF_H__ |
| 29 | #define __IXGBE_VF_H__ |
| 30 | |
| 31 | #include <linux/pci.h> |
| 32 | #include <linux/delay.h> |
| 33 | #include <linux/interrupt.h> |
| 34 | #include <linux/if_ether.h> |
Jiri Pirko | 5c58c47 | 2010-03-23 22:58:20 +0000 | [diff] [blame] | 35 | #include <linux/netdevice.h> |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 36 | |
| 37 | #include "defines.h" |
| 38 | #include "regs.h" |
| 39 | #include "mbx.h" |
| 40 | |
| 41 | struct ixgbe_hw; |
| 42 | |
| 43 | /* iterator type for walking multicast address lists */ |
| 44 | typedef u8* (*ixgbe_mc_addr_itr) (struct ixgbe_hw *hw, u8 **mc_addr_ptr, |
| 45 | u32 *vmdq); |
| 46 | struct ixgbe_mac_operations { |
| 47 | s32 (*init_hw)(struct ixgbe_hw *); |
| 48 | s32 (*reset_hw)(struct ixgbe_hw *); |
| 49 | s32 (*start_hw)(struct ixgbe_hw *); |
| 50 | s32 (*clear_hw_cntrs)(struct ixgbe_hw *); |
| 51 | enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *); |
| 52 | u32 (*get_supported_physical_layer)(struct ixgbe_hw *); |
| 53 | s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *); |
| 54 | s32 (*stop_adapter)(struct ixgbe_hw *); |
| 55 | s32 (*get_bus_info)(struct ixgbe_hw *); |
| 56 | |
| 57 | /* Link */ |
| 58 | s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool, bool); |
| 59 | s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool); |
| 60 | s32 (*get_link_capabilities)(struct ixgbe_hw *, ixgbe_link_speed *, |
| 61 | bool *); |
| 62 | |
| 63 | /* RAR, Multicast, VLAN */ |
| 64 | s32 (*set_rar)(struct ixgbe_hw *, u32, u8 *, u32); |
Greg Rose | 46ec20f | 2011-05-13 01:33:42 +0000 | [diff] [blame] | 65 | s32 (*set_uc_addr)(struct ixgbe_hw *, u32, u8 *); |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 66 | s32 (*init_rx_addrs)(struct ixgbe_hw *); |
Jiri Pirko | 5c58c47 | 2010-03-23 22:58:20 +0000 | [diff] [blame] | 67 | s32 (*update_mc_addr_list)(struct ixgbe_hw *, struct net_device *); |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 68 | s32 (*enable_mc)(struct ixgbe_hw *); |
| 69 | s32 (*disable_mc)(struct ixgbe_hw *); |
| 70 | s32 (*clear_vfta)(struct ixgbe_hw *); |
| 71 | s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool); |
| 72 | }; |
| 73 | |
| 74 | enum ixgbe_mac_type { |
| 75 | ixgbe_mac_unknown = 0, |
| 76 | ixgbe_mac_82599_vf, |
Greg Rose | 2316aa2 | 2010-12-02 07:12:26 +0000 | [diff] [blame] | 77 | ixgbe_mac_X540_vf, |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 78 | ixgbe_num_macs |
| 79 | }; |
| 80 | |
| 81 | struct ixgbe_mac_info { |
| 82 | struct ixgbe_mac_operations ops; |
| 83 | u8 addr[6]; |
| 84 | u8 perm_addr[6]; |
| 85 | |
| 86 | enum ixgbe_mac_type type; |
| 87 | |
| 88 | s32 mc_filter_type; |
| 89 | |
| 90 | bool get_link_status; |
| 91 | u32 max_tx_queues; |
| 92 | u32 max_rx_queues; |
| 93 | u32 max_msix_vectors; |
| 94 | }; |
| 95 | |
| 96 | struct ixgbe_mbx_operations { |
| 97 | s32 (*init_params)(struct ixgbe_hw *hw); |
| 98 | s32 (*read)(struct ixgbe_hw *, u32 *, u16); |
| 99 | s32 (*write)(struct ixgbe_hw *, u32 *, u16); |
| 100 | s32 (*read_posted)(struct ixgbe_hw *, u32 *, u16); |
| 101 | s32 (*write_posted)(struct ixgbe_hw *, u32 *, u16); |
| 102 | s32 (*check_for_msg)(struct ixgbe_hw *); |
| 103 | s32 (*check_for_ack)(struct ixgbe_hw *); |
| 104 | s32 (*check_for_rst)(struct ixgbe_hw *); |
| 105 | }; |
| 106 | |
| 107 | struct ixgbe_mbx_stats { |
| 108 | u32 msgs_tx; |
| 109 | u32 msgs_rx; |
| 110 | |
| 111 | u32 acks; |
| 112 | u32 reqs; |
| 113 | u32 rsts; |
| 114 | }; |
| 115 | |
| 116 | struct ixgbe_mbx_info { |
| 117 | struct ixgbe_mbx_operations ops; |
| 118 | struct ixgbe_mbx_stats stats; |
| 119 | u32 timeout; |
| 120 | u32 udelay; |
| 121 | u32 v2p_mailbox; |
| 122 | u16 size; |
| 123 | }; |
| 124 | |
| 125 | struct ixgbe_hw { |
| 126 | void *back; |
| 127 | |
| 128 | u8 __iomem *hw_addr; |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 129 | |
| 130 | struct ixgbe_mac_info mac; |
| 131 | struct ixgbe_mbx_info mbx; |
| 132 | |
| 133 | u16 device_id; |
| 134 | u16 subsystem_vendor_id; |
| 135 | u16 subsystem_device_id; |
| 136 | u16 vendor_id; |
| 137 | |
| 138 | u8 revision_id; |
| 139 | bool adapter_stopped; |
Alexander Duyck | 3118678 | 2012-07-20 08:09:58 +0000 | [diff] [blame] | 140 | |
| 141 | int api_version; |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 142 | }; |
| 143 | |
| 144 | struct ixgbevf_hw_stats { |
| 145 | u64 base_vfgprc; |
| 146 | u64 base_vfgptc; |
| 147 | u64 base_vfgorc; |
| 148 | u64 base_vfgotc; |
| 149 | u64 base_vfmprc; |
| 150 | |
| 151 | u64 last_vfgprc; |
| 152 | u64 last_vfgptc; |
| 153 | u64 last_vfgorc; |
| 154 | u64 last_vfgotc; |
| 155 | u64 last_vfmprc; |
| 156 | |
| 157 | u64 vfgprc; |
| 158 | u64 vfgptc; |
| 159 | u64 vfgorc; |
| 160 | u64 vfgotc; |
| 161 | u64 vfmprc; |
Greg Rose | 33bd9f6 | 2010-03-19 02:59:52 +0000 | [diff] [blame] | 162 | |
| 163 | u64 saved_reset_vfgprc; |
| 164 | u64 saved_reset_vfgptc; |
| 165 | u64 saved_reset_vfgorc; |
| 166 | u64 saved_reset_vfgotc; |
| 167 | u64 saved_reset_vfmprc; |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 168 | }; |
| 169 | |
| 170 | struct ixgbevf_info { |
| 171 | enum ixgbe_mac_type mac; |
Stephen Hemminger | 3d8fe98 | 2012-01-18 22:13:34 +0000 | [diff] [blame] | 172 | const struct ixgbe_mac_operations *mac_ops; |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 173 | }; |
| 174 | |
Mark Rustad | dbf8b0d | 2014-03-04 03:02:34 +0000 | [diff] [blame^] | 175 | #define IXGBE_FAILED_READ_REG 0xffffffffU |
| 176 | |
| 177 | #define IXGBE_REMOVED(a) unlikely(!(a)) |
| 178 | |
Mark Rustad | 06380db | 2014-03-04 03:02:23 +0000 | [diff] [blame] | 179 | static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value) |
| 180 | { |
| 181 | writel(value, hw->hw_addr + reg); |
| 182 | } |
| 183 | #define IXGBE_WRITE_REG(h, r, v) ixgbe_write_reg(h, r, v) |
| 184 | |
Mark Rustad | dbf8b0d | 2014-03-04 03:02:34 +0000 | [diff] [blame^] | 185 | u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg); |
Mark Rustad | 06380db | 2014-03-04 03:02:23 +0000 | [diff] [blame] | 186 | #define IXGBE_READ_REG(h, r) ixgbe_read_reg(h, r) |
| 187 | |
| 188 | static inline void ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, |
| 189 | u32 offset, u32 value) |
| 190 | { |
| 191 | ixgbe_write_reg(hw, reg + (offset << 2), value); |
| 192 | } |
| 193 | #define IXGBE_WRITE_REG_ARRAY(h, r, o, v) ixgbe_write_reg_array(h, r, o, v) |
| 194 | |
| 195 | static inline u32 ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, |
| 196 | u32 offset) |
| 197 | { |
| 198 | return ixgbe_read_reg(hw, reg + (offset << 2)); |
| 199 | } |
| 200 | #define IXGBE_READ_REG_ARRAY(h, r, o) ixgbe_read_reg_array(h, r, o) |
| 201 | |
Alexander Duyck | dd1fe11 | 2012-07-20 08:09:48 +0000 | [diff] [blame] | 202 | void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size); |
Alexander Duyck | 3118678 | 2012-07-20 08:09:58 +0000 | [diff] [blame] | 203 | int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api); |
Alexander Duyck | 56e9409 | 2012-07-20 08:10:03 +0000 | [diff] [blame] | 204 | int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, |
| 205 | unsigned int *default_tc); |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 206 | #endif /* __IXGBE_VF_H__ */ |
| 207 | |