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Jammy Zhoua72ce6f2015-05-22 18:55:07 +08001/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef _GPU_SCHEDULER_H_
25#define _GPU_SCHEDULER_H_
26
27#include <linux/kfifo.h>
Chunming Zhou4cef9262015-08-05 19:52:14 +080028#include <linux/fence.h>
Jammy Zhoua72ce6f2015-05-22 18:55:07 +080029
Christian König393a0bd2015-11-05 12:57:10 +010030#define AMD_SCHED_FENCE_SCHEDULED_BIT FENCE_FLAG_USER_BITS
31
Jammy Zhoua72ce6f2015-05-22 18:55:07 +080032struct amd_gpu_scheduler;
Christian König432a4ff2015-08-12 11:46:04 +020033struct amd_sched_rq;
Jammy Zhoua72ce6f2015-05-22 18:55:07 +080034
Chunming Zhouf5617f92015-11-05 11:41:50 +080035extern struct kmem_cache *sched_fence_slab;
36extern atomic_t sched_fence_slab_ref;
37
Jammy Zhoua72ce6f2015-05-22 18:55:07 +080038/**
39 * A scheduler entity is a wrapper around a job queue or a group
40 * of other entities. Entities take turns emitting jobs from their
41 * job queues to corresponding hardware ring based on scheduling
42 * policy.
43*/
44struct amd_sched_entity {
45 struct list_head list;
Christian König0f75aee2015-09-07 18:07:14 +020046 struct amd_sched_rq *rq;
47 struct amd_gpu_scheduler *sched;
48
Christian König91404fb2015-08-05 18:33:21 +020049 spinlock_t queue_lock;
Christian König0f75aee2015-09-07 18:07:14 +020050 struct kfifo job_queue;
51
52 atomic_t fence_seq;
Chunming Zhouf556cb0c2015-08-02 11:18:04 +080053 uint64_t fence_context;
Christian König0f75aee2015-09-07 18:07:14 +020054
Christian Könige61235d2015-08-25 11:05:36 +020055 struct fence *dependency;
56 struct fence_cb cb;
Jammy Zhoua72ce6f2015-05-22 18:55:07 +080057};
58
59/**
60 * Run queue is a set of entities scheduling command submissions for
61 * one specific ring. It implements the scheduling policy that selects
62 * the next entity to emit commands from.
63*/
Christian König432a4ff2015-08-12 11:46:04 +020064struct amd_sched_rq {
Christian König2b184d82015-08-18 14:41:25 +020065 spinlock_t lock;
Christian König432a4ff2015-08-12 11:46:04 +020066 struct list_head entities;
67 struct amd_sched_entity *current_entity;
Jammy Zhoua72ce6f2015-05-22 18:55:07 +080068};
69
Chunming Zhouf556cb0c2015-08-02 11:18:04 +080070struct amd_sched_fence {
71 struct fence base;
Christian König258f3f92015-08-31 17:02:52 +020072 struct fence_cb cb;
Christian König393a0bd2015-11-05 12:57:10 +010073 struct list_head scheduled_cb;
Christian König9b398fa2015-09-07 18:16:49 +020074 struct amd_gpu_scheduler *sched;
Chunming Zhouf556cb0c2015-08-02 11:18:04 +080075 spinlock_t lock;
Chunming Zhou84f76ea2015-08-24 12:47:36 +080076 void *owner;
Junwei Zhang2440ff22015-10-10 08:48:42 +080077 struct delayed_work dwork;
78 struct list_head list;
Chunming Zhouf556cb0c2015-08-02 11:18:04 +080079};
80
Chunming Zhou4cef9262015-08-05 19:52:14 +080081struct amd_sched_job {
Chunming Zhou4cef9262015-08-05 19:52:14 +080082 struct amd_gpu_scheduler *sched;
Chunming Zhou953e8fd2015-08-06 15:19:12 +080083 struct amd_sched_entity *s_entity;
Chunming Zhouf556cb0c2015-08-02 11:18:04 +080084 struct amd_sched_fence *s_fence;
Chunming Zhou4cef9262015-08-05 19:52:14 +080085};
86
Chunming Zhouf556cb0c2015-08-02 11:18:04 +080087extern const struct fence_ops amd_sched_fence_ops;
88static inline struct amd_sched_fence *to_amd_sched_fence(struct fence *f)
89{
90 struct amd_sched_fence *__f = container_of(f, struct amd_sched_fence, base);
91
92 if (__f->base.ops == &amd_sched_fence_ops)
93 return __f;
94
95 return NULL;
96}
97
Jammy Zhoua72ce6f2015-05-22 18:55:07 +080098/**
99 * Define the backend operations called by the scheduler,
100 * these functions should be implemented in driver side
101*/
102struct amd_sched_backend_ops {
Junwei Zhang4c7eb912015-09-09 09:05:55 +0800103 struct fence *(*dependency)(struct amd_sched_job *sched_job);
104 struct fence *(*run_job)(struct amd_sched_job *sched_job);
Jammy Zhoua72ce6f2015-05-22 18:55:07 +0800105};
106
Chunming Zhoud033a6d2015-11-05 15:23:09 +0800107enum amd_sched_priority {
108 AMD_SCHED_PRIORITY_KERNEL = 0,
109 AMD_SCHED_PRIORITY_NORMAL,
110 AMD_SCHED_MAX_PRIORITY
111};
112
Jammy Zhoua72ce6f2015-05-22 18:55:07 +0800113/**
114 * One scheduler is implemented for each hardware ring
115*/
116struct amd_gpu_scheduler {
Christian König4f839a22015-09-08 20:22:31 +0200117 struct amd_sched_backend_ops *ops;
118 uint32_t hw_submission_limit;
Junwei Zhang2440ff22015-10-10 08:48:42 +0800119 long timeout;
Christian König4f839a22015-09-08 20:22:31 +0200120 const char *name;
Chunming Zhoud033a6d2015-11-05 15:23:09 +0800121 struct amd_sched_rq sched_rq[AMD_SCHED_MAX_PRIORITY];
Christian Königc2b6bd72015-08-25 21:39:31 +0200122 wait_queue_head_t wake_up_worker;
123 wait_queue_head_t job_scheduled;
Christian König4f839a22015-09-08 20:22:31 +0200124 atomic_t hw_rq_count;
Junwei Zhang2440ff22015-10-10 08:48:42 +0800125 struct list_head fence_list;
126 spinlock_t fence_list_lock;
Christian König4f839a22015-09-08 20:22:31 +0200127 struct task_struct *thread;
Jammy Zhoua72ce6f2015-05-22 18:55:07 +0800128};
129
Christian König4f839a22015-09-08 20:22:31 +0200130int amd_sched_init(struct amd_gpu_scheduler *sched,
131 struct amd_sched_backend_ops *ops,
Junwei Zhang2440ff22015-10-10 08:48:42 +0800132 uint32_t hw_submission, long timeout, const char *name);
Christian König4f839a22015-09-08 20:22:31 +0200133void amd_sched_fini(struct amd_gpu_scheduler *sched);
Jammy Zhoua72ce6f2015-05-22 18:55:07 +0800134
Christian König91404fb2015-08-05 18:33:21 +0200135int amd_sched_entity_init(struct amd_gpu_scheduler *sched,
136 struct amd_sched_entity *entity,
Christian König432a4ff2015-08-12 11:46:04 +0200137 struct amd_sched_rq *rq,
Christian König91404fb2015-08-05 18:33:21 +0200138 uint32_t jobs);
Christian König062c7fb2015-08-21 15:46:43 +0200139void amd_sched_entity_fini(struct amd_gpu_scheduler *sched,
140 struct amd_sched_entity *entity);
Christian Könige2840222015-11-05 19:49:48 +0100141void amd_sched_entity_push_job(struct amd_sched_job *sched_job);
Jammy Zhoua72ce6f2015-05-22 18:55:07 +0800142
Chunming Zhouf556cb0c2015-08-02 11:18:04 +0800143struct amd_sched_fence *amd_sched_fence_create(
Chunming Zhou84f76ea2015-08-24 12:47:36 +0800144 struct amd_sched_entity *s_entity, void *owner);
Christian König393a0bd2015-11-05 12:57:10 +0100145void amd_sched_fence_scheduled(struct amd_sched_fence *fence);
Chunming Zhouf556cb0c2015-08-02 11:18:04 +0800146void amd_sched_fence_signal(struct amd_sched_fence *fence);
147
Jammy Zhoua72ce6f2015-05-22 18:55:07 +0800148#endif